mirror of
https://github.com/holub/mame
synced 2025-10-07 01:16:22 +03:00
gamecom : fixed some minor gfx issues in arcadecl and cart startup; fixed unlimited overdraft in monopoly
This commit is contained in:
Robbbert
parent
6c6732e8cf
commit
a05c12da09
@ -272,7 +272,6 @@ void sm8500_cpu_device::process_interrupts()
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m_IR0 = m_program->read_byte(0x12);
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m_IR1 = m_program->read_byte(0x13);
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m_PS0 = m_program->read_byte(0x1e);
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m_PS1 = m_program->read_byte(0x1f);
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switch( irqline )
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{
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case WDT_INT:
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@ -284,56 +283,56 @@ void sm8500_cpu_device::process_interrupts()
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break;
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case DMA_INT:
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m_IR0 |= 0x80;
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if ( ( m_IE0 & 0x80 ) && ( ( m_PS0 & 0x07 ) < 8 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE0, 7) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1000 );
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}
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break;
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case TIM0_INT:
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m_IR0 |= 0x40;
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if ( ( m_IE0 & 0x40 ) && ( ( m_PS0 & 0x07 ) < 8 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE0, 6) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1002 );
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}
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break;
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case EXT_INT:
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m_IR0 |= 0x10;
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if ( ( m_IE0 & 0x10 ) && ( ( m_PS0 & 0x07 ) < 7 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE0, 4) && ( ( m_PS0 & 0x07 ) < 7 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1006 );
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}
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break;
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case UART_INT:
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m_IR0 |= 0x08;
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if ( ( m_IE0 & 0x08 ) && ( ( m_PS0 & 0x07 ) < 6 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE0, 3) && ( ( m_PS0 & 0x07 ) < 6 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1008 );
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}
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break;
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case LCDC_INT:
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m_IR0 |= 0x01;
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if ( ( m_IE0 & 0x01 ) && ( ( m_PS0 & 0x07 ) < 5 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE0, 0) && ( ( m_PS0 & 0x07 ) < 5 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x100E );
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}
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break;
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case TIM1_INT:
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m_IR1 |= 0x40;
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if ( ( m_IE1 & 0x40 ) && ( ( m_PS0 & 0x07 ) < 4 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE1, 6) && ( ( m_PS0 & 0x07 ) < 4 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1012 );
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}
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break;
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case CK_INT:
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m_IR1 |= 0x10;
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if ( ( m_IE1 & 0x10 ) && ( ( m_PS0 & 0x07 ) < 3 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE1, 4) && ( ( m_PS0 & 0x07 ) < 3 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x1016 );
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}
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break;
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case PIO_INT:
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m_IR1 |= 0x04;
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if ( ( m_IE1 & 0x04 ) && ( ( m_PS0 & 0x07 ) < 2 ) && ( m_PS1 & 0x01 ) )
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if ( BIT( m_IE1, 2) && ( ( m_PS0 & 0x07 ) < 2 ) && BIT( m_PS1, 0) )
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{
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take_interrupt( 0x101A );
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}
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@ -356,7 +356,7 @@
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#define OP_INC16(X) d1 = X; \
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res = d1 + 1; \
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m_PS1 = m_PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
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m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
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m_PS1 = m_PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 ); \
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m_PS1 = m_PS1 | ( ( res & 0x8000 ) ? FLAG_S : 0 ); \
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m_PS1 = m_PS1 | ( ( ( ( d1 ^ res ) & 0x8000 ) && ! ( res & 0x8000 ) ) ? FLAG_V : 0 );
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@ -377,7 +377,7 @@
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#define OP_AND8(X,Y) d1 = X; \
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d2 = Y; \
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res = d1 & d2; \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
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m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
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@ -390,7 +390,7 @@
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#define OP_OR8(X,Y) d1 = X; \
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d2 = Y; \
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res = d1 | d2; \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
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m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
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@ -403,7 +403,7 @@
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#define OP_XOR8(X,Y) d1 = X; \
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d2 = Y; \
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res = d1 ^ d2; \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \
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m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
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m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
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@ -501,7 +501,7 @@
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case 0x00: /* CLR R - 4 cycles - Flags affected: -------- */
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ARG_R;
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mem_writebyte( r1, 0 );
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mycycles += 4;
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mycycles += 4;
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break;
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case 0x01: /* NEG R - 5 cycles - Flags affected: CZSV---- */
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ARG_R;
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@ -909,7 +909,7 @@ logerror( "%04X: unk%02x\n", m_PC-1,op );
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case 0x2E: /* MOV PS0,#00 - 4 cycles - Flags affected: -------- */
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ARG_R;
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m_PS0 = r1;
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mycycles += 4;
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mycycles += 4;
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break;
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case 0x2F: /* BTST R,i - 6 cycles - Flags affected: -Z-0---- */
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ARG_RR;
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@ -1144,7 +1144,7 @@ case 0x4A: /* MOVW RRr,RRs - 8 cycles - Flags affected: -------- */
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case 0x4B: /* MOVW RRr,ww - 9 cycles - Flags affected: -------- */
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ARG_Sw;
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mem_writeword( r1, s2 );
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mycycles += 9;
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mycycles += 9;
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break;
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case 0x4C: /* MULT Rrr,Rs - 24 cycles - Flags affected: -Z-0---- */
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// operation is not known if r1 is odd, assuming same as even for now
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@ -1268,7 +1268,7 @@ case 0x57: /* XOR Rr,i - 6 cycles - Flags affected: -ZS0---- */
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case 0x58: /* MOV Rr,i - 6 cycles - Flags affected: -------- */
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ARG_iR;
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mem_writebyte( r1, r2 );
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mycycles += 6;
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mycycles += 6;
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break;
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case 0x59: /* Invalid - 2? cycles - Flags affected: --------? */
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logerror( "%04X: 59h: Invalid instruction\n", m_PC-1 );
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@ -1302,7 +1302,7 @@ case 0x5B: /* unk5B - 6,7,11,8,7 cycles */
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case 0x5C: /* DIV RRr,RRs - 47 cycles - Flags affected: -Z-V---- */
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/* lower 8 bits of RRs is used to divide */
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/* remainder in stored upper 8 bits of RRs */
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logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 );
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// logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 );
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ARG_RR;
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m_PS1 = m_PS1 & ~ ( FLAG_Z | FLAG_V );
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s1 = mem_readbyte( r2 + 1 );
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@ -1318,7 +1318,7 @@ logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 );
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mycycles += 47;
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break;
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case 0x5D: /* DIV RRr,i - 44 cycles - Flags affected: -Z-V---- */
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logerror( "%04X: DIV RRr,i!\n", m_PC-1 );
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// logerror( "%04X: DIV RRr,i!\n", m_PC-1 );
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ARG_iR;
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m_PS1 = m_PS1 & ~ ( FLAG_Z | FLAG_V );
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if ( r2 ) {
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@ -1578,7 +1578,7 @@ case 0xC6:
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case 0xC7:
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ARG_ri;
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mem_writebyte( r1, r2 );
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mycycles += 4;
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mycycles += 4;
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break;
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case 0xC8: /* MOV IE0/IE1/IR0/IR1/P0/P1/P2/P3,i - 4 cycles - Flags affected: -------- */
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case 0xC9:
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@ -1687,11 +1687,11 @@ case 0xFC: /* SETC - 2 cycles - Flags affected: C------- */
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break;
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case 0xFD: /* EI - 2 cycles - Flags affected: -------I */
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m_PS1 = m_PS1 | FLAG_I;
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mycycles += 2;
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mycycles += 2;
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break;
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case 0xFE: /* DI - 2 cycles - Flags affected: -------I */
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m_PS1 = m_PS1 & ~ ( FLAG_I );
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mycycles += 2;
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mycycles += 2;
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break;
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case 0xFF: /* NOP - 2 cycles - Flags affected: -------- */
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mycycles += 2;
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@ -14,11 +14,16 @@ Todo:
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Game Status:
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- Inbuilt ROM and PDA functions all work
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- On the screen where the cart goes into the slot, there are vertical bands of randomness
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- Due to an irritating message, the NVRAM is commented out in the machine config
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- All carts appear to work except:
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- - Henry: crash just after "HENRY" button clicked
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- - Lost World: freeze just after entering Stage 2 (the nest)
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- - Henry: misbehaviour just after "HENRY" button clicked.
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- --- You can still click where the invisible HENRY button is, and have one
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turn. After that, it's game over, and you can't play any more until
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you cold boot the emulation.
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- - Lost World: freeze just after entering Stage 2 (the nest).
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- --- If you do nothing it freezes at the point where the stegasaurus
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should turn around. So, straight away start moving to the right
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and you can keep playing.
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- Weblink and Internet are of no use as there is nothing to connect to.
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***************************************************************************/
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@ -71,6 +76,7 @@ static INPUT_PORTS_START( gamecom )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME( "Button D" ) PORT_CODE( KEYCODE_D ) PORT_CODE( KEYCODE_LSHIFT )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Stylus press" ) PORT_CODE( KEYCODE_Z ) PORT_CODE( MOUSECODE_BUTTON1 )
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// These are used by the "Default Grid" artwork to detect mouse clicks
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PORT_START("GRID.0")
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PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER)
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PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER)
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@ -155,43 +155,39 @@ enum
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struct GAMECOM_DMA
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{
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int enabled;
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int transfer_mode;
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int decrement_y;
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int decrement_x;
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int overwrite_mode;
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int width_x;
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int width_y;
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int width_x_count;
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int width_y_count;
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int source_x;
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int source_x_current;
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int source_y;
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int source_width;
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int dest_x;
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int dest_x_current;
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int dest_y;
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int dest_width;
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int state_count;
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int state_pixel;
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int state_limit;
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uint8_t palette[4];
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uint8_t *source_bank;
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unsigned int source_current;
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unsigned int source_line;
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unsigned int source_mask;
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uint8_t *dest_bank;
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unsigned int dest_current;
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unsigned int dest_line;
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unsigned int dest_mask;
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u8 width_x;
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u8 width_y;
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u8 source_x;
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u8 source_x_current;
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u8 source_y;
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u8 source_width;
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u8 dest_x;
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u8 dest_x_current;
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u8 dest_y;
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u8 dest_width;
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u8 palette;
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u8 block_width;
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u8 block_height;
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u8 *source_bank;
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u16 source_current;
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u16 source_line;
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u16 source_mask;
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u8 *dest_bank;
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u16 dest_current;
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u16 dest_line;
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u16 dest_mask;
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u8 transfer_mode;
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s16 adjust_x;
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bool decrement_y;
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bool overwrite_mode;
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};
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struct GAMECOM_TIMER
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{
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int enabled;
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int state_count;
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int state_limit;
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int check_value;
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bool enabled;
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u32 prescale_count;
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u32 prescale_max;
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u8 upcounter_max;
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};
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struct gamecom_sound_t
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@ -232,10 +232,6 @@ READ8_MEMBER( gamecom_state::gamecom_pio_r )
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READ8_MEMBER( gamecom_state::gamecom_internal_r )
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{
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// ToDo: Read from vblank bit
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// if(SM8521_LCV == offset + 0x20)
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// popmessage("Read from vblank bit, TODO");
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return m_p_ram[offset + 0x20];
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}
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@ -295,21 +291,23 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w )
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data &= 0x7f;
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break;
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case SM8521_TM0D:
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m_timer[0].check_value = data;
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return;
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m_timer[0].upcounter_max = data;
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data = 0;
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break;
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case SM8521_TM0C:
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m_timer[0].enabled = data & 0x80;
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m_timer[0].state_limit = gamecom_timer_limit[data & 0x07] >> 1;
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m_timer[0].state_count = 0;
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m_timer[0].enabled = BIT(data, 7);
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m_timer[0].prescale_max = gamecom_timer_limit[data & 0x07] >> 1;
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m_timer[0].prescale_count = 0;
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m_p_ram[SM8521_TM0D] = 0;
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break;
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case SM8521_TM1D:
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m_timer[1].check_value = data;
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return;
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m_timer[1].upcounter_max = data;
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data = 0;
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break;
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case SM8521_TM1C:
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m_timer[1].enabled = data & 0x80;
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m_timer[1].state_limit = gamecom_timer_limit[data & 0x07] >> 1;
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m_timer[1].state_count = 0;
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m_timer[1].enabled = BIT(data, 7);
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m_timer[1].prescale_max = gamecom_timer_limit[data & 0x07] >> 1;
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m_timer[1].prescale_count = 0;
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m_p_ram[SM8521_TM1D] = 0;
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break;
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case SM8521_CLKT: /* bit 6-7 */
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@ -319,7 +317,7 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w )
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if ( data & 0x40 )
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{
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/* timer resolution 1 minute */
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m_clock_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(60));
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m_clock_timer->adjust(attotime::from_seconds(60), 0, attotime::from_seconds(60));
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}
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else
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{
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@ -457,46 +455,40 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w )
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/* The manual is not conclusive as to which bit of the DMVP register (offset 0x3D) determines
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which page for source or destination is used */
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which page for source or destination is used.
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Also, there's nothing about what happens if the block overflows the source or destination. */
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WRITE8_MEMBER( gamecom_state::gamecom_handle_dma )
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{
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uint8_t dmc = m_p_ram[SM8521_DMC];
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m_dma.overwrite_mode = dmc & 0x01;
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m_dma.transfer_mode = dmc & 0x06;
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m_dma.decrement_x = dmc & 0x08;
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m_dma.decrement_y = dmc & 0x10;
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m_dma.enabled = dmc & 0x80;
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if ( !m_dma.enabled )
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{
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u8 dmc = m_p_ram[SM8521_DMC];
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if (!BIT(dmc, 7))
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return;
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}
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m_dma.width_x = m_p_ram[SM8521_DMDX];
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m_dma.width_x_count = 0;
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m_dma.width_y = m_p_ram[SM8521_DMDY];
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m_dma.width_y_count = 0;
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m_dma.overwrite_mode = BIT(dmc, 0);
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m_dma.transfer_mode = dmc & 0x06;
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m_dma.adjust_x = BIT(dmc, 3) ? -1 : 1;
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m_dma.decrement_y = BIT(dmc, 4);
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m_dma.block_width = m_p_ram[SM8521_DMDX];
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m_dma.block_height = m_p_ram[SM8521_DMDY];
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m_dma.source_x = m_p_ram[SM8521_DMX1];
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m_dma.source_x_current = m_dma.source_x;
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m_dma.source_x_current = m_dma.source_x & 3;
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m_dma.source_y = m_p_ram[SM8521_DMY1];
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m_dma.source_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40;
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m_dma.dest_width = m_dma.source_width;
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m_dma.dest_x = m_p_ram[SM8521_DMX2];
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m_dma.dest_x_current = m_dma.dest_x;
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m_dma.dest_x_current = m_dma.dest_x & 3;
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m_dma.dest_y = m_p_ram[SM8521_DMY2];
|
||||
m_dma.dest_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40;
|
||||
m_dma.palette[0] = m_p_ram[SM8521_DMPL] & 0x03;
|
||||
m_dma.palette[1] = ( m_p_ram[SM8521_DMPL] >> 2 ) & 3;
|
||||
m_dma.palette[2] = ( m_p_ram[SM8521_DMPL] >> 4 ) & 3;
|
||||
m_dma.palette[3] = m_p_ram[SM8521_DMPL] >> 6;
|
||||
m_dma.palette = m_p_ram[SM8521_DMPL];
|
||||
m_dma.source_mask = 0x1FFF;
|
||||
m_dma.dest_mask = 0x1FFF;
|
||||
// logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", m_dma.width_x, m_dma.width_y, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, m_dma.transfer_mode, m_p_ram[SM8521_DMVP] );
|
||||
m_dma.source_bank = &m_p_videoram[BIT(m_p_ram[SM8521_DMVP], 0) ? 0x2000 : 0x0000];
|
||||
m_dma.dest_bank = &m_p_videoram[BIT(m_p_ram[SM8521_DMVP], 1) ? 0x2000 : 0x0000];
|
||||
// logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", block_width, block_height, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, transfer_mode, m_p_ram[SM8521_DMVP] );
|
||||
// logerror( " Palette: %d, %d, %d, %d\n", m_dma.palette[0], m_dma.palette[1], m_dma.palette[2], m_dma.palette[3] );
|
||||
switch( m_dma.transfer_mode )
|
||||
{
|
||||
case 0x00:
|
||||
/* VRAM->VRAM */
|
||||
m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
|
||||
m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
|
||||
break;
|
||||
case 0x02:
|
||||
/* ROM->VRAM */
|
||||
@ -508,18 +500,14 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma )
|
||||
else
|
||||
if (m_cart_ptr)
|
||||
m_dma.source_bank = m_cart_ptr + (m_p_ram[SM8521_DMBR] << 14);
|
||||
|
||||
m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
|
||||
break;
|
||||
case 0x04:
|
||||
/* Extend RAM->VRAM */
|
||||
m_dma.source_width = 64;
|
||||
m_dma.source_bank = &m_p_nvram[0x0000];
|
||||
m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
|
||||
break;
|
||||
case 0x06:
|
||||
/* VRAM->Extend RAM */
|
||||
m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
|
||||
m_dma.dest_width = 64;
|
||||
m_dma.dest_bank = &m_p_nvram[0x0000];
|
||||
break;
|
||||
@ -530,53 +518,51 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma )
|
||||
m_dma.dest_current += m_dma.dest_x >> 2;
|
||||
m_dma.source_line = m_dma.source_current;
|
||||
m_dma.dest_line = m_dma.dest_current;
|
||||
m_dma.state_count = 0;
|
||||
|
||||
unsigned y_count, x_count;
|
||||
|
||||
for( y_count = 0; y_count <= m_dma.width_y; y_count++ )
|
||||
for( u16 y_count = 0; y_count <= m_dma.block_height; y_count++ )
|
||||
{
|
||||
for( x_count = 0; x_count <= m_dma.width_x; x_count++ )
|
||||
for( u16 x_count = 0; x_count <= m_dma.block_width; x_count++ )
|
||||
{
|
||||
uint16_t src_addr = m_dma.source_current & m_dma.source_mask;
|
||||
uint16_t dest_addr = m_dma.dest_current & m_dma.dest_mask;
|
||||
uint8_t dest_adj = (3 - (m_dma.dest_x_current & 3)) << 1;
|
||||
uint8_t src_adj = (3 - (m_dma.source_x_current & 3)) << 1;
|
||||
u16 src_addr = m_dma.source_current & m_dma.source_mask;
|
||||
u16 dst_addr = m_dma.dest_current & m_dma.dest_mask;
|
||||
u8 dst_adj = (m_dma.dest_x_current ^ 3) << 1;
|
||||
u8 src_adj = (m_dma.source_x_current ^ 3) << 1;
|
||||
|
||||
/* handle DMA for 1 pixel */
|
||||
// Get new pixel
|
||||
uint8_t source_pixel = (m_dma.source_bank[src_addr] >> src_adj) & 3;
|
||||
u8 source_pixel = (m_dma.source_bank[src_addr] >> src_adj) & 3;
|
||||
|
||||
// If overwrite mode, write new pixel
|
||||
if ( m_dma.overwrite_mode || source_pixel)
|
||||
{
|
||||
// Get 4 pixels and remove the one about to be replaced
|
||||
uint8_t other_pixels = m_dma.dest_bank[dest_addr] & ~(3 << dest_adj);
|
||||
u8 other_pixels = m_dma.dest_bank[dst_addr] & ~(3 << dst_adj);
|
||||
// Get palette of new pixel and place into the hole
|
||||
m_dma.dest_bank[dest_addr] = other_pixels | (m_dma.palette[ source_pixel ] << dest_adj);
|
||||
if (m_dma.transfer_mode == 6 || m_dma.transfer_mode == 0)
|
||||
m_dma.dest_bank[dst_addr] = other_pixels | (source_pixel << dst_adj);
|
||||
else
|
||||
m_dma.dest_bank[dst_addr] = other_pixels | (((m_dma.palette >> (source_pixel << 1)) & 3) << dst_adj);
|
||||
}
|
||||
|
||||
/* Advance a pixel */
|
||||
if ( m_dma.decrement_x )
|
||||
m_dma.source_x_current += m_dma.adjust_x;
|
||||
if (BIT(m_dma.source_x_current, 2))
|
||||
{
|
||||
m_dma.source_x_current--;
|
||||
if ( ( m_dma.source_x_current & 0x03 ) == 0x03 )
|
||||
m_dma.source_current--;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_dma.source_x_current++;
|
||||
if ( ( m_dma.source_x_current & 0x03 ) == 0x00 )
|
||||
m_dma.source_current++;
|
||||
m_dma.source_current += m_dma.adjust_x;
|
||||
m_dma.source_x_current &= 3;
|
||||
}
|
||||
|
||||
m_dma.dest_x_current++;
|
||||
if ( ( m_dma.dest_x_current & 0x03 ) == 0x00 )
|
||||
if (BIT(m_dma.dest_x_current, 2))
|
||||
{
|
||||
m_dma.dest_current++;
|
||||
m_dma.dest_x_current &= 3;
|
||||
}
|
||||
}
|
||||
|
||||
/* Advance a line */
|
||||
m_dma.source_x_current = m_dma.source_x;
|
||||
m_dma.dest_x_current = m_dma.dest_x;
|
||||
m_dma.source_x_current = m_dma.source_x & 3;
|
||||
m_dma.dest_x_current = m_dma.dest_x & 3;
|
||||
if ( m_dma.decrement_y )
|
||||
m_dma.source_line -= m_dma.source_width;
|
||||
else
|
||||
@ -585,7 +571,8 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma )
|
||||
m_dma.dest_line += m_dma.dest_width;
|
||||
m_dma.dest_current = m_dma.dest_line;
|
||||
}
|
||||
m_dma.enabled = 0;
|
||||
|
||||
m_p_ram[SM8521_DMC] &= 0x7f; // finished; turn off dma
|
||||
m_maincpu->set_input_line(sm8500_cpu_device::DMA_INT, ASSERT_LINE );
|
||||
}
|
||||
|
||||
@ -593,29 +580,33 @@ WRITE8_MEMBER( gamecom_state::gamecom_update_timers )
|
||||
{
|
||||
if ( m_timer[0].enabled )
|
||||
{
|
||||
m_timer[0].state_count += data;
|
||||
while ( m_timer[0].state_count >= m_timer[0].state_limit )
|
||||
m_timer[0].prescale_count += data;
|
||||
while ( m_timer[0].prescale_count >= m_timer[0].prescale_max )
|
||||
{
|
||||
m_timer[0].state_count -= m_timer[0].state_limit;
|
||||
m_timer[0].prescale_count -= m_timer[0].prescale_max;
|
||||
m_p_ram[SM8521_TM0D]++;
|
||||
if ( m_p_ram[SM8521_TM0D] >= m_timer[0].check_value )
|
||||
if ( m_p_ram[SM8521_TM0D] >= m_timer[0].upcounter_max )
|
||||
{
|
||||
m_p_ram[SM8521_TM0D] = 0;
|
||||
// m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE ); // this causes crazy flickering
|
||||
// check if irq is enabled before calling,
|
||||
// to stop monopoly choking up the interrupt queue
|
||||
if (BIT(m_p_ram[SM8521_IE0], 6) && BIT(m_p_ram[SM8521_PS1], 0))
|
||||
m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE );
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( m_timer[1].enabled )
|
||||
{
|
||||
m_timer[1].state_count += data;
|
||||
while ( m_timer[1].state_count >= m_timer[1].state_limit )
|
||||
m_timer[1].prescale_count += data;
|
||||
while ( m_timer[1].prescale_count >= m_timer[1].prescale_max )
|
||||
{
|
||||
m_timer[1].state_count -= m_timer[1].state_limit;
|
||||
m_timer[1].prescale_count -= m_timer[1].prescale_max;
|
||||
m_p_ram[SM8521_TM1D]++;
|
||||
if ( m_p_ram[SM8521_TM1D] >= m_timer[1].check_value )
|
||||
if ( m_p_ram[SM8521_TM1D] >= m_timer[1].upcounter_max )
|
||||
{
|
||||
m_p_ram[SM8521_TM1D] = 0;
|
||||
m_maincpu->set_input_line(sm8500_cpu_device::TIM1_INT, ASSERT_LINE );
|
||||
if (BIT(m_p_ram[SM8521_IE1], 6) && BIT(m_p_ram[SM8521_PS1], 0) && ((m_p_ram[SM8521_PS0] & 7) < 4))
|
||||
m_maincpu->set_input_line(sm8500_cpu_device::TIM1_INT, ASSERT_LINE );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
|
||||
|
||||
TIMER_CALLBACK_MEMBER(gamecom_state::gamecom_scanline)
|
||||
{
|
||||
{
|
||||
// draw line
|
||||
m_base_address = ( m_p_ram[SM8521_LCDC] & 0x40 ) ? 0x2000 : 0x0000;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user