Fixed a number of identifiers beginning with underscores in the m6805 disassembler

This commit is contained in:
Nathan Woods 2016-10-29 22:35:50 -04:00
parent 06613b3dd1
commit a09c98ed62

View File

@ -15,16 +15,16 @@
#include "m6805.h"
enum addr_mode {
_imp=0, /* implicit */
_btr, /* bit test and relative */
_bit, /* bit set/clear */
_rel, /* relative */
_imm, /* immediate */
_dir, /* direct address */
_ext, /* extended address */
_idx, /* indexed */
_ix1, /* indexed + byte offset */
_ix2 /* indexed + word offset */
m_imp=0, /* implicit */
m_btr, /* bit test and relative */
m_bit, /* bit set/clear */
m_rel, /* relative */
m_imm, /* immediate */
m_dir, /* direct address */
m_ext, /* extended address */
m_idx, /* indexed */
m_ix1, /* indexed + byte offset */
m_ix2 /* indexed + word offset */
};
enum op_names {
@ -56,70 +56,70 @@ static const char *const op_name_str[] = {
};
static const unsigned char disasm[0x100][2] = {
{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},/* 00 */
{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},/* 10 */
{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
{bra, _rel},{brn, _rel},{bhi, _rel},{bls, _rel},/* 20 */
{bcc, _rel},{bcs, _rel},{bne, _rel},{beq, _rel},
{bhcc, _rel},{bhcs, _rel},{bpl, _rel},{bmi, _rel},
{bmc, _rel},{bms, _rel},{bil, _rel},{bih, _rel},
{neg, _dir},{ill, _imp},{ill, _imp},{com, _dir},/* 30 */
{lsr, _dir},{ill, _imp},{ror, _dir},{asr, _dir},
{asl, _dir},{rol, _dir},{dec, _dir},{ill, _imp},
{inc, _dir},{tst, _dir},{ill, _imp},{clr, _dir},
{nega, _imp},{ill, _imp},{ill, _imp},{coma, _imp},/* 40 */
{lsra, _imp},{ill, _imp},{rora, _imp},{asra, _imp},
{asla, _imp},{rola, _imp},{deca, _imp},{ill, _imp},
{inca, _imp},{tsta, _imp},{ill, _imp},{clra, _imp},
{negx, _imp},{ill, _imp},{ill, _imp},{comx, _imp},/* 50 */
{lsrx, _imp},{ill, _imp},{rorx, _imp},{asrx, _imp},
{aslx, _imp},{rolx, _imp},{decx, _imp},{ill, _imp},
{incx, _imp},{tstx, _imp},{ill, _imp},{clrx, _imp},
{neg, _ix1},{ill, _imp},{ill, _imp},{com, _ix1},/* 60 */
{lsr, _ix1},{ill, _imp},{ror, _ix1},{asr, _ix1},
{asl, _ix1},{rol, _ix1},{dec, _ix1},{ill, _imp},
{inc, _ix1},{tst, _ix1},{jmp, _ix1},{clr, _ix1},
{neg, _idx},{ill, _imp},{ill, _imp},{com, _idx},/* 70 */
{lsr, _idx},{ill, _imp},{ror, _idx},{asr, _idx},
{asl, _idx},{rol, _idx},{dec, _idx},{ill, _imp},
{inc, _idx},{tst, _idx},{jmp, _idx},{clr, _idx},
{rti, _imp},{rts, _imp},{ill, _imp},{swi, _imp},/* 80 */
{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},/* 90 */
{ill, _imp},{ill, _imp},{ill, _imp},{tax, _imp},
{clc, _imp},{sec, _imp},{cli, _imp},{sei, _imp},
{rsp, _imp},{nop, _imp},{ill, _imp},{txa, _imp},
{suba, _imm},{cmpa, _imm},{sbca, _imm},{cpx, _imm},/* a0 */
{anda, _imm},{bita, _imm},{lda, _imm},{ill, _imp},
{eora, _imm},{adca, _imm},{ora, _imm},{adda, _imm},
{ill, _imp},{bsr, _rel},{ldx, _imm},{ill, _imp},
{suba, _dir},{cmpa, _dir},{sbca, _dir},{cpx, _dir},/* b0 */
{anda, _dir},{bita, _dir},{lda, _dir},{sta, _dir},
{eora, _dir},{adca, _dir},{ora, _dir},{adda, _dir},
{jmp, _dir},{jsr, _dir},{ldx, _dir},{stx, _dir},
{suba, _ext},{cmpa, _ext},{sbca, _ext},{cpx, _ext},/* c0 */
{anda, _ext},{bita, _ext},{lda, _ext},{sta, _ext},
{eora, _ext},{adca, _ext},{ora, _ext},{adda, _ext},
{jmp, _ext},{jsr, _ext},{ldx, _ext},{stx, _ext},
{suba, _ix2},{cmpa, _ix2},{sbca, _ix2},{cpx, _ix2},/* d0 */
{anda, _ix2},{bita, _ix2},{lda, _ix2},{sta, _ix2},
{eora, _ix2},{adca, _ix2},{ora, _ix2},{adda, _ix2},
{jmp, _ix2},{jsr, _ix2},{ldx, _ix2},{stx, _ix2},
{suba, _ix1},{cmpa, _ix1},{sbca, _ix1},{cpx, _ix1},/* e0 */
{anda, _ix1},{bita, _ix1},{lda, _ix1},{sta, _ix1},
{eora, _ix1},{adca, _ix1},{ora, _ix1},{adda, _ix1},
{jmp, _ix1},{jsr, _ix1},{ldx, _ix1},{stx, _ix1},
{suba, _idx},{cmpa, _idx},{sbca, _idx},{cpx, _idx},/* f0 */
{anda, _idx},{bita, _idx},{lda, _idx},{sta, _idx},
{eora, _idx},{adca, _idx},{ora, _idx},{adda, _idx},
{jmp, _idx},{jsr, _idx},{ldx, _idx},{stx, _idx}
{brset,m_btr},{brclr,m_btr},{brset,m_btr},{brclr,m_btr},/* 00 */
{brset,m_btr},{brclr,m_btr},{brset,m_btr},{brclr,m_btr},
{brset,m_btr},{brclr,m_btr},{brset,m_btr},{brclr,m_btr},
{brset,m_btr},{brclr,m_btr},{brset,m_btr},{brclr,m_btr},
{bset, m_bit},{bclr, m_bit},{bset, m_bit},{bclr, m_bit},/* 10 */
{bset, m_bit},{bclr, m_bit},{bset, m_bit},{bclr, m_bit},
{bset, m_bit},{bclr, m_bit},{bset, m_bit},{bclr, m_bit},
{bset, m_bit},{bclr, m_bit},{bset, m_bit},{bclr, m_bit},
{bra, m_rel},{brn, m_rel},{bhi, m_rel},{bls, m_rel},/* 20 */
{bcc, m_rel},{bcs, m_rel},{bne, m_rel},{beq, m_rel},
{bhcc, m_rel},{bhcs, m_rel},{bpl, m_rel},{bmi, m_rel},
{bmc, m_rel},{bms, m_rel},{bil, m_rel},{bih, m_rel},
{neg, m_dir},{ill, m_imp},{ill, m_imp},{com, m_dir},/* 30 */
{lsr, m_dir},{ill, m_imp},{ror, m_dir},{asr, m_dir},
{asl, m_dir},{rol, m_dir},{dec, m_dir},{ill, m_imp},
{inc, m_dir},{tst, m_dir},{ill, m_imp},{clr, m_dir},
{nega, m_imp},{ill, m_imp},{ill, m_imp},{coma, m_imp},/* 40 */
{lsra, m_imp},{ill, m_imp},{rora, m_imp},{asra, m_imp},
{asla, m_imp},{rola, m_imp},{deca, m_imp},{ill, m_imp},
{inca, m_imp},{tsta, m_imp},{ill, m_imp},{clra, m_imp},
{negx, m_imp},{ill, m_imp},{ill, m_imp},{comx, m_imp},/* 50 */
{lsrx, m_imp},{ill, m_imp},{rorx, m_imp},{asrx, m_imp},
{aslx, m_imp},{rolx, m_imp},{decx, m_imp},{ill, m_imp},
{incx, m_imp},{tstx, m_imp},{ill, m_imp},{clrx, m_imp},
{neg, m_ix1},{ill, m_imp},{ill, m_imp},{com, m_ix1},/* 60 */
{lsr, m_ix1},{ill, m_imp},{ror, m_ix1},{asr, m_ix1},
{asl, m_ix1},{rol, m_ix1},{dec, m_ix1},{ill, m_imp},
{inc, m_ix1},{tst, m_ix1},{jmp, m_ix1},{clr, m_ix1},
{neg, m_idx},{ill, m_imp},{ill, m_imp},{com, m_idx},/* 70 */
{lsr, m_idx},{ill, m_imp},{ror, m_idx},{asr, m_idx},
{asl, m_idx},{rol, m_idx},{dec, m_idx},{ill, m_imp},
{inc, m_idx},{tst, m_idx},{jmp, m_idx},{clr, m_idx},
{rti, m_imp},{rts, m_imp},{ill, m_imp},{swi, m_imp},/* 80 */
{ill, m_imp},{ill, m_imp},{ill, m_imp},{ill, m_imp},
{ill, m_imp},{ill, m_imp},{ill, m_imp},{ill, m_imp},
{ill, m_imp},{ill, m_imp},{ill, m_imp},{ill, m_imp},
{ill, m_imp},{ill, m_imp},{ill, m_imp},{ill, m_imp},/* 90 */
{ill, m_imp},{ill, m_imp},{ill, m_imp},{tax, m_imp},
{clc, m_imp},{sec, m_imp},{cli, m_imp},{sei, m_imp},
{rsp, m_imp},{nop, m_imp},{ill, m_imp},{txa, m_imp},
{suba, m_imm},{cmpa, m_imm},{sbca, m_imm},{cpx, m_imm},/* a0 */
{anda, m_imm},{bita, m_imm},{lda, m_imm},{ill, m_imp},
{eora, m_imm},{adca, m_imm},{ora, m_imm},{adda, m_imm},
{ill, m_imp},{bsr, m_rel},{ldx, m_imm},{ill, m_imp},
{suba, m_dir},{cmpa, m_dir},{sbca, m_dir},{cpx, m_dir},/* b0 */
{anda, m_dir},{bita, m_dir},{lda, m_dir},{sta, m_dir},
{eora, m_dir},{adca, m_dir},{ora, m_dir},{adda, m_dir},
{jmp, m_dir},{jsr, m_dir},{ldx, m_dir},{stx, m_dir},
{suba, m_ext},{cmpa, m_ext},{sbca, m_ext},{cpx, m_ext},/* c0 */
{anda, m_ext},{bita, m_ext},{lda, m_ext},{sta, m_ext},
{eora, m_ext},{adca, m_ext},{ora, m_ext},{adda, m_ext},
{jmp, m_ext},{jsr, m_ext},{ldx, m_ext},{stx, m_ext},
{suba, m_ix2},{cmpa, m_ix2},{sbca, m_ix2},{cpx, m_ix2},/* d0 */
{anda, m_ix2},{bita, m_ix2},{lda, m_ix2},{sta, m_ix2},
{eora, m_ix2},{adca, m_ix2},{ora, m_ix2},{adda, m_ix2},
{jmp, m_ix2},{jsr, m_ix2},{ldx, m_ix2},{stx, m_ix2},
{suba, m_ix1},{cmpa, m_ix1},{sbca, m_ix1},{cpx, m_ix1},/* e0 */
{anda, m_ix1},{bita, m_ix1},{lda, m_ix1},{sta, m_ix1},
{eora, m_ix1},{adca, m_ix1},{ora, m_ix1},{adda, m_ix1},
{jmp, m_ix1},{jsr, m_ix1},{ldx, m_ix1},{stx, m_ix1},
{suba, m_idx},{cmpa, m_idx},{sbca, m_idx},{cpx, m_idx},/* f0 */
{anda, m_idx},{bita, m_idx},{lda, m_idx},{sta, m_idx},
{eora, m_idx},{adca, m_idx},{ora, m_idx},{adda, m_idx},
{jmp, m_idx},{jsr, m_idx},{ldx, m_idx},{stx, m_idx}
};
#if 0
@ -178,42 +178,42 @@ static offs_t internal_disasm_m6805(cpu_device *device, std::ostream &stream, of
switch( disasm[code][1] )
{
case _btr: /* bit test and relative branch */
case m_btr: /* bit test and relative branch */
bit = (code >> 1) & 7;
util::stream_format(stream, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (int8_t)opram[2]);
result = 3 | flags | DASMFLAG_SUPPORTED;
break;
case _bit: /* bit test */
case m_bit: /* bit test */
bit = (code >> 1) & 7;
util::stream_format(stream, "%d,$%03X", bit, opram[1]);
result = 2 | flags | DASMFLAG_SUPPORTED;
break;
case _rel: /* relative */
case m_rel: /* relative */
util::stream_format(stream, "$%03X", pc + 2 + (int8_t)opram[1]);
result = 2 | flags | DASMFLAG_SUPPORTED;
break;
case _imm: /* immediate */
case m_imm: /* immediate */
util::stream_format(stream, "#$%02X", opram[1]);
result = 2 | flags | DASMFLAG_SUPPORTED;
break;
case _dir: /* direct (zero page address) */
case m_dir: /* direct (zero page address) */
util::stream_format(stream, "$%02X", opram[1]);
result = 2 | flags | DASMFLAG_SUPPORTED;
break;
case _ext: /* extended (16 bit address) */
case m_ext: /* extended (16 bit address) */
ea = (opram[1] << 8) + opram[2];
util::stream_format(stream, "$%04X", ea);
result = 3 | flags | DASMFLAG_SUPPORTED;
break;
case _idx: /* indexed */
case m_idx: /* indexed */
util::stream_format(stream, "(x)");
result = 1 | flags | DASMFLAG_SUPPORTED;
break;
case _ix1: /* indexed + byte (zero page) */
case m_ix1: /* indexed + byte (zero page) */
util::stream_format(stream, "(x+$%02X)", opram[1]);
result = 2 | flags | DASMFLAG_SUPPORTED;
break;
case _ix2: /* indexed + word (16 bit address) */
case m_ix2: /* indexed + word (16 bit address) */
ea = (opram[1] << 8) + opram[2];
util::stream_format(stream, "(x+$%04X)", ea);
result = 3 | flags | DASMFLAG_SUPPORTED;