Converted namcos2.c to use AM_IMPORT_FROM

This commit is contained in:
Angelo Salese 2009-05-10 17:07:23 +00:00
parent f7b8a87fe4
commit a0aa7c791c

View File

@ -574,146 +574,147 @@ static WRITE8_HANDLER( namcos2_dpram_byte_w )
0xc00000 ONWARDS are unverified memory locations on the video board
*/
#define NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
AM_RANGE(0x200000, 0x3fffff) AM_READ(namcos2_68k_data_rom_r) \
AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(namco_tilemapvideoram16_r,namco_tilemapvideoram16_w) \
AM_RANGE(0x420000, 0x42003f) AM_READWRITE(namco_tilemapcontrol16_r,namco_tilemapcontrol16_w) \
AM_RANGE(0x440000, 0x44ffff) AM_READWRITE(namcos2_68k_video_palette_r,namcos2_68k_video_palette_w) AM_BASE(&namcos2_68k_palette_ram) AM_SIZE(&namcos2_68k_palette_size) \
AM_RANGE(0x460000, 0x460fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w) \
AM_RANGE(0x468000, 0x468fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w) /* mirror */ \
AM_RANGE(0x480000, 0x483fff) AM_READWRITE(namcos2_68k_serial_comms_ram_r,namcos2_68k_serial_comms_ram_w) AM_BASE(&namcos2_68k_serial_comms_ram) \
static ADDRESS_MAP_START( namcos2_68k_default_cpu_board_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200000, 0x3fffff) AM_READ(namcos2_68k_data_rom_r)
AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(namco_tilemapvideoram16_r,namco_tilemapvideoram16_w)
AM_RANGE(0x420000, 0x42003f) AM_READWRITE(namco_tilemapcontrol16_r,namco_tilemapcontrol16_w)
AM_RANGE(0x440000, 0x44ffff) AM_READWRITE(namcos2_68k_video_palette_r,namcos2_68k_video_palette_w) AM_BASE(&namcos2_68k_palette_ram) AM_SIZE(&namcos2_68k_palette_size)
AM_RANGE(0x460000, 0x460fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w)
AM_RANGE(0x468000, 0x468fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w) /* mirror */
AM_RANGE(0x480000, 0x483fff) AM_READWRITE(namcos2_68k_serial_comms_ram_r,namcos2_68k_serial_comms_ram_w) AM_BASE(&namcos2_68k_serial_comms_ram)
AM_RANGE(0x4a0000, 0x4a000f) AM_READWRITE(namcos2_68k_serial_comms_ctrl_r,namcos2_68k_serial_comms_ctrl_w)
ADDRESS_MAP_END
/*************************************************************/
#define COMMON_DEFAULT_AM \
NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(namcos2_sprite_ram_r,namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
AM_RANGE(0xc40000, 0xc40001) AM_READWRITE(namcos2_gfx_ctrl_r,namcos2_gfx_ctrl_w) \
AM_RANGE(0xc80000, 0xc9ffff) AM_READWRITE(namcos2_68k_roz_ram_r,namcos2_68k_roz_ram_w) AM_BASE(&namcos2_68k_roz_ram) \
AM_RANGE(0xcc0000, 0xcc000f) AM_READWRITE(namcos2_68k_roz_ctrl_r,namcos2_68k_roz_ctrl_w) \
AM_RANGE(0xd00000, 0xd0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
static ADDRESS_MAP_START( common_default_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(namcos2_sprite_ram_r,namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram)
AM_RANGE(0xc40000, 0xc40001) AM_READWRITE(namcos2_gfx_ctrl_r,namcos2_gfx_ctrl_w)
AM_RANGE(0xc80000, 0xc9ffff) AM_READWRITE(namcos2_68k_roz_ram_r,namcos2_68k_roz_ram_w) AM_BASE(&namcos2_68k_roz_ram)
AM_RANGE(0xcc0000, 0xcc000f) AM_READWRITE(namcos2_68k_roz_ctrl_r,namcos2_68k_roz_ctrl_w)
AM_RANGE(0xd00000, 0xd0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w)
AM_IMPORT_FROM( namcos2_68k_default_cpu_board_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_default_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
COMMON_DEFAULT_AM
AM_IMPORT_FROM( common_default_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_default_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
COMMON_DEFAULT_AM
AM_IMPORT_FROM( common_default_am )
ADDRESS_MAP_END
/*************************************************************/
#define COMMON_FINALLAP_AM \
AM_RANGE(0x300000, 0x33ffff) AM_READ(namcos2_flap_prot_r) \
NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
AM_RANGE(0x800000, 0x80ffff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
AM_RANGE(0x840000, 0x840001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w) \
AM_RANGE(0x880000, 0x89ffff) AM_READ(namco_road16_r) AM_WRITE(namco_road16_w) \
AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP \
static ADDRESS_MAP_START( common_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x300000, 0x33ffff) AM_READ(namcos2_flap_prot_r)
AM_RANGE(0x800000, 0x80ffff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram)
AM_RANGE(0x840000, 0x840001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w)
AM_RANGE(0x880000, 0x89ffff) AM_READ(namco_road16_r) AM_WRITE(namco_road16_w)
AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP
AM_IMPORT_FROM( namcos2_68k_default_cpu_board_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
COMMON_FINALLAP_AM
AM_IMPORT_FROM( common_finallap_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
COMMON_FINALLAP_AM
AM_IMPORT_FROM( common_finallap_am )
ADDRESS_MAP_END
/*************************************************************/
#define COMMON_SGUNNER_AM \
NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
AM_RANGE(0x818000, 0x818001) AM_WRITENOP \
AM_RANGE(0xa00000, 0xa0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
static ADDRESS_MAP_START( common_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w)
AM_RANGE(0x818000, 0x818001) AM_WRITENOP
AM_RANGE(0xa00000, 0xa0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w)
AM_IMPORT_FROM( namcos2_68k_default_cpu_board_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
COMMON_SGUNNER_AM
AM_IMPORT_FROM( common_sgunner_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
COMMON_SGUNNER_AM
AM_IMPORT_FROM( common_sgunner_am )
ADDRESS_MAP_END
/*************************************************************/
#define COMMON_METLHAWK_AM \
NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
static ADDRESS_MAP_START( common_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(namcos2_sprite_ram_r,namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
AM_RANGE(0xc40000, 0xc4ffff) AM_READWRITE(namco_rozvideoram16_r,namco_rozvideoram16_w) \
AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(namco_rozcontrol16_r,namco_rozcontrol16_w) \
AM_RANGE(0xe00000, 0xe00001) AM_READWRITE(namcos2_gfx_ctrl_r,namcos2_gfx_ctrl_w) /* ??? */ \
AM_IMPORT_FROM( namcos2_68k_default_cpu_board_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
COMMON_METLHAWK_AM
AM_IMPORT_FROM( common_metlhawk_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
COMMON_METLHAWK_AM
AM_IMPORT_FROM( common_metlhawk_am )
ADDRESS_MAP_END
/*************************************************************/
#define COMMON_LUCKYWLD_AM \
NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
AM_RANGE(0x818000, 0x818001) AM_NOP /* enable? */ \
AM_RANGE(0x81a000, 0x81a001) AM_WRITENOP /* enable? */ \
AM_RANGE(0x840000, 0x840001) AM_READNOP \
AM_RANGE(0x900000, 0x900007) AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w) \
AM_RANGE(0xa00000, 0xa1ffff) AM_READWRITE(namco_road16_r,namco_road16_w) \
AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(namco_rozvideoram16_r,namco_rozvideoram16_w) \
AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(namco_rozcontrol16_r,namco_rozcontrol16_w) \
AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
static ADDRESS_MAP_START( common_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w)
AM_RANGE(0x818000, 0x818001) AM_NOP /* enable? */
AM_RANGE(0x81a000, 0x81a001) AM_WRITENOP /* enable? */
AM_RANGE(0x840000, 0x840001) AM_READNOP
AM_RANGE(0x900000, 0x900007) AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w)
AM_RANGE(0xa00000, 0xa1ffff) AM_READWRITE(namco_road16_r,namco_road16_w)
AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(namco_rozvideoram16_r,namco_rozvideoram16_w)
AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(namco_rozcontrol16_r,namco_rozcontrol16_w)
AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w)
AM_IMPORT_FROM( namcos2_68k_default_cpu_board_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
COMMON_LUCKYWLD_AM
AM_IMPORT_FROM( common_luckywld_am )
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
COMMON_LUCKYWLD_AM
AM_IMPORT_FROM( common_luckywld_am )
ADDRESS_MAP_END
/*************************************************************/