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https://github.com/holub/mame
synced 2025-06-05 12:26:35 +03:00
-dpb7000: Improved disk controller emulation, somewhat improved brush loading. [Happy, Ryan Holtz]
This commit is contained in:
Ryan Holtz
parent
2e11913f12
commit
a0c1a32429
@ -143,6 +143,11 @@ private:
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void diskseq_y_w(uint16_t data);
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void diskseq_tick();
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void advance_line_count();
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void toggle_line_clock();
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void process_sample();
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void process_byte_from_disc(uint8_t data_byte);
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required_device<m68000_base_device> m_maincpu;
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required_device_array<acia6850_device, 3> m_acia;
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required_device<input_merger_device> m_p_int;
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@ -171,6 +176,7 @@ private:
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uint8_t m_fdd_ctrl;
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uint8_t m_fdd_port1;
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uint8_t m_fdd_track;
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uint8_t m_fdd_side;
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fdc_pll_t m_fdd_pll;
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required_device<floppy_connector> m_floppy0;
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@ -232,7 +238,8 @@ private:
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uint8_t m_diskseq_ed_cnt; // ED
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uint8_t m_diskseq_head_cnt; // EC
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uint16_t m_diskseq_cyl_from_cpu; // AE/BH
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uint16_t m_diskseq_cmd_from_cpu; // DD/CC
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uint16_t m_diskseq_cmd_word_from_cpu; // DD/CC
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uint8_t m_diskseq_cmd;
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uint8_t m_diskseq_cyl_to_ctrl;
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uint8_t m_diskseq_cmd_to_ctrl;
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uint8_t m_diskseq_status_in; // CG
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@ -253,6 +260,9 @@ private:
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uint16_t m_cursor_size_y;
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// Brush Address Card
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uint8_t m_line_clock;
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uint16_t m_line_count;
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uint16_t m_line_length;
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uint16_t m_brush_addr_func;
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uint8_t m_bif;
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uint8_t m_bixos;
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@ -303,6 +313,9 @@ private:
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uint8_t *m_filter_mult;
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uint8_t m_filter_acbc[16];
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uint8_t m_filter_abbb[16];
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uint8_t m_incoming_lum;
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uint8_t m_incoming_chr;
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bool m_buffer_lum;
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// Size Card
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required_device<am2901b_device> m_size_yl;
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@ -488,7 +501,8 @@ void dpb7000_state::machine_start()
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save_item(NAME(m_diskseq_ed_cnt));
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save_item(NAME(m_diskseq_head_cnt));
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save_item(NAME(m_diskseq_cyl_from_cpu));
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save_item(NAME(m_diskseq_cmd_from_cpu));
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save_item(NAME(m_diskseq_cmd_word_from_cpu));
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save_item(NAME(m_diskseq_cmd));
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save_item(NAME(m_diskseq_cyl_to_ctrl));
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save_item(NAME(m_diskseq_cmd_to_ctrl));
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save_item(NAME(m_diskseq_status_in));
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@ -506,6 +520,7 @@ void dpb7000_state::machine_start()
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save_item(NAME(m_fdd_ctrl));
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save_item(NAME(m_fdd_port1));
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save_item(NAME(m_fdd_track));
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save_item(NAME(m_fdd_side));
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// Disc Data Buffer Card
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save_item(NAME(m_diskbuf_ram_addr));
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@ -519,6 +534,9 @@ void dpb7000_state::machine_start()
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save_item(NAME(m_cursor_size_y));
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// Brush Address Card
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save_item(NAME(m_line_clock));
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save_item(NAME(m_line_count));
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save_item(NAME(m_line_length));
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save_item(NAME(m_brush_addr_func));
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save_item(NAME(m_bif));
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save_item(NAME(m_bixos));
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@ -585,6 +603,9 @@ void dpb7000_state::machine_start()
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m_filter_mult = m_filter_multprom->base();
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save_item(NAME(m_filter_acbc));
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save_item(NAME(m_filter_abbb));
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save_item(NAME(m_incoming_lum));
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save_item(NAME(m_incoming_chr));
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save_item(NAME(m_buffer_lum));
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m_yuv_lut = std::make_unique<uint32_t[]>(0x1000000);
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for (uint16_t u = 0; u < 256; u++)
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@ -623,11 +644,12 @@ void dpb7000_state::machine_reset()
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m_diskseq_ed_cnt = 0;
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m_diskseq_head_cnt = 0;
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m_diskseq_cyl_from_cpu = 0;
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m_diskseq_cmd_from_cpu = 0;
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m_diskseq_cmd_word_from_cpu = 0;
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m_diskseq_cmd = 0;
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m_diskseq_cyl_to_ctrl = 0;
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m_diskseq_cmd_to_ctrl = 0;
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m_diskseq_status_in = 0;
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m_diskseq_status_out = 0xff;
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m_diskseq_status_out = 0xf9;
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memset(m_diskseq_ucode_latch, 0, 7);
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memset(m_diskseq_cc_inputs, 0, 4);
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m_diskseq_cyl_read_pending = false;
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@ -641,6 +663,7 @@ void dpb7000_state::machine_reset()
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m_fdd_ctrl = 0;
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m_fdd_port1 = 0;
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m_fdd_track = 20;
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m_fdd_side = 0;
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m_fdd_pll.set_clock(attotime::from_hz(1000000));
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m_fdd_pll.reset(machine().time());
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m_floppy = nullptr;
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@ -657,6 +680,9 @@ void dpb7000_state::machine_reset()
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m_cursor_size_y = 0;
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// Brush Address Card
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m_line_clock = 0;
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m_line_count = 0;
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m_line_length = 0;
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m_brush_addr_func = 0;
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m_bif = 0;
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m_bixos = 0;
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@ -708,6 +734,9 @@ void dpb7000_state::machine_reset()
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// Filter Card
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memset(m_filter_acbc, 0, 16);
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memset(m_filter_abbb, 0, 16);
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m_incoming_lum = 0;
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m_incoming_chr = 0;
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m_buffer_lum = true;
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// Size Card
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m_size_h = 0;
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@ -812,9 +841,9 @@ void dpb7000_state::diskseq_y_w(uint16_t data)
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m_diskseq_cc_inputs[2] |= BIT(m_diskseq_status_in, DSEQ_STATUS_RAM_ADDR_OVFLO_BIT);
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// C17..C19 tied low
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m_diskseq_cc_inputs[2] |= ~(m_diskseq_cmd_from_cpu & 0xf) << 4;
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m_diskseq_cc_inputs[2] |= ~(m_diskseq_cmd_word_from_cpu & 0xf) << 4;
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m_diskseq_cc_inputs[3] = ~(m_diskseq_cmd_from_cpu >> 4) & 0xff;
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m_diskseq_cc_inputs[3] = ~(m_diskseq_cmd_word_from_cpu >> 4) & 0xff;
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// S15, S16: Select which bank of 8 lines is treated as /CC input to Am2910
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const uint8_t fx_bank_sel = (BIT(m_diskseq_ucode_latch[2], 0) << 1) | BIT(m_diskseq_ucode_latch[1], 7);
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@ -981,7 +1010,7 @@ uint16_t dpb7000_state::cpu_ctrlbus_r()
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ret = m_diskseq_status_out;
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//req_b_w(0);
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break;
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case 0x7:
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case 7:
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ret = m_diskbuf_ram[m_diskbuf_ram_addr];
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LOGMASKED(LOG_CTRLBUS, "%s: CPU read from Control Bus, Disc Data Buffer Card RAM read: %04x = %02x\n", machine().describe_context(), m_diskbuf_ram_addr, ret);
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m_diskbuf_ram_addr++;
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@ -1097,6 +1126,8 @@ void dpb7000_state::handle_command(uint16_t data)
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case 1: // Brush Store Read
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break;
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case 2: // Brush Store Write
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m_bxlen_counter = m_bxlen;
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m_bylen_counter = m_bylen;
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break;
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case 3: // Framestore Read
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break;
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@ -1216,6 +1247,7 @@ void dpb7000_state::cpu_ctrlbus_w(uint16_t data)
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uint16_t old_cyl = m_diskseq_cyl_from_cpu;
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m_diskseq_cyl_from_cpu = data & 0x3ff;
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LOGMASKED(LOG_CTRLBUS, "%s: CPU write to Control Bus, Disk Sequencer Card, Cylinder Number: %04x\n", machine().describe_context(), m_diskseq_cyl_from_cpu);
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//printf("Cylinder %d\n", m_diskseq_cyl_from_cpu);
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if (old_cyl != m_diskseq_cyl_from_cpu && m_diskseq_cyl_from_cpu < 78 && m_floppy != nullptr)
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{
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if (m_diskseq_cyl_from_cpu < old_cyl)
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@ -1248,87 +1280,76 @@ void dpb7000_state::cpu_ctrlbus_w(uint16_t data)
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}
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else if (hi_nybble == 2)
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{
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m_diskseq_cmd_from_cpu = data & 0xfff;
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m_diskseq_cmd_word_from_cpu = data & 0xfff;
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m_diskseq_cmd = (data >> 8) & 0xf;
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req_b_w(0); // Flag ourselves as in-use
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LOGMASKED(LOG_CTRLBUS, "%s: CPU write to Control Bus, Disk Sequencer Card, Command: %x (%04x)\n", machine().describe_context(), (data >> 8) & 0xf, data);
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LOGMASKED(LOG_CTRLBUS, "%s Head: %x\n", machine().describe_context(), data & 0xf);
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LOGMASKED(LOG_CTRLBUS, "%s Drive: %x\n", machine().describe_context(), (data >> 5) & 7);
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switch ((data >> 8) & 0xf)
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switch (m_diskseq_cmd)
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{
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case 1:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Unknown command nybble 1\n", machine().describe_context());
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case 5:
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case 9:
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case 13:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: No command\n", machine().describe_context());
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req_b_w(1);
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//m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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case 0:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read (floppy?) track to RAM buffer?\n", machine().describe_context());
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read track to buffer RAM\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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{
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m_diskseq_cyl_read_pending = true;
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m_fdd_side = 0;
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}
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break;
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case 2:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read track, stride 2, to buffer RAM\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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{
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m_diskseq_cyl_read_pending = true;
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m_fdd_side = 0;
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}
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break;
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case 4:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read Track\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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{
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m_line_count = 0;
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m_line_clock = 0;
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m_diskseq_cyl_read_pending = true;
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m_fdd_side = 0;
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}
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break;
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case 6:
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case 4:
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{
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//req_b_w(1);
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m_diskseq_cyl_read_pending = true;
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: %s track read to Brush Store (ignored for now)\n", machine().describe_context(),
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((data >> 8) & 0xf) == 6 ? "Initiate" : "Continue");
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/*if (((data >> 8) & 0xf) == 6)
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Disc Clear, Read Track\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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{
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m_size_h = 0;
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m_size_v = 0;
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m_diskseq_cyl_read_pending = true;
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m_fdd_side = 0;
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}
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uint16_t disc_buffer_addr = 0;
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uint16_t bx = m_bxlen_counter - m_bxlen;
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uint16_t by = m_bylen_counter - m_bylen;
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while (m_diskbuf_data_count > 0 && m_bylen_counter < 0x1000)
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{
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uint8_t hv = (m_size_h << 4) | m_size_v;
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uint8_t hv_permuted = bitswap<8>(hv,4,6,0,2,5,7,1,3);
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if (BIT(m_brush_addr_func, 7)) // Luma Enable
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{
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//printf("%02x ", m_diskbuf_ram[disc_buffer_addr]);
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m_brushstore_lum[by * 256 + hv_permuted] = m_diskbuf_ram[disc_buffer_addr];
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}
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disc_buffer_addr++;
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m_diskbuf_data_count--;
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if (BIT(m_brush_addr_func, 8)) // Chroma Enable
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{
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m_brushstore_chr[by * 256 + hv_permuted] = m_diskbuf_ram[disc_buffer_addr];
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}
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disc_buffer_addr++;
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m_diskbuf_data_count--;
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m_size_h++;
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if (m_size_h == 16)
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{
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m_size_h = 0;
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m_size_v++;
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if (m_size_v == 16)
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{
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m_size_v = 0;
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}
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}
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bx++;
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m_bxlen_counter++;
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if (m_bxlen_counter == 0x1000)
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{
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bx = 0;
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by++;
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m_bxlen_counter = m_bxlen;
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m_bylen_counter++;
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//printf("\n");
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}
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}*/
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m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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}
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case 8:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Write Track from Buffer RAM (not yet implemented)\n", machine().describe_context());
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req_b_w(1);
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//m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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case 10:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Write Track, stride 2, from Buffer RAM (not yet implemented)\n", machine().describe_context());
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req_b_w(1);
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//m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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case 12:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Write Track (not yet implemented)\n", machine().describe_context());
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req_b_w(1);
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//m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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case 14:
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Disc Clear, Write Track (not yet implemented)\n", machine().describe_context());
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req_b_w(1);
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//m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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break;
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default:
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LOGMASKED(LOG_CTRLBUS, "%s: Unknown Disk Sequencer Card command.\n", machine().describe_context());
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m_diskseq_complete_clk->adjust(attotime::from_msec(1));
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@ -1528,82 +1549,183 @@ uint8_t dpb7000_state::fdd_ctrl_r()
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return ret;
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}
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void dpb7000_state::advance_line_count()
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{
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m_bxlen_counter = m_bxlen;
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m_bylen_counter++;
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if (m_bylen_counter == 0x1000)
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{
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m_diskseq_cyl_read_pending = false;
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}
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m_line_length = 0;
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m_line_count++;
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toggle_line_clock();
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}
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void dpb7000_state::toggle_line_clock()
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{
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m_line_clock ^= 1;
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}
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void dpb7000_state::process_sample()
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{
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const uint16_t x = (m_bxlen_counter - m_bxlen) ^ 7;
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const uint16_t y = (m_bylen_counter - m_bylen) ^ 7;
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//printf("Processing sample %d,%d (%04x:%04x, %04x:%04x) LC:%d\n", x, y, m_bxlen_counter, m_bxlen, m_bylen_counter, m_bylen, m_line_count);
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if (BIT(m_brush_addr_func, 7))
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m_brushstore_lum[y * 256 + x] = m_incoming_lum;
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if (BIT(m_brush_addr_func, 8))
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m_brushstore_chr[y * 256 + x] = m_incoming_chr;
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m_bxlen_counter++;
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if (m_bxlen_counter == 0x1000)
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{
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advance_line_count();
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}
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}
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void dpb7000_state::process_byte_from_disc(uint8_t data_byte)
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{
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if (m_buffer_lum)
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{
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m_incoming_lum = data_byte;
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}
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else
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{
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m_incoming_chr = data_byte;
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process_sample();
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}
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m_buffer_lum = !m_buffer_lum;
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m_line_length++;
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if (m_line_length == 0x300)
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{
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advance_line_count();
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}
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}
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void dpb7000_state::fdd_index_callback(floppy_image_device *floppy, int state)
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{
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if (!state && m_diskseq_cyl_read_pending && m_floppy)
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if (!state && m_diskseq_cyl_read_pending && m_floppy && m_fdd_side < 2)
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{
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//printf("Cylinder read is pending, index just passed by, we have a floppy. Let's go.\n");
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m_fdd_pll.read_reset(machine().time());
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static const uint16_t PREGAP_MARK = 0xaaaa;
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static const uint16_t SYNC_MARK = 0x9125;
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m_floppy->ss_w(0);
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m_floppy->ss_w(m_fdd_side);
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for (int side = 0; side < 2; side++)
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bool seen_pregap = false;
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bool in_track = false;
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int curr_bit = -1;
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uint16_t curr_window = 0;
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uint16_t bit_idx = 0;
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//printf("Side %d, not seen pregap, not in the track, no current bit, no current window, no bit index.\n", m_fdd_side);
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attotime tm = machine().time();
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attotime limit = machine().time() + attotime::from_ticks(1, 6); // One revolution at 360rpm on a Shugart SA850
|
||||
do
|
||||
{
|
||||
bool seen_pregap = false;
|
||||
bool in_track = false;
|
||||
int curr_bit = -1;
|
||||
uint16_t curr_window = 0;
|
||||
uint16_t bit_idx = 0;
|
||||
|
||||
attotime tm = machine().time();
|
||||
attotime limit = machine().time() + attotime::from_ticks(1, 6); // One revolution at 360rpm on a Shugart SA850
|
||||
do
|
||||
curr_bit = m_fdd_pll.get_next_bit(tm, m_floppy, limit);
|
||||
if (curr_bit < 0)
|
||||
{
|
||||
curr_bit = m_fdd_pll.get_next_bit(tm, m_floppy, limit);
|
||||
if (curr_bit < 0)
|
||||
{
|
||||
LOGMASKED(LOG_FDC_MECH, "Warning: Unable to retrieve full track %d side %d!\n", m_floppy->get_cyl(), side);
|
||||
}
|
||||
else
|
||||
{
|
||||
curr_window <<= 1;
|
||||
curr_window |= curr_bit;
|
||||
bit_idx++;
|
||||
//if ((bit_idx % 8) == 0)
|
||||
//{
|
||||
// printf("%02x ", (uint8_t)curr_window);
|
||||
//}
|
||||
LOGMASKED(LOG_FDC_MECH, "Warning: Unable to retrieve full track %d side %d, curr_bit returned -1\n", m_floppy->get_cyl(), m_fdd_side);
|
||||
}
|
||||
else
|
||||
{
|
||||
curr_window <<= 1;
|
||||
curr_window |= curr_bit;
|
||||
bit_idx++;
|
||||
|
||||
if (!seen_pregap && curr_window == PREGAP_MARK)
|
||||
if (!seen_pregap && curr_window == PREGAP_MARK)
|
||||
{
|
||||
seen_pregap = true;
|
||||
//printf("\nFound pregap area.\n");
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
}
|
||||
else if (seen_pregap && !in_track && curr_window == SYNC_MARK)
|
||||
{
|
||||
in_track = true;
|
||||
//printf("\nOh hi, mark.\n");
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
}
|
||||
else if (seen_pregap && in_track && bit_idx == 16)
|
||||
{
|
||||
uint8_t data_byte = (uint8_t)bitswap<16>((uint16_t)curr_window, 15, 13, 11, 9, 7, 5, 3, 1, 14, 12, 10, 8, 6, 4, 2, 0);
|
||||
//printf("%02x ", data_byte);
|
||||
switch (m_diskseq_cmd)
|
||||
{
|
||||
seen_pregap = true;
|
||||
//printf("\nFound pregap area.\n");
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
}
|
||||
else if (seen_pregap && !in_track && curr_window == SYNC_MARK)
|
||||
{
|
||||
in_track = true;
|
||||
//printf("\nOh hi, mark.\n");
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
}
|
||||
else if (seen_pregap && in_track && bit_idx == 16)
|
||||
{
|
||||
uint8_t data_byte = (uint8_t)bitswap<16>((uint16_t)curr_window, 15, 13, 11, 9, 7, 5, 3, 1, 14, 12, 10, 8, 6, 4, 2, 0);
|
||||
m_diskbuf_ram[m_diskbuf_ram_addr] = data_byte;
|
||||
m_diskbuf_ram_addr++;
|
||||
if (m_diskbuf_ram_addr >= 0x2700 && side == 0)
|
||||
case 4: // Read Track
|
||||
case 6: // Disc Clear, Read Track
|
||||
process_byte_from_disc(data_byte);
|
||||
if (!m_diskseq_cyl_read_pending)
|
||||
{
|
||||
curr_bit = -1;
|
||||
m_fdd_side = 2;
|
||||
//printf("\nThe whole world has betrayed me!\n");
|
||||
}
|
||||
else if (m_fdd_side == 0 && m_line_count == 13)
|
||||
{
|
||||
// If we've read the side 0 portion of the cylinder, yield out and begin processing side 1
|
||||
curr_bit = -1;
|
||||
m_floppy->ss_w(1);
|
||||
m_fdd_side++;
|
||||
//printf("\nCatch you on the flip side!\n");
|
||||
}
|
||||
else if(m_diskbuf_ram_addr >= 0x4b00 && side == 1)
|
||||
else if (m_fdd_side == 1 && m_line_count == 25)
|
||||
{
|
||||
curr_bit = -1;
|
||||
m_fdd_side++;
|
||||
//printf("\nYou're my favorite customer.\n");
|
||||
}
|
||||
break;
|
||||
case 0: // Read Track to Buffer RAM
|
||||
case 2: // Read Track, stride 2, to Buffer RAM
|
||||
if (BIT(m_diskseq_cmd, 1))
|
||||
{
|
||||
if (!BIT(m_diskbuf_ram_addr, 0))
|
||||
{
|
||||
m_diskbuf_ram[m_diskbuf_ram_addr >> 1] = data_byte;
|
||||
}
|
||||
m_diskbuf_ram_addr++;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_diskbuf_ram[m_diskbuf_ram_addr] = data_byte;
|
||||
m_diskbuf_ram_addr++;
|
||||
}
|
||||
|
||||
if (m_diskbuf_ram_addr >= 0x2700 && m_fdd_side == 0)
|
||||
{
|
||||
// If we've read the side 0 portion of the cylinder, yield out and wait for the next index pulse
|
||||
curr_bit = -1;
|
||||
m_floppy->ss_w(1);
|
||||
m_fdd_side++;
|
||||
//printf("\nCatch you on the flip side!\n");
|
||||
}
|
||||
else if(m_diskbuf_ram_addr >= 0x4800 && m_fdd_side == 1)
|
||||
{
|
||||
// If we've read the side 1 portion of the cylinder, yield out, we're done
|
||||
curr_bit = -1;
|
||||
m_fdd_side++;
|
||||
//printf("\nYou're my favorite customer.\n");
|
||||
}
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
break;
|
||||
}
|
||||
bit_idx = 0;
|
||||
curr_window = 0;
|
||||
}
|
||||
} while (curr_bit != -1);
|
||||
}
|
||||
}
|
||||
} while (curr_bit != -1);
|
||||
//printf("\n");
|
||||
}
|
||||
|
||||
if (m_fdd_side == 2)
|
||||
{
|
||||
m_diskseq_cyl_read_pending = false;
|
||||
req_b_w(1);
|
||||
}
|
||||
@ -1642,7 +1764,7 @@ void dpb7000_state::fddcpu_p1_w(uint8_t data)
|
||||
|
||||
if (m_fdd_track == 0)
|
||||
{
|
||||
m_fdd_ctrl |= 0x04;
|
||||
m_fdd_ctrl |= 0x04; // On Cylinder
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1654,10 +1776,11 @@ void dpb7000_state::fddcpu_p1_w(uint8_t data)
|
||||
m_fdd_ctrl &= ~0x04;
|
||||
}
|
||||
|
||||
// C5 D READY
|
||||
if (BIT(m_fdd_port1, 7))
|
||||
m_diskseq_status_out &= ~0x08;
|
||||
m_diskseq_status_out &= ~(1 << 3);
|
||||
else
|
||||
m_diskseq_status_out |= 0x08;
|
||||
m_diskseq_status_out |= (1 << 3);
|
||||
}
|
||||
|
||||
void dpb7000_state::fddcpu_p2_w(uint8_t data)
|
||||
@ -1731,7 +1854,7 @@ uint32_t dpb7000_state::store_screen_update(screen_device &screen, bitmap_rgb32
|
||||
uint8_t *src_lum = &m_brushstore_lum[(py - 512) * 256];
|
||||
uint8_t *src_chr = &m_brushstore_chr[(py - 512) * 256];
|
||||
uint32_t *dst = &bitmap.pix32(py);
|
||||
for (int px = 0; px < 256; px++)
|
||||
for (int px = 0; px < 256; px += 2)
|
||||
{
|
||||
const uint32_t u = *src_chr++ << 16;
|
||||
const uint32_t v = *src_chr++ << 8;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user