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Pointer-ified cpu/nec (V30)
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Couriersud
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dac32ec750
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@ -31,25 +31,25 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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/* parameter x = result, y = source 1, z = source 2 */
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#define SetTF(x) (I.TF = (x))
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#define SetIF(x) (I.IF = (x))
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#define SetDF(x) (I.DF = (x))
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#define SetMD(x) (I.MF = (x)) /* OB [19.07.99] Mode Flag V30 */
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#define SetTF(x) (nec_state->TF = (x))
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#define SetIF(x) (nec_state->IF = (x))
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#define SetDF(x) (nec_state->DF = (x))
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#define SetMD(x) (nec_state->MF = (x)) /* OB [19.07.99] Mode Flag V30 */
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#define SetCFB(x) (I.CarryVal = (x) & 0x100)
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#define SetCFW(x) (I.CarryVal = (x) & 0x10000)
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#define SetAF(x,y,z) (I.AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
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#define SetSF(x) (I.SignVal = (x))
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#define SetZF(x) (I.ZeroVal = (x))
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#define SetPF(x) (I.ParityVal = (x))
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#define SetCFB(x) (nec_state->CarryVal = (x) & 0x100)
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#define SetCFW(x) (nec_state->CarryVal = (x) & 0x10000)
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#define SetAF(x,y,z) (nec_state->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
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#define SetSF(x) (nec_state->SignVal = (x))
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#define SetZF(x) (nec_state->ZeroVal = (x))
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#define SetPF(x) (nec_state->ParityVal = (x))
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#define SetSZPF_Byte(x) (I.SignVal=I.ZeroVal=I.ParityVal=(INT8)(x))
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#define SetSZPF_Word(x) (I.SignVal=I.ZeroVal=I.ParityVal=(INT16)(x))
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#define SetSZPF_Byte(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT8)(x))
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#define SetSZPF_Word(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT16)(x))
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#define SetOFW_Add(x,y,z) (I.OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
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#define SetOFB_Add(x,y,z) (I.OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
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#define SetOFW_Sub(x,y,z) (I.OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
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#define SetOFB_Sub(x,y,z) (I.OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
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#define SetOFW_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
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#define SetOFB_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
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#define SetOFW_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
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#define SetOFB_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
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#define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
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#define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
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@ -57,42 +57,42 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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#define SUBB { UINT32 res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
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#define SUBW { UINT32 res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
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#define ORB dst|=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
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#define ORW dst|=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
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#define ORB dst|=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
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#define ORW dst|=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
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#define ANDB dst&=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
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#define ANDW dst&=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
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#define ANDB dst&=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
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#define ANDW dst&=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
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#define XORB dst^=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
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#define XORW dst^=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
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#define XORB dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
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#define XORW dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
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#define CF (I.CarryVal!=0)
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#define SF (I.SignVal<0)
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#define ZF (I.ZeroVal==0)
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#define PF parity_table[(BYTE)I.ParityVal]
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#define AF (I.AuxVal!=0)
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#define OF (I.OverVal!=0)
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#define MD (I.MF!=0)
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#define CF (nec_state->CarryVal!=0)
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#define SF (nec_state->SignVal<0)
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#define ZF (nec_state->ZeroVal==0)
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#define PF parity_table[(BYTE)nec_state->ParityVal]
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#define AF (nec_state->AuxVal!=0)
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#define OF (nec_state->OverVal!=0)
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#define MD (nec_state->MF!=0)
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/************************************************************************/
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#define read_byte(a) (*I.mem.rbyte)(a)
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#define read_word(a) (*I.mem.rword)(a)
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#define write_byte(a,d) (*I.mem.wbyte)((a),(d))
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#define write_word(a,d) (*I.mem.wword)((a),(d))
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#define read_byte(a) (*nec_state->mem.rbyte)(a)
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#define read_word(a) (*nec_state->mem.rword)(a)
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#define write_byte(a,d) (*nec_state->mem.wbyte)((a),(d))
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#define write_word(a,d) (*nec_state->mem.wword)((a),(d))
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#define read_port_byte(a) (*I.mem.rbyte_port)(a)
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#define read_port_word(a) (*I.mem.rword_port)(a)
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#define write_port_byte(a,d) (*I.mem.wbyte_port)((a),(d))
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#define write_port_word(a,d) (*I.mem.wword_port)((a),(d))
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#define read_port_byte(a) (*nec_state->mem.rbyte_port)(a)
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#define read_port_word(a) (*nec_state->mem.rword_port)(a)
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#define write_port_byte(a,d) (*nec_state->mem.wbyte_port)((a),(d))
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#define write_port_word(a,d) (*nec_state->mem.wword_port)((a),(d))
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/************************************************************************/
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#define CHANGE_PC do { EMPTY_PREFETCH(); change_pc((I.sregs[PS]<<4) + I.ip); } while (0)
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#define CHANGE_PC do { EMPTY_PREFETCH(); change_pc((nec_state->sregs[PS]<<4) + nec_state->ip); } while (0)
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#define SegBase(Seg) (I.sregs[Seg] << 4)
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#define SegBase(Seg) (nec_state->sregs[Seg] << 4)
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#define DefaultBase(Seg) ((I.seg_prefix && (Seg==DS0 || Seg==SS)) ? I.prefix_base : I.sregs[Seg] << 4)
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#define DefaultBase(Seg) ((nec_state->seg_prefix && (Seg==DS0 || Seg==SS)) ? nec_state->prefix_base : nec_state->sregs[Seg] << 4)
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#define GetMemB(Seg,Off) (read_byte(DefaultBase(Seg) + (Off)))
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#define GetMemW(Seg,Off) (read_word(DefaultBase(Seg) + (Off)))
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@ -102,14 +102,14 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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/* prefetch timing */
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#define FETCH() fetch()
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#define FETCH_XOR(a) ((a) ^ I.mem.fetch_xor)
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#define FETCHWORD() fetchword()
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#define EMPTY_PREFETCH() I.prefetch_reset = 1
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#define FETCH() fetch(nec_state)
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#define FETCH_XOR(a) ((a) ^ nec_state->mem.fetch_xor)
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#define FETCHWORD() fetchword(nec_state)
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#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
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#define PUSH(val) { I.regs.w[SP]-=2; write_word((((I.sregs[SS]<<4)+I.regs.w[SP])),val); }
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#define POP(var) { var = read_word((((I.sregs[SS]<<4)+I.regs.w[SP]))); I.regs.w[SP]+=2; }
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#define PUSH(val) { nec_state->regs.w[SP]-=2; write_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP])),val); }
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#define POP(var) { var = read_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP]))); nec_state->regs.w[SP]+=2; }
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#define GetModRM UINT32 ModRM=FETCH()
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@ -125,46 +125,46 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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Extra cycles for PUSH'ing or POP'ing registers to odd addresses is not emulated.
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*/
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#define CLK(all) nec_ICount-=all
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#define CLKS(v20,v30,v33) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33; nec_ICount-=(ccount>>I.chip_type)&0x7f; }
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#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; nec_ICount-=(addr&1)?((ocount>>I.chip_type)&0x7f):((ecount>>I.chip_type)&0x7f); }
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#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; nec_ICount-=( ModRM >=0xc0 )?((ccount>>I.chip_type)&0x7f):((mcount>>I.chip_type)&0x7f); }
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#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) nec_ICount-=vall; else nec_ICount-=(addr&1)?((ocount>>I.chip_type)&0x7f):((ecount>>I.chip_type)&0x7f); }
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#define CLK(all) nec_state->icount-=all
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#define CLKS(v20,v30,v33) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33; nec_state->icount-=(ccount>>nec_state->chip_type)&0x7f; }
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#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; nec_state->icount-=(addr&1)?((ocount>>nec_state->chip_type)&0x7f):((ecount>>nec_state->chip_type)&0x7f); }
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#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; nec_state->icount-=( ModRM >=0xc0 )?((ccount>>nec_state->chip_type)&0x7f):((mcount>>nec_state->chip_type)&0x7f); }
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#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) nec_state->icount-=vall; else nec_state->icount-=(addr&1)?((ocount>>nec_state->chip_type)&0x7f):((ecount>>nec_state->chip_type)&0x7f); }
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/************************************************************************/
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#define CompressFlags() (WORD)(CF | (PF << 2) | (AF << 4) | (ZF << 6) \
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| (SF << 7) | (I.TF << 8) | (I.IF << 9) \
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| (I.DF << 10) | (OF << 11)| (MD << 15))
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| (SF << 7) | (nec_state->TF << 8) | (nec_state->IF << 9) \
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| (nec_state->DF << 10) | (OF << 11)| (MD << 15))
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#define ExpandFlags(f) \
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{ \
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I.CarryVal = (f) & 1; \
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I.ParityVal = !((f) & 4); \
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I.AuxVal = (f) & 16; \
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I.ZeroVal = !((f) & 64); \
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I.SignVal = (f) & 128 ? -1 : 0; \
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I.TF = ((f) & 256) == 256; \
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I.IF = ((f) & 512) == 512; \
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I.DF = ((f) & 1024) == 1024; \
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I.OverVal = (f) & 2048; \
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I.MF = ((f) & 0x8000) == 0x8000; \
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nec_state->CarryVal = (f) & 1; \
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nec_state->ParityVal = !((f) & 4); \
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nec_state->AuxVal = (f) & 16; \
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nec_state->ZeroVal = !((f) & 64); \
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nec_state->SignVal = (f) & 128 ? -1 : 0; \
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nec_state->TF = ((f) & 256) == 256; \
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nec_state->IF = ((f) & 512) == 512; \
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nec_state->DF = ((f) & 1024) == 1024; \
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nec_state->OverVal = (f) & 2048; \
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nec_state->MF = ((f) & 0x8000) == 0x8000; \
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}
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#define IncWordReg(Reg) \
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unsigned tmp = (unsigned)I.regs.w[Reg]; \
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unsigned tmp = (unsigned)nec_state->regs.w[Reg]; \
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unsigned tmp1 = tmp+1; \
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I.OverVal = (tmp == 0x7fff); \
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nec_state->OverVal = (tmp == 0x7fff); \
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SetAF(tmp1,tmp,1); \
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SetSZPF_Word(tmp1); \
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I.regs.w[Reg]=tmp1
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nec_state->regs.w[Reg]=tmp1
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#define DecWordReg(Reg) \
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unsigned tmp = (unsigned)I.regs.w[Reg]; \
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unsigned tmp = (unsigned)nec_state->regs.w[Reg]; \
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unsigned tmp1 = tmp-1; \
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I.OverVal = (tmp == 0x8000); \
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nec_state->OverVal = (tmp == 0x8000); \
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SetAF(tmp1,tmp,1); \
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SetSZPF_Word(tmp1); \
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I.regs.w[Reg]=tmp1
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nec_state->regs.w[Reg]=tmp1
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#define JMP(flag) \
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int tmp; \
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@ -173,60 +173,60 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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if (flag) \
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{ \
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static const UINT8 table[3]={3,10,10}; \
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I.ip = (WORD)(I.ip+tmp); \
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nec_ICount-=table[I.chip_type/8]; \
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nec_state->ip = (WORD)(nec_state->ip+tmp); \
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nec_state->icount-=table[nec_state->chip_type/8]; \
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CHANGE_PC; \
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return; \
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}
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#define ADJ4(param1,param2) \
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if (AF || ((I.regs.b[AL] & 0xf) > 9)) \
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if (AF || ((nec_state->regs.b[AL] & 0xf) > 9)) \
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{ \
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UINT16 tmp; \
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tmp = I.regs.b[AL] + param1; \
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I.regs.b[AL] = tmp; \
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I.AuxVal = 1; \
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I.CarryVal |= tmp & 0x100; \
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tmp = nec_state->regs.b[AL] + param1; \
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nec_state->regs.b[AL] = tmp; \
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nec_state->AuxVal = 1; \
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nec_state->CarryVal |= tmp & 0x100; \
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} \
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if (CF || (I.regs.b[AL]>0x9f)) \
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if (CF || (nec_state->regs.b[AL]>0x9f)) \
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{ \
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I.regs.b[AL] += param2; \
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I.CarryVal = 1; \
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nec_state->regs.b[AL] += param2; \
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nec_state->CarryVal = 1; \
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} \
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SetSZPF_Byte(I.regs.b[AL])
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SetSZPF_Byte(nec_state->regs.b[AL])
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#define ADJB(param1,param2) \
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if (AF || ((I.regs.b[AL] & 0xf) > 9)) \
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if (AF || ((nec_state->regs.b[AL] & 0xf) > 9)) \
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{ \
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I.regs.b[AL] += param1; \
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I.regs.b[AH] += param2; \
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I.AuxVal = 1; \
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I.CarryVal = 1; \
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nec_state->regs.b[AL] += param1; \
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nec_state->regs.b[AH] += param2; \
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nec_state->AuxVal = 1; \
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nec_state->CarryVal = 1; \
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} \
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else \
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{ \
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I.AuxVal = 0; \
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I.CarryVal = 0; \
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nec_state->AuxVal = 0; \
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nec_state->CarryVal = 0; \
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} \
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I.regs.b[AL] &= 0x0F
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nec_state->regs.b[AL] &= 0x0F
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#define BITOP_BYTE \
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ModRM = FETCH(); \
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if (ModRM >= 0xc0) { \
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tmp=I.regs.b[Mod_RM.RM.b[ModRM]]; \
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tmp=nec_state->regs.b[Mod_RM.RM.b[ModRM]]; \
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} \
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else { \
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(*GetEA[ModRM])(); \
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(*GetEA[ModRM])(nec_state); \
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tmp=read_byte(EA); \
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}
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#define BITOP_WORD \
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ModRM = FETCH(); \
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if (ModRM >= 0xc0) { \
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tmp=I.regs.w[Mod_RM.RM.w[ModRM]]; \
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tmp=nec_state->regs.w[Mod_RM.RM.w[ModRM]]; \
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} \
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else { \
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(*GetEA[ModRM])(); \
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(*GetEA[ModRM])(nec_state); \
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tmp=read_word(EA); \
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}
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@ -238,144 +238,144 @@ typedef enum { AH,AL,CH,CL,DH,DL,BH,BL,SPH,SPL,BPH,BPL,IXH,IXL,IYH,IYL } BREGS;
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#define XchgAWReg(Reg) \
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WORD tmp; \
|
||||
tmp = I.regs.w[Reg]; \
|
||||
I.regs.w[Reg] = I.regs.w[AW]; \
|
||||
I.regs.w[AW] = tmp
|
||||
tmp = nec_state->regs.w[Reg]; \
|
||||
nec_state->regs.w[Reg] = nec_state->regs.w[AW]; \
|
||||
nec_state->regs.w[AW] = tmp
|
||||
|
||||
#define ROL_BYTE I.CarryVal = dst & 0x80; dst = (dst << 1)+CF
|
||||
#define ROL_WORD I.CarryVal = dst & 0x8000; dst = (dst << 1)+CF
|
||||
#define ROR_BYTE I.CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<7)
|
||||
#define ROR_WORD I.CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<15)
|
||||
#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
|
||||
#define ROL_WORD nec_state->CarryVal = dst & 0x8000; dst = (dst << 1)+CF
|
||||
#define ROR_BYTE nec_state->CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<7)
|
||||
#define ROR_WORD nec_state->CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<15)
|
||||
#define ROLC_BYTE dst = (dst << 1) + CF; SetCFB(dst)
|
||||
#define ROLC_WORD dst = (dst << 1) + CF; SetCFW(dst)
|
||||
#define RORC_BYTE dst = (CF<<8)+dst; I.CarryVal = dst & 0x01; dst >>= 1
|
||||
#define RORC_WORD dst = (CF<<16)+dst; I.CarryVal = dst & 0x01; dst >>= 1
|
||||
#define SHL_BYTE(c) nec_ICount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHL_WORD(c) nec_ICount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
#define SHR_BYTE(c) nec_ICount-=c; dst >>= c-1; I.CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHR_WORD(c) nec_ICount-=c; dst >>= c-1; I.CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
#define SHRA_BYTE(c) nec_ICount-=c; dst = ((INT8)dst) >> (c-1); I.CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHRA_WORD(c) nec_ICount-=c; dst = ((INT16)dst) >> (c-1); I.CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
#define RORC_BYTE dst = (CF<<8)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
|
||||
#define RORC_WORD dst = (CF<<16)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
|
||||
#define SHL_BYTE(c) nec_state->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHL_WORD(c) nec_state->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
#define SHR_BYTE(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHR_WORD(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
#define SHRA_BYTE(c) nec_state->icount-=c; dst = ((INT8)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
|
||||
#define SHRA_WORD(c) nec_state->icount-=c; dst = ((INT16)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
|
||||
|
||||
#define DIVUB \
|
||||
uresult = I.regs.w[AW]; \
|
||||
uresult = nec_state->regs.w[AW]; \
|
||||
uresult2 = uresult % tmp; \
|
||||
if ((uresult /= tmp) > 0xff) { \
|
||||
nec_interrupt(0,0); break; \
|
||||
nec_interrupt(nec_state, 0,0); break; \
|
||||
} else { \
|
||||
I.regs.b[AL] = uresult; \
|
||||
I.regs.b[AH] = uresult2; \
|
||||
nec_state->regs.b[AL] = uresult; \
|
||||
nec_state->regs.b[AH] = uresult2; \
|
||||
}
|
||||
|
||||
#define DIVB \
|
||||
result = (INT16)I.regs.w[AW]; \
|
||||
result = (INT16)nec_state->regs.w[AW]; \
|
||||
result2 = result % (INT16)((INT8)tmp); \
|
||||
if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
|
||||
nec_interrupt(0,0); break; \
|
||||
nec_interrupt(nec_state, 0,0); break; \
|
||||
} else { \
|
||||
I.regs.b[AL] = result; \
|
||||
I.regs.b[AH] = result2; \
|
||||
nec_state->regs.b[AL] = result; \
|
||||
nec_state->regs.b[AH] = result2; \
|
||||
}
|
||||
|
||||
#define DIVUW \
|
||||
uresult = (((UINT32)I.regs.w[DW]) << 16) | I.regs.w[AW];\
|
||||
uresult = (((UINT32)nec_state->regs.w[DW]) << 16) | nec_state->regs.w[AW];\
|
||||
uresult2 = uresult % tmp; \
|
||||
if ((uresult /= tmp) > 0xffff) { \
|
||||
nec_interrupt(0,0); break; \
|
||||
nec_interrupt(nec_state, 0,0); break; \
|
||||
} else { \
|
||||
I.regs.w[AW]=uresult; \
|
||||
I.regs.w[DW]=uresult2; \
|
||||
nec_state->regs.w[AW]=uresult; \
|
||||
nec_state->regs.w[DW]=uresult2; \
|
||||
}
|
||||
|
||||
#define DIVW \
|
||||
result = ((UINT32)I.regs.w[DW] << 16) + I.regs.w[AW]; \
|
||||
result = ((UINT32)nec_state->regs.w[DW] << 16) + nec_state->regs.w[AW]; \
|
||||
result2 = result % (INT32)((INT16)tmp); \
|
||||
if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
|
||||
nec_interrupt(0,0); break; \
|
||||
nec_interrupt(nec_state, 0,0); break; \
|
||||
} else { \
|
||||
I.regs.w[AW]=result; \
|
||||
I.regs.w[DW]=result2; \
|
||||
nec_state->regs.w[AW]=result; \
|
||||
nec_state->regs.w[DW]=result2; \
|
||||
}
|
||||
|
||||
#define ADD4S { \
|
||||
int i,v1,v2,result; \
|
||||
int count = (I.regs.b[CL]+1)/2; \
|
||||
unsigned di = I.regs.w[IY]; \
|
||||
unsigned si = I.regs.w[IX]; \
|
||||
int count = (nec_state->regs.b[CL]+1)/2; \
|
||||
unsigned di = nec_state->regs.w[IY]; \
|
||||
unsigned si = nec_state->regs.w[IX]; \
|
||||
static const UINT8 table[3]={18,19,19}; \
|
||||
if (I.seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
I.ZeroVal = I.CarryVal = 0; \
|
||||
if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
nec_state->ZeroVal = nec_state->CarryVal = 0; \
|
||||
for (i=0;i<count;i++) { \
|
||||
nec_ICount-=table[I.chip_type/8]; \
|
||||
nec_state->icount-=table[nec_state->chip_type/8]; \
|
||||
tmp = GetMemB(DS0, si); \
|
||||
tmp2 = GetMemB(DS1, di); \
|
||||
v1 = (tmp>>4)*10 + (tmp&0xf); \
|
||||
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
|
||||
result = v1+v2+I.CarryVal; \
|
||||
I.CarryVal = result > 99 ? 1 : 0; \
|
||||
result = v1+v2+nec_state->CarryVal; \
|
||||
nec_state->CarryVal = result > 99 ? 1 : 0; \
|
||||
result = result % 100; \
|
||||
v1 = ((result/10)<<4) | (result % 10); \
|
||||
PutMemB(DS1, di,v1); \
|
||||
if (v1) I.ZeroVal = 1; \
|
||||
if (v1) nec_state->ZeroVal = 1; \
|
||||
si++; \
|
||||
di++; \
|
||||
} \
|
||||
}
|
||||
|
||||
#define SUB4S { \
|
||||
int count = (I.regs.b[CL]+1)/2; \
|
||||
int count = (nec_state->regs.b[CL]+1)/2; \
|
||||
int i,v1,v2,result; \
|
||||
unsigned di = I.regs.w[IY]; \
|
||||
unsigned si = I.regs.w[IX]; \
|
||||
unsigned di = nec_state->regs.w[IY]; \
|
||||
unsigned si = nec_state->regs.w[IX]; \
|
||||
static const UINT8 table[3]={18,19,19}; \
|
||||
if (I.seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
I.ZeroVal = I.CarryVal = 0; \
|
||||
if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
nec_state->ZeroVal = nec_state->CarryVal = 0; \
|
||||
for (i=0;i<count;i++) { \
|
||||
nec_ICount-=table[I.chip_type/8]; \
|
||||
nec_state->icount-=table[nec_state->chip_type/8]; \
|
||||
tmp = GetMemB(DS1, di); \
|
||||
tmp2 = GetMemB(DS0, si); \
|
||||
v1 = (tmp>>4)*10 + (tmp&0xf); \
|
||||
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
|
||||
if (v1 < (v2+I.CarryVal)) { \
|
||||
if (v1 < (v2+nec_state->CarryVal)) { \
|
||||
v1+=100; \
|
||||
result = v1-(v2+I.CarryVal); \
|
||||
I.CarryVal = 1; \
|
||||
result = v1-(v2+nec_state->CarryVal); \
|
||||
nec_state->CarryVal = 1; \
|
||||
} else { \
|
||||
result = v1-(v2+I.CarryVal); \
|
||||
I.CarryVal = 0; \
|
||||
result = v1-(v2+nec_state->CarryVal); \
|
||||
nec_state->CarryVal = 0; \
|
||||
} \
|
||||
v1 = ((result/10)<<4) | (result % 10); \
|
||||
PutMemB(DS1, di,v1); \
|
||||
if (v1) I.ZeroVal = 1; \
|
||||
if (v1) nec_state->ZeroVal = 1; \
|
||||
si++; \
|
||||
di++; \
|
||||
} \
|
||||
}
|
||||
|
||||
#define CMP4S { \
|
||||
int count = (I.regs.b[CL]+1)/2; \
|
||||
int count = (nec_state->regs.b[CL]+1)/2; \
|
||||
int i,v1,v2,result; \
|
||||
unsigned di = I.regs.w[IY]; \
|
||||
unsigned si = I.regs.w[IX]; \
|
||||
unsigned di = nec_state->regs.w[IY]; \
|
||||
unsigned si = nec_state->regs.w[IX]; \
|
||||
static const UINT8 table[3]={14,19,19}; \
|
||||
if (I.seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
I.ZeroVal = I.CarryVal = 0; \
|
||||
if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",cpu_get_pc(Machine->activecpu)); \
|
||||
nec_state->ZeroVal = nec_state->CarryVal = 0; \
|
||||
for (i=0;i<count;i++) { \
|
||||
nec_ICount-=table[I.chip_type/8]; \
|
||||
nec_state->icount-=table[nec_state->chip_type/8]; \
|
||||
tmp = GetMemB(DS1, di); \
|
||||
tmp2 = GetMemB(DS0, si); \
|
||||
v1 = (tmp>>4)*10 + (tmp&0xf); \
|
||||
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
|
||||
if (v1 < (v2+I.CarryVal)) { \
|
||||
if (v1 < (v2+nec_state->CarryVal)) { \
|
||||
v1+=100; \
|
||||
result = v1-(v2+I.CarryVal); \
|
||||
I.CarryVal = 1; \
|
||||
result = v1-(v2+nec_state->CarryVal); \
|
||||
nec_state->CarryVal = 1; \
|
||||
} else { \
|
||||
result = v1-(v2+I.CarryVal); \
|
||||
I.CarryVal = 0; \
|
||||
result = v1-(v2+nec_state->CarryVal); \
|
||||
nec_state->CarryVal = 0; \
|
||||
} \
|
||||
v1 = ((result/10)<<4) | (result % 10); \
|
||||
if (v1) I.ZeroVal = 1; \
|
||||
if (v1) nec_state->ZeroVal = 1; \
|
||||
si++; \
|
||||
di++; \
|
||||
} \
|
||||
|
||||
@ -3,34 +3,34 @@ static UINT32 EA;
|
||||
static UINT16 EO;
|
||||
static UINT16 E16;
|
||||
|
||||
static unsigned EA_000(void) { EO=I.regs.w[BW]+I.regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_001(void) { EO=I.regs.w[BW]+I.regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_002(void) { EO=I.regs.w[BP]+I.regs.w[IX]; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_003(void) { EO=I.regs.w[BP]+I.regs.w[IY]; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_004(void) { EO=I.regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_005(void) { EO=I.regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_006(void) { EO=FETCH(); EO+=FETCH()<<8; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_007(void) { EO=I.regs.w[BW]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_000(nec_state_t *nec_state) { EO=nec_state->regs.w[BW]+nec_state->regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_001(nec_state_t *nec_state) { EO=nec_state->regs.w[BW]+nec_state->regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_002(nec_state_t *nec_state) { EO=nec_state->regs.w[BP]+nec_state->regs.w[IX]; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_003(nec_state_t *nec_state) { EO=nec_state->regs.w[BP]+nec_state->regs.w[IY]; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_004(nec_state_t *nec_state) { EO=nec_state->regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_005(nec_state_t *nec_state) { EO=nec_state->regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_006(nec_state_t *nec_state) { EO=FETCH(); EO+=FETCH()<<8; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_007(nec_state_t *nec_state) { EO=nec_state->regs.w[BW]; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
|
||||
static unsigned EA_100(void) { EO=(I.regs.w[BW]+I.regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_101(void) { EO=(I.regs.w[BW]+I.regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_102(void) { EO=(I.regs.w[BP]+I.regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_103(void) { EO=(I.regs.w[BP]+I.regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_104(void) { EO=(I.regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_105(void) { EO=(I.regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_106(void) { EO=(I.regs.w[BP]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_107(void) { EO=(I.regs.w[BW]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_100(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_101(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_102(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_103(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_104(nec_state_t *nec_state) { EO=(nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_105(nec_state_t *nec_state) { EO=(nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_106(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_107(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
|
||||
|
||||
static unsigned EA_200(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BW]+I.regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_201(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BW]+I.regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_202(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BP]+I.regs.w[IX]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_203(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BP]+I.regs.w[IY]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_204(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_205(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_206(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BP]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_207(void) { E16=FETCH(); E16+=FETCH()<<8; EO=I.regs.w[BW]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_200(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_201(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_202(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_203(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_204(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_205(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
static unsigned EA_206(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
|
||||
static unsigned EA_207(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
|
||||
|
||||
static unsigned (*const GetEA[192])(void)={
|
||||
static unsigned (*const GetEA[192])(nec_state_t *)={
|
||||
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
|
||||
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
|
||||
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
|
||||
|
||||
@ -1,253 +1,253 @@
|
||||
static void i_add_br8(void);
|
||||
static void i_add_wr16(void);
|
||||
static void i_add_r8b(void);
|
||||
static void i_add_r16w(void);
|
||||
static void i_add_ald8(void);
|
||||
static void i_add_axd16(void);
|
||||
static void i_push_es(void);
|
||||
static void i_pop_es(void);
|
||||
static void i_or_br8(void);
|
||||
static void i_or_r8b(void);
|
||||
static void i_or_wr16(void);
|
||||
static void i_or_r16w(void);
|
||||
static void i_or_ald8(void);
|
||||
static void i_or_axd16(void);
|
||||
static void i_push_cs(void);
|
||||
static void i_pre_nec(void);
|
||||
static void i_adc_br8(void);
|
||||
static void i_adc_wr16(void);
|
||||
static void i_adc_r8b(void);
|
||||
static void i_adc_r16w(void);
|
||||
static void i_adc_ald8(void);
|
||||
static void i_adc_axd16(void);
|
||||
static void i_push_ss(void);
|
||||
static void i_pop_ss(void);
|
||||
static void i_sbb_br8(void);
|
||||
static void i_sbb_wr16(void);
|
||||
static void i_sbb_r8b(void);
|
||||
static void i_sbb_r16w(void);
|
||||
static void i_sbb_ald8(void);
|
||||
static void i_sbb_axd16(void);
|
||||
static void i_push_ds(void);
|
||||
static void i_pop_ds(void);
|
||||
static void i_and_br8(void);
|
||||
static void i_and_r8b(void);
|
||||
static void i_and_wr16(void);
|
||||
static void i_and_r16w(void);
|
||||
static void i_and_ald8(void);
|
||||
static void i_and_axd16(void);
|
||||
static void i_es(void);
|
||||
static void i_daa(void);
|
||||
static void i_sub_br8(void);
|
||||
static void i_sub_wr16(void);
|
||||
static void i_sub_r8b(void);
|
||||
static void i_sub_r16w(void);
|
||||
static void i_sub_ald8(void);
|
||||
static void i_sub_axd16(void);
|
||||
static void i_cs(void);
|
||||
static void i_das(void);
|
||||
static void i_xor_br8(void);
|
||||
static void i_xor_r8b(void);
|
||||
static void i_xor_wr16(void);
|
||||
static void i_xor_r16w(void);
|
||||
static void i_xor_ald8(void);
|
||||
static void i_xor_axd16(void);
|
||||
static void i_ss(void);
|
||||
static void i_aaa(void);
|
||||
static void i_cmp_br8(void);
|
||||
static void i_cmp_wr16(void);
|
||||
static void i_cmp_r8b(void);
|
||||
static void i_cmp_r16w(void);
|
||||
static void i_cmp_ald8(void);
|
||||
static void i_cmp_axd16(void);
|
||||
static void i_ds(void);
|
||||
static void i_aas(void);
|
||||
static void i_inc_ax(void);
|
||||
static void i_inc_cx(void);
|
||||
static void i_inc_dx(void);
|
||||
static void i_inc_bx(void);
|
||||
static void i_inc_sp(void);
|
||||
static void i_inc_bp(void);
|
||||
static void i_inc_si(void);
|
||||
static void i_inc_di(void);
|
||||
static void i_dec_ax(void);
|
||||
static void i_dec_cx(void);
|
||||
static void i_dec_dx(void);
|
||||
static void i_dec_bx(void);
|
||||
static void i_dec_sp(void);
|
||||
static void i_dec_bp(void);
|
||||
static void i_dec_si(void);
|
||||
static void i_dec_di(void);
|
||||
static void i_push_ax(void);
|
||||
static void i_push_cx(void);
|
||||
static void i_push_dx(void);
|
||||
static void i_push_bx(void);
|
||||
static void i_push_sp(void);
|
||||
static void i_push_bp(void);
|
||||
static void i_push_si(void);
|
||||
static void i_push_di(void);
|
||||
static void i_pop_ax(void);
|
||||
static void i_pop_cx(void);
|
||||
static void i_pop_dx(void);
|
||||
static void i_pop_bx(void);
|
||||
static void i_pop_sp(void);
|
||||
static void i_pop_bp(void);
|
||||
static void i_pop_si(void);
|
||||
static void i_pop_di(void);
|
||||
static void i_pusha(void);
|
||||
static void i_popa(void);
|
||||
static void i_chkind(void);
|
||||
static void i_brkn(void);
|
||||
static void i_repnc(void);
|
||||
static void i_repc(void);
|
||||
static void i_push_d16(void);
|
||||
static void i_imul_d16(void);
|
||||
static void i_push_d8(void);
|
||||
static void i_imul_d8(void);
|
||||
static void i_insb(void);
|
||||
static void i_insw(void);
|
||||
static void i_outsb(void);
|
||||
static void i_outsw(void);
|
||||
static void i_jo(void);
|
||||
static void i_jno(void);
|
||||
static void i_jc(void);
|
||||
static void i_jnc(void);
|
||||
static void i_jz(void);
|
||||
static void i_jnz(void);
|
||||
static void i_jce(void);
|
||||
static void i_jnce(void);
|
||||
static void i_js(void);
|
||||
static void i_jns(void);
|
||||
static void i_jp(void);
|
||||
static void i_jnp(void);
|
||||
static void i_jl(void);
|
||||
static void i_jnl(void);
|
||||
static void i_jle(void);
|
||||
static void i_jnle(void);
|
||||
static void i_80pre(void);
|
||||
static void i_82pre(void);
|
||||
static void i_81pre(void);
|
||||
static void i_83pre(void);
|
||||
static void i_test_br8(void);
|
||||
static void i_test_wr16(void);
|
||||
static void i_xchg_br8(void);
|
||||
static void i_xchg_wr16(void);
|
||||
static void i_mov_br8(void);
|
||||
static void i_mov_r8b(void);
|
||||
static void i_mov_wr16(void);
|
||||
static void i_mov_r16w(void);
|
||||
static void i_mov_wsreg(void);
|
||||
static void i_lea(void);
|
||||
static void i_mov_sregw(void);
|
||||
static void i_invalid(void);
|
||||
static void i_popw(void);
|
||||
static void i_nop(void);
|
||||
static void i_xchg_axcx(void);
|
||||
static void i_xchg_axdx(void);
|
||||
static void i_xchg_axbx(void);
|
||||
static void i_xchg_axsp(void);
|
||||
static void i_xchg_axbp(void);
|
||||
static void i_xchg_axsi(void);
|
||||
static void i_xchg_axdi(void);
|
||||
static void i_cbw(void);
|
||||
static void i_cwd(void);
|
||||
static void i_call_far(void);
|
||||
static void i_pushf(void);
|
||||
static void i_popf(void);
|
||||
static void i_sahf(void);
|
||||
static void i_lahf(void);
|
||||
static void i_mov_aldisp(void);
|
||||
static void i_mov_axdisp(void);
|
||||
static void i_mov_dispal(void);
|
||||
static void i_mov_dispax(void);
|
||||
static void i_movsb(void);
|
||||
static void i_movsw(void);
|
||||
static void i_cmpsb(void);
|
||||
static void i_cmpsw(void);
|
||||
static void i_test_ald8(void);
|
||||
static void i_test_axd16(void);
|
||||
static void i_stosb(void);
|
||||
static void i_stosw(void);
|
||||
static void i_lodsb(void);
|
||||
static void i_lodsw(void);
|
||||
static void i_scasb(void);
|
||||
static void i_scasw(void);
|
||||
static void i_mov_ald8(void);
|
||||
static void i_mov_cld8(void);
|
||||
static void i_mov_dld8(void);
|
||||
static void i_mov_bld8(void);
|
||||
static void i_mov_ahd8(void);
|
||||
static void i_mov_chd8(void);
|
||||
static void i_mov_dhd8(void);
|
||||
static void i_mov_bhd8(void);
|
||||
static void i_mov_axd16(void);
|
||||
static void i_mov_cxd16(void);
|
||||
static void i_mov_dxd16(void);
|
||||
static void i_mov_bxd16(void);
|
||||
static void i_mov_spd16(void);
|
||||
static void i_mov_bpd16(void);
|
||||
static void i_mov_sid16(void);
|
||||
static void i_mov_did16(void);
|
||||
static void i_rotshft_bd8(void);
|
||||
static void i_rotshft_wd8(void);
|
||||
static void i_ret_d16(void);
|
||||
static void i_ret(void);
|
||||
static void i_les_dw(void);
|
||||
static void i_lds_dw(void);
|
||||
static void i_mov_bd8(void);
|
||||
static void i_mov_wd16(void);
|
||||
static void i_enter(void);
|
||||
static void i_leave(void);
|
||||
static void i_retf_d16(void);
|
||||
static void i_retf(void);
|
||||
static void i_int3(void);
|
||||
static void i_int(void);
|
||||
static void i_into(void);
|
||||
static void i_iret(void);
|
||||
static void i_rotshft_b(void);
|
||||
static void i_rotshft_w(void);
|
||||
static void i_rotshft_bcl(void);
|
||||
static void i_rotshft_wcl(void);
|
||||
static void i_aam(void);
|
||||
static void i_aad(void);
|
||||
static void i_setalc(void);
|
||||
static void i_trans(void);
|
||||
static void i_fpo(void);
|
||||
static void i_loopne(void);
|
||||
static void i_loope(void);
|
||||
static void i_loop(void);
|
||||
static void i_jcxz(void);
|
||||
static void i_inal(void);
|
||||
static void i_inax(void);
|
||||
static void i_outal(void);
|
||||
static void i_outax(void);
|
||||
static void i_call_d16(void);
|
||||
static void i_jmp_d16(void);
|
||||
static void i_jmp_far(void);
|
||||
static void i_jmp_d8(void);
|
||||
static void i_inaldx(void);
|
||||
static void i_inaxdx(void);
|
||||
static void i_outdxal(void);
|
||||
static void i_outdxax(void);
|
||||
static void i_lock(void);
|
||||
static void i_repne(void);
|
||||
static void i_repe(void);
|
||||
static void i_hlt(void);
|
||||
static void i_cmc(void);
|
||||
static void i_f6pre(void);
|
||||
static void i_f7pre(void);
|
||||
static void i_clc(void);
|
||||
static void i_stc(void);
|
||||
static void i_di(void);
|
||||
static void i_ei(void);
|
||||
static void i_cld(void);
|
||||
static void i_std(void);
|
||||
static void i_fepre(void);
|
||||
static void i_ffpre(void);
|
||||
static void i_add_br8(nec_state_t *nec_state);
|
||||
static void i_add_wr16(nec_state_t *nec_state);
|
||||
static void i_add_r8b(nec_state_t *nec_state);
|
||||
static void i_add_r16w(nec_state_t *nec_state);
|
||||
static void i_add_ald8(nec_state_t *nec_state);
|
||||
static void i_add_axd16(nec_state_t *nec_state);
|
||||
static void i_push_es(nec_state_t *nec_state);
|
||||
static void i_pop_es(nec_state_t *nec_state);
|
||||
static void i_or_br8(nec_state_t *nec_state);
|
||||
static void i_or_r8b(nec_state_t *nec_state);
|
||||
static void i_or_wr16(nec_state_t *nec_state);
|
||||
static void i_or_r16w(nec_state_t *nec_state);
|
||||
static void i_or_ald8(nec_state_t *nec_state);
|
||||
static void i_or_axd16(nec_state_t *nec_state);
|
||||
static void i_push_cs(nec_state_t *nec_state);
|
||||
static void i_pre_nec(nec_state_t *nec_state);
|
||||
static void i_adc_br8(nec_state_t *nec_state);
|
||||
static void i_adc_wr16(nec_state_t *nec_state);
|
||||
static void i_adc_r8b(nec_state_t *nec_state);
|
||||
static void i_adc_r16w(nec_state_t *nec_state);
|
||||
static void i_adc_ald8(nec_state_t *nec_state);
|
||||
static void i_adc_axd16(nec_state_t *nec_state);
|
||||
static void i_push_ss(nec_state_t *nec_state);
|
||||
static void i_pop_ss(nec_state_t *nec_state);
|
||||
static void i_sbb_br8(nec_state_t *nec_state);
|
||||
static void i_sbb_wr16(nec_state_t *nec_state);
|
||||
static void i_sbb_r8b(nec_state_t *nec_state);
|
||||
static void i_sbb_r16w(nec_state_t *nec_state);
|
||||
static void i_sbb_ald8(nec_state_t *nec_state);
|
||||
static void i_sbb_axd16(nec_state_t *nec_state);
|
||||
static void i_push_ds(nec_state_t *nec_state);
|
||||
static void i_pop_ds(nec_state_t *nec_state);
|
||||
static void i_and_br8(nec_state_t *nec_state);
|
||||
static void i_and_r8b(nec_state_t *nec_state);
|
||||
static void i_and_wr16(nec_state_t *nec_state);
|
||||
static void i_and_r16w(nec_state_t *nec_state);
|
||||
static void i_and_ald8(nec_state_t *nec_state);
|
||||
static void i_and_axd16(nec_state_t *nec_state);
|
||||
static void i_es(nec_state_t *nec_state);
|
||||
static void i_daa(nec_state_t *nec_state);
|
||||
static void i_sub_br8(nec_state_t *nec_state);
|
||||
static void i_sub_wr16(nec_state_t *nec_state);
|
||||
static void i_sub_r8b(nec_state_t *nec_state);
|
||||
static void i_sub_r16w(nec_state_t *nec_state);
|
||||
static void i_sub_ald8(nec_state_t *nec_state);
|
||||
static void i_sub_axd16(nec_state_t *nec_state);
|
||||
static void i_cs(nec_state_t *nec_state);
|
||||
static void i_das(nec_state_t *nec_state);
|
||||
static void i_xor_br8(nec_state_t *nec_state);
|
||||
static void i_xor_r8b(nec_state_t *nec_state);
|
||||
static void i_xor_wr16(nec_state_t *nec_state);
|
||||
static void i_xor_r16w(nec_state_t *nec_state);
|
||||
static void i_xor_ald8(nec_state_t *nec_state);
|
||||
static void i_xor_axd16(nec_state_t *nec_state);
|
||||
static void i_ss(nec_state_t *nec_state);
|
||||
static void i_aaa(nec_state_t *nec_state);
|
||||
static void i_cmp_br8(nec_state_t *nec_state);
|
||||
static void i_cmp_wr16(nec_state_t *nec_state);
|
||||
static void i_cmp_r8b(nec_state_t *nec_state);
|
||||
static void i_cmp_r16w(nec_state_t *nec_state);
|
||||
static void i_cmp_ald8(nec_state_t *nec_state);
|
||||
static void i_cmp_axd16(nec_state_t *nec_state);
|
||||
static void i_ds(nec_state_t *nec_state);
|
||||
static void i_aas(nec_state_t *nec_state);
|
||||
static void i_inc_ax(nec_state_t *nec_state);
|
||||
static void i_inc_cx(nec_state_t *nec_state);
|
||||
static void i_inc_dx(nec_state_t *nec_state);
|
||||
static void i_inc_bx(nec_state_t *nec_state);
|
||||
static void i_inc_sp(nec_state_t *nec_state);
|
||||
static void i_inc_bp(nec_state_t *nec_state);
|
||||
static void i_inc_si(nec_state_t *nec_state);
|
||||
static void i_inc_di(nec_state_t *nec_state);
|
||||
static void i_dec_ax(nec_state_t *nec_state);
|
||||
static void i_dec_cx(nec_state_t *nec_state);
|
||||
static void i_dec_dx(nec_state_t *nec_state);
|
||||
static void i_dec_bx(nec_state_t *nec_state);
|
||||
static void i_dec_sp(nec_state_t *nec_state);
|
||||
static void i_dec_bp(nec_state_t *nec_state);
|
||||
static void i_dec_si(nec_state_t *nec_state);
|
||||
static void i_dec_di(nec_state_t *nec_state);
|
||||
static void i_push_ax(nec_state_t *nec_state);
|
||||
static void i_push_cx(nec_state_t *nec_state);
|
||||
static void i_push_dx(nec_state_t *nec_state);
|
||||
static void i_push_bx(nec_state_t *nec_state);
|
||||
static void i_push_sp(nec_state_t *nec_state);
|
||||
static void i_push_bp(nec_state_t *nec_state);
|
||||
static void i_push_si(nec_state_t *nec_state);
|
||||
static void i_push_di(nec_state_t *nec_state);
|
||||
static void i_pop_ax(nec_state_t *nec_state);
|
||||
static void i_pop_cx(nec_state_t *nec_state);
|
||||
static void i_pop_dx(nec_state_t *nec_state);
|
||||
static void i_pop_bx(nec_state_t *nec_state);
|
||||
static void i_pop_sp(nec_state_t *nec_state);
|
||||
static void i_pop_bp(nec_state_t *nec_state);
|
||||
static void i_pop_si(nec_state_t *nec_state);
|
||||
static void i_pop_di(nec_state_t *nec_state);
|
||||
static void i_pusha(nec_state_t *nec_state);
|
||||
static void i_popa(nec_state_t *nec_state);
|
||||
static void i_chkind(nec_state_t *nec_state);
|
||||
static void i_brkn(nec_state_t *nec_state);
|
||||
static void i_repnc(nec_state_t *nec_state);
|
||||
static void i_repc(nec_state_t *nec_state);
|
||||
static void i_push_d16(nec_state_t *nec_state);
|
||||
static void i_imul_d16(nec_state_t *nec_state);
|
||||
static void i_push_d8(nec_state_t *nec_state);
|
||||
static void i_imul_d8(nec_state_t *nec_state);
|
||||
static void i_insb(nec_state_t *nec_state);
|
||||
static void i_insw(nec_state_t *nec_state);
|
||||
static void i_outsb(nec_state_t *nec_state);
|
||||
static void i_outsw(nec_state_t *nec_state);
|
||||
static void i_jo(nec_state_t *nec_state);
|
||||
static void i_jno(nec_state_t *nec_state);
|
||||
static void i_jc(nec_state_t *nec_state);
|
||||
static void i_jnc(nec_state_t *nec_state);
|
||||
static void i_jz(nec_state_t *nec_state);
|
||||
static void i_jnz(nec_state_t *nec_state);
|
||||
static void i_jce(nec_state_t *nec_state);
|
||||
static void i_jnce(nec_state_t *nec_state);
|
||||
static void i_js(nec_state_t *nec_state);
|
||||
static void i_jns(nec_state_t *nec_state);
|
||||
static void i_jp(nec_state_t *nec_state);
|
||||
static void i_jnp(nec_state_t *nec_state);
|
||||
static void i_jl(nec_state_t *nec_state);
|
||||
static void i_jnl(nec_state_t *nec_state);
|
||||
static void i_jle(nec_state_t *nec_state);
|
||||
static void i_jnle(nec_state_t *nec_state);
|
||||
static void i_80pre(nec_state_t *nec_state);
|
||||
static void i_82pre(nec_state_t *nec_state);
|
||||
static void i_81pre(nec_state_t *nec_state);
|
||||
static void i_83pre(nec_state_t *nec_state);
|
||||
static void i_test_br8(nec_state_t *nec_state);
|
||||
static void i_test_wr16(nec_state_t *nec_state);
|
||||
static void i_xchg_br8(nec_state_t *nec_state);
|
||||
static void i_xchg_wr16(nec_state_t *nec_state);
|
||||
static void i_mov_br8(nec_state_t *nec_state);
|
||||
static void i_mov_r8b(nec_state_t *nec_state);
|
||||
static void i_mov_wr16(nec_state_t *nec_state);
|
||||
static void i_mov_r16w(nec_state_t *nec_state);
|
||||
static void i_mov_wsreg(nec_state_t *nec_state);
|
||||
static void i_lea(nec_state_t *nec_state);
|
||||
static void i_mov_sregw(nec_state_t *nec_state);
|
||||
static void i_invalid(nec_state_t *nec_state);
|
||||
static void i_popw(nec_state_t *nec_state);
|
||||
static void i_nop(nec_state_t *nec_state);
|
||||
static void i_xchg_axcx(nec_state_t *nec_state);
|
||||
static void i_xchg_axdx(nec_state_t *nec_state);
|
||||
static void i_xchg_axbx(nec_state_t *nec_state);
|
||||
static void i_xchg_axsp(nec_state_t *nec_state);
|
||||
static void i_xchg_axbp(nec_state_t *nec_state);
|
||||
static void i_xchg_axsi(nec_state_t *nec_state);
|
||||
static void i_xchg_axdi(nec_state_t *nec_state);
|
||||
static void i_cbw(nec_state_t *nec_state);
|
||||
static void i_cwd(nec_state_t *nec_state);
|
||||
static void i_call_far(nec_state_t *nec_state);
|
||||
static void i_pushf(nec_state_t *nec_state);
|
||||
static void i_popf(nec_state_t *nec_state);
|
||||
static void i_sahf(nec_state_t *nec_state);
|
||||
static void i_lahf(nec_state_t *nec_state);
|
||||
static void i_mov_aldisp(nec_state_t *nec_state);
|
||||
static void i_mov_axdisp(nec_state_t *nec_state);
|
||||
static void i_mov_dispal(nec_state_t *nec_state);
|
||||
static void i_mov_dispax(nec_state_t *nec_state);
|
||||
static void i_movsb(nec_state_t *nec_state);
|
||||
static void i_movsw(nec_state_t *nec_state);
|
||||
static void i_cmpsb(nec_state_t *nec_state);
|
||||
static void i_cmpsw(nec_state_t *nec_state);
|
||||
static void i_test_ald8(nec_state_t *nec_state);
|
||||
static void i_test_axd16(nec_state_t *nec_state);
|
||||
static void i_stosb(nec_state_t *nec_state);
|
||||
static void i_stosw(nec_state_t *nec_state);
|
||||
static void i_lodsb(nec_state_t *nec_state);
|
||||
static void i_lodsw(nec_state_t *nec_state);
|
||||
static void i_scasb(nec_state_t *nec_state);
|
||||
static void i_scasw(nec_state_t *nec_state);
|
||||
static void i_mov_ald8(nec_state_t *nec_state);
|
||||
static void i_mov_cld8(nec_state_t *nec_state);
|
||||
static void i_mov_dld8(nec_state_t *nec_state);
|
||||
static void i_mov_bld8(nec_state_t *nec_state);
|
||||
static void i_mov_ahd8(nec_state_t *nec_state);
|
||||
static void i_mov_chd8(nec_state_t *nec_state);
|
||||
static void i_mov_dhd8(nec_state_t *nec_state);
|
||||
static void i_mov_bhd8(nec_state_t *nec_state);
|
||||
static void i_mov_axd16(nec_state_t *nec_state);
|
||||
static void i_mov_cxd16(nec_state_t *nec_state);
|
||||
static void i_mov_dxd16(nec_state_t *nec_state);
|
||||
static void i_mov_bxd16(nec_state_t *nec_state);
|
||||
static void i_mov_spd16(nec_state_t *nec_state);
|
||||
static void i_mov_bpd16(nec_state_t *nec_state);
|
||||
static void i_mov_sid16(nec_state_t *nec_state);
|
||||
static void i_mov_did16(nec_state_t *nec_state);
|
||||
static void i_rotshft_bd8(nec_state_t *nec_state);
|
||||
static void i_rotshft_wd8(nec_state_t *nec_state);
|
||||
static void i_ret_d16(nec_state_t *nec_state);
|
||||
static void i_ret(nec_state_t *nec_state);
|
||||
static void i_les_dw(nec_state_t *nec_state);
|
||||
static void i_lds_dw(nec_state_t *nec_state);
|
||||
static void i_mov_bd8(nec_state_t *nec_state);
|
||||
static void i_mov_wd16(nec_state_t *nec_state);
|
||||
static void i_enter(nec_state_t *nec_state);
|
||||
static void i_leave(nec_state_t *nec_state);
|
||||
static void i_retf_d16(nec_state_t *nec_state);
|
||||
static void i_retf(nec_state_t *nec_state);
|
||||
static void i_int3(nec_state_t *nec_state);
|
||||
static void i_int(nec_state_t *nec_state);
|
||||
static void i_into(nec_state_t *nec_state);
|
||||
static void i_iret(nec_state_t *nec_state);
|
||||
static void i_rotshft_b(nec_state_t *nec_state);
|
||||
static void i_rotshft_w(nec_state_t *nec_state);
|
||||
static void i_rotshft_bcl(nec_state_t *nec_state);
|
||||
static void i_rotshft_wcl(nec_state_t *nec_state);
|
||||
static void i_aam(nec_state_t *nec_state);
|
||||
static void i_aad(nec_state_t *nec_state);
|
||||
static void i_setalc(nec_state_t *nec_state);
|
||||
static void i_trans(nec_state_t *nec_state);
|
||||
static void i_fpo(nec_state_t *nec_state);
|
||||
static void i_loopne(nec_state_t *nec_state);
|
||||
static void i_loope(nec_state_t *nec_state);
|
||||
static void i_loop(nec_state_t *nec_state);
|
||||
static void i_jcxz(nec_state_t *nec_state);
|
||||
static void i_inal(nec_state_t *nec_state);
|
||||
static void i_inax(nec_state_t *nec_state);
|
||||
static void i_outal(nec_state_t *nec_state);
|
||||
static void i_outax(nec_state_t *nec_state);
|
||||
static void i_call_d16(nec_state_t *nec_state);
|
||||
static void i_jmp_d16(nec_state_t *nec_state);
|
||||
static void i_jmp_far(nec_state_t *nec_state);
|
||||
static void i_jmp_d8(nec_state_t *nec_state);
|
||||
static void i_inaldx(nec_state_t *nec_state);
|
||||
static void i_inaxdx(nec_state_t *nec_state);
|
||||
static void i_outdxal(nec_state_t *nec_state);
|
||||
static void i_outdxax(nec_state_t *nec_state);
|
||||
static void i_lock(nec_state_t *nec_state);
|
||||
static void i_repne(nec_state_t *nec_state);
|
||||
static void i_repe(nec_state_t *nec_state);
|
||||
static void i_hlt(nec_state_t *nec_state);
|
||||
static void i_cmc(nec_state_t *nec_state);
|
||||
static void i_f6pre(nec_state_t *nec_state);
|
||||
static void i_f7pre(nec_state_t *nec_state);
|
||||
static void i_clc(nec_state_t *nec_state);
|
||||
static void i_stc(nec_state_t *nec_state);
|
||||
static void i_di(nec_state_t *nec_state);
|
||||
static void i_ei(nec_state_t *nec_state);
|
||||
static void i_cld(nec_state_t *nec_state);
|
||||
static void i_std(nec_state_t *nec_state);
|
||||
static void i_fepre(nec_state_t *nec_state);
|
||||
static void i_ffpre(nec_state_t *nec_state);
|
||||
|
||||
static void i_wait(void);
|
||||
static void i_wait(nec_state_t *nec_state);
|
||||
|
||||
static void (*const nec_instruction[256])(void) =
|
||||
static void (*const nec_instruction[256])(nec_state_t *nec_state) =
|
||||
{
|
||||
i_add_br8, /* 0x00 */
|
||||
i_add_wr16, /* 0x01 */
|
||||
|
||||
@ -9,15 +9,15 @@ static struct {
|
||||
} RM;
|
||||
} Mod_RM;
|
||||
|
||||
#define RegWord(ModRM) I.regs.w[Mod_RM.reg.w[ModRM]]
|
||||
#define RegByte(ModRM) I.regs.b[Mod_RM.reg.b[ModRM]]
|
||||
#define RegWord(ModRM) nec_state->regs.w[Mod_RM.reg.w[ModRM]]
|
||||
#define RegByte(ModRM) nec_state->regs.b[Mod_RM.reg.b[ModRM]]
|
||||
|
||||
#define GetRMWord(ModRM) \
|
||||
((ModRM) >= 0xc0 ? I.regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(), read_word( EA ) ))
|
||||
((ModRM) >= 0xc0 ? nec_state->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(nec_state), read_word( EA ) ))
|
||||
|
||||
#define PutbackRMWord(ModRM,val) \
|
||||
{ \
|
||||
if (ModRM >= 0xc0) I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
|
||||
if (ModRM >= 0xc0) nec_state->regs.w[Mod_RM.RM.w[ModRM]]=val; \
|
||||
else write_word(EA,val); \
|
||||
}
|
||||
|
||||
@ -26,9 +26,9 @@ static struct {
|
||||
#define PutRMWord(ModRM,val) \
|
||||
{ \
|
||||
if (ModRM >= 0xc0) \
|
||||
I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
|
||||
nec_state->regs.w[Mod_RM.RM.w[ModRM]]=val; \
|
||||
else { \
|
||||
(*GetEA[ModRM])(); \
|
||||
(*GetEA[ModRM])(nec_state); \
|
||||
write_word( EA ,val); \
|
||||
} \
|
||||
}
|
||||
@ -37,31 +37,31 @@ static struct {
|
||||
{ \
|
||||
WORD val; \
|
||||
if (ModRM >= 0xc0) \
|
||||
I.regs.w[Mod_RM.RM.w[ModRM]] = FETCHWORD(); \
|
||||
nec_state->regs.w[Mod_RM.RM.w[ModRM]] = FETCHWORD(); \
|
||||
else { \
|
||||
(*GetEA[ModRM])(); \
|
||||
(*GetEA[ModRM])(nec_state); \
|
||||
val = FETCHWORD(); \
|
||||
write_word( EA , val); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define GetRMByte(ModRM) \
|
||||
((ModRM) >= 0xc0 ? I.regs.b[Mod_RM.RM.b[ModRM]] : read_byte( (*GetEA[ModRM])() ))
|
||||
((ModRM) >= 0xc0 ? nec_state->regs.b[Mod_RM.RM.b[ModRM]] : read_byte( (*GetEA[ModRM])(nec_state) ))
|
||||
|
||||
#define PutRMByte(ModRM,val) \
|
||||
{ \
|
||||
if (ModRM >= 0xc0) \
|
||||
I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
|
||||
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=val; \
|
||||
else \
|
||||
write_byte( (*GetEA[ModRM])() ,val); \
|
||||
write_byte( (*GetEA[ModRM])(nec_state) ,val); \
|
||||
}
|
||||
|
||||
#define PutImmRMByte(ModRM) \
|
||||
{ \
|
||||
if (ModRM >= 0xc0) \
|
||||
I.regs.b[Mod_RM.RM.b[ModRM]]=FETCH(); \
|
||||
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=FETCH(); \
|
||||
else { \
|
||||
(*GetEA[ModRM])(); \
|
||||
(*GetEA[ModRM])(nec_state); \
|
||||
write_byte( EA , FETCH() ); \
|
||||
} \
|
||||
}
|
||||
@ -69,7 +69,7 @@ static struct {
|
||||
#define PutbackRMByte(ModRM,val) \
|
||||
{ \
|
||||
if (ModRM >= 0xc0) \
|
||||
I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
|
||||
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=val; \
|
||||
else \
|
||||
write_byte(EA,val); \
|
||||
}
|
||||
@ -96,9 +96,9 @@ static struct {
|
||||
|
||||
#define DEF_ald8 \
|
||||
UINT32 src = FETCH(); \
|
||||
UINT32 dst = I.regs.b[AL]
|
||||
UINT32 dst = nec_state->regs.b[AL]
|
||||
|
||||
#define DEF_axd16 \
|
||||
UINT32 src = FETCH(); \
|
||||
UINT32 dst = I.regs.w[AW]; \
|
||||
UINT32 dst = nec_state->regs.w[AW]; \
|
||||
src += (FETCH() << 8)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user