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powerpc: Minor disassembly improvements

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- Support over & out debugging flags for a few more instructions
- Provide special operand format for POWER svc instruction
This commit is contained in:
AJR 2023-03-30 22:30:08 -04:00
parent a738dc0739
commit a104f5f494
2 changed files with 17 additions and 5 deletions
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19
src/devices/cpu/powerpc/ppc_dasm.cpp
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@ -238,9 +238,9 @@ const powerpc_disassembler::IDESCR powerpc_disassembler::itab[] =
{ "oris", D_OP(25), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0, I_POWERPC },
{ "oriu", D_OP(25), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0, I_POWER },
{ "rac", D_OP(31)|D_XO(818), M_RT|M_RA|M_RB|M_RC, F_RT_RA_0_RB, FL_RC, I_POWER },
{ "rfi", D_OP(19)|D_XO(50), 0, F_NONE, 0, I_COMMON },
{ "rfci", D_OP(19)|D_XO(51), 0, F_NONE, 0, I_POWERPC },
{ "rfsvc", D_OP(19)|D_XO(82), M_LK, F_NONE, FL_LK, I_POWER },
{ "rfi", D_OP(19)|D_XO(50), 0, F_NONE, FL_SO, I_COMMON },
{ "rfci", D_OP(19)|D_XO(51), 0, F_NONE, FL_SO, I_POWERPC },
{ "rfsvc", D_OP(19)|D_XO(82), M_LK, F_NONE, FL_LK|FL_SO, I_POWER },
{ "rlimi", D_OP(20), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC, I_POWER },
{ "rlinm", D_OP(21), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC, I_POWER },
{ "rlmi", D_OP(22), M_RT|M_RA|M_RB|M_MB|M_ME|M_RC, F_RA_RT_RB_MB_ME, FL_RC, I_POWER },
@ -319,7 +319,7 @@ const powerpc_disassembler::IDESCR powerpc_disassembler::itab[] =
{ "subfic", D_OP(8), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0, I_POWERPC },
{ "subfme", D_OP(31)|D_XO(232), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC, I_POWERPC },
{ "subfze", D_OP(31)|D_XO(200), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC, I_POWERPC },
{ "svc", D_OP(17)|2, M_BD|M_AA|M_LK, F_NONE, FL_AA|FL_LK, I_POWER }, // TODO: operands
{ "svc", D_OP(17)|2, M_BD|M_AA|M_LK, F_SC, FL_AA|FL_LK, I_POWER },
{ "sync", D_OP(31)|D_XO(598), 0, F_NONE, 0, I_POWERPC },
{ "t", D_OP(31)|D_XO(4), M_TO|M_RA|M_RB, F_TW, 0, I_POWER },
{ "ti", D_OP(3), M_TO|M_RA|M_SIMM, F_TWI, 0, I_POWER },
@ -1089,7 +1089,18 @@ offs_t powerpc_disassembler::dasm_one(std::ostream &stream, uint32_t pc, uint32_
oprs = util::string_format("%d,r%d,%s", G_TO(op), G_RA(op), signed16);
break;
case F_SC:
if (op & M_AA)
oprs = util::string_format("0x%04X", (op & 0x0000fffc) >> 2);
else
oprs = util::string_format("%d,%d,%d", (op & 0x00000fe0) >> 5, (op & 0x0000f000) >> 12, (op & 0x0000001c) >> 2);
break;
case F_NONE:
if ((op >> 26) == 17) // SC (PowerPC)
flags |= STEP_OVER;
[[fallthrough]];
default:
break;
}

3
src/devices/cpu/powerpc/ppc_dasm.h
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@ -102,7 +102,8 @@ private:
F_FRT_FRA_FRC, // frT, frA, frC
F_RA_RT_SH_MB_ME, // rA, rT, SH, MB, ME
F_RA_RT_RB_MB_ME, // rA, rT, rB, MB, ME
F_RT_RB // rT, rB
F_RT_RB, // rT, rB
F_SC // LEV, FL1, FL2 or SV only used by SVC (POWER)
};
/*