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https://github.com/holub/mame
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nec/pc80s31k.cpp: make pc88va2_fd_if a subdevice of pc80s31k
This commit is contained in:
angelosa
parent
2fb93dfbdc
commit
a14c9211af
@ -11,8 +11,14 @@
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Design is decidedly derived from Epson TF-20 and friends,
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cfr. devices/bus/epson_sio/tf20.cpp
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PC-80S32 is the external version of what PC-8801mkII uses built-in,
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capabilities are unknown at current time.
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Eventually internalized in later PC-88 models,
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Observed PCBs for internal boards are marked PWD-516 with a 8 digit revision number.
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For simpicity's sake we just name these board over host classes instead.
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TODO:
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- What's PC-80S32? Is it the 88VA version or a different beast?
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- PC=0x7dd reads from FDC bit 3 in ST3 (twosid_r fn),
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expecting a bit 3 high for all the PC8001 games otherwise keeps looping and eventually dies.
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Are those incorrectly identified as 2DD? Hacked to work for now;
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@ -32,6 +38,8 @@
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Bottom line: Is it trying to access some custom HW?
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- Hookup a bridge for internal BIOSes (later PC8801 models);
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- Save state support (resuming fails latch hookups here);
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- pc88va2_fd_if_device: currently not hooked up to pc88va2, deasserts DRQ too fast, sub CPU
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incorrectly tells to master that floppies aren't 2HD?
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===================================================================================================
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@ -157,6 +165,9 @@ Used as a communication protocol flags
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//#define VERBOSE 1
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#include "logmacro.h"
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#include "formats/pc98fdi_dsk.h"
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#include "formats/xdf_dsk.h"
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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@ -165,7 +176,7 @@ Used as a communication protocol flags
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// device type definition
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DEFINE_DEVICE_TYPE(PC80S31, pc80s31_device, "pc80s31", "NEC PC-80S31 Mini Disk Unit I/F")
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DEFINE_DEVICE_TYPE(PC80S31K, pc80s31k_device, "pc80s31k", "NEC PC-80S31K Mini Disk Unit I/F")
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DEFINE_DEVICE_TYPE(PC88VA2_FD_IF, pc88va2_fd_if_device, "pc88va2_fd_if", "NEC PC-88VA2 floppy disk interface \"PWD-516 72405162\"")
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//**************************************************************************
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// LIVE DEVICE
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@ -193,7 +204,6 @@ pc80s31_device::pc80s31_device(const machine_config &mconfig, device_type type,
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pc80s31_device::pc80s31_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pc80s31_device(mconfig, PC80S31, tag, owner, clock)
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{
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}
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ROM_START( pc80s31 )
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@ -247,6 +257,7 @@ void pc80s31_device::fdc_io(address_map &map)
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static void pc88_floppies(device_slot_interface &device)
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{
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// TODO: definitely not correct for base device
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// TODO: eventually needs inheriting for pc88va3 (2TD with 9.3 MB capacity)
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device.option_add("525hd", FLOPPY_525_HD);
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}
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@ -255,6 +266,14 @@ IRQ_CALLBACK_MEMBER(pc80s31_device::irq_cb)
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return m_irq_vector;
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}
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// need FDI and XDF for PC-88VA
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static void pc88_floppy_formats(format_registration &fr)
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{
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fr.add_mfm_containers();
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fr.add(FLOPPY_XDF_FORMAT);
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fr.add(FLOPPY_PC98FDI_FORMAT);
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}
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void pc80s31_device::device_add_mconfig(machine_config &config)
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{
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// TODO: confirm clock arrangement
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@ -269,7 +288,7 @@ void pc80s31_device::device_add_mconfig(machine_config &config)
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for (auto &floppy : m_floppy)
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{
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FLOPPY_CONNECTOR(config, floppy, pc88_floppies, "525hd", floppy_image_device::default_mfm_floppy_formats);
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FLOPPY_CONNECTOR(config, floppy, pc88_floppies, "525hd", pc88_floppy_formats);
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floppy->enable_sound(true);
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}
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@ -311,6 +330,7 @@ TIMER_CALLBACK_MEMBER(pc80s31_device::tc_zero_tick)
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// ST2 & 0x73
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// Data doesn't matter, it also seems to have some activity to the printer port
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// (debugging left on?)
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// Update: mostly fixed by separating upd765 irq types when the event above occurs.
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if ((u8)m_fdc_cpu->state_int(Z80_HALT) == 1)
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{
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logerror("%s: attempt to trigger TC while in HALT state (read ID copy protection warning)\n", machine().describe_context());
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@ -416,10 +436,13 @@ void pc80s31_device::motor_control_w(uint8_t data)
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//
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//**************************************************************************
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pc80s31k_device::pc80s31k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pc80s31_device(mconfig, PC80S31K, tag, owner, clock)
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{
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pc80s31k_device::pc80s31k_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: pc80s31_device(mconfig, type, tag, owner, clock)
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{}
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pc80s31k_device::pc80s31k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pc80s31k_device(mconfig, PC80S31K, tag, owner, clock)
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{
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}
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ROM_START( pc80s31k )
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@ -431,9 +454,6 @@ ROM_START( pc80s31k )
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ROMX_LOAD( "m2mr_disk.rom", 0x0000, 0x2000, CRC(2447516b) SHA1(1492116f15c426f9796dc2bb6fcccf2656c0ca75), ROM_BIOS(1) )
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ROM_SYSTEM_BIOS( 2, "mh", "MH disk BIOS" )
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ROMX_LOAD( "mh_disk.rom", 0x0000, 0x2000, CRC(a222ecf0) SHA1(79e9c0786a14142f7a83690bf41fb4f60c5c1004), ROM_BIOS(2) )
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// TODO: this may belong to PC-80S32
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ROM_SYSTEM_BIOS( 3, "88va", "PC88VA disk BIOS")
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ROMX_LOAD( "vasubsys.rom", 0x0000, 0x2000, CRC(08962850) SHA1(a9375aa480f85e1422a0e1385acb0ea170c5c2e0), ROM_BIOS(3) )
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ROM_END
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const tiny_rom_entry *pc80s31k_device::device_rom_region() const
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@ -459,3 +479,286 @@ void pc80s31k_device::fdc_io(address_map &map)
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map(0xf0, 0xf0).lw8(NAME([this] (u8 data) { m_irq_vector = data; }));
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map(0xf4, 0xf4).w(FUNC(pc80s31k_device::drive_mode_w));
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}
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//**************************************************************************
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//
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// PC-88VA2 internal board overrides
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//
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// FD-55GFR-351 disk drives
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//
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//**************************************************************************
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pc88va2_fd_if_device::pc88va2_fd_if_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pc80s31k_device(mconfig, PC88VA2_FD_IF, tag, owner, clock)
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, m_write_irq(*this)
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, m_write_drq(*this)
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{
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}
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ROM_START( pc88va2_fd_if )
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ROM_REGION( 0x2000, "fdc_rom", ROMREGION_ERASEFF )
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ROM_LOAD( "vasubsys.rom", 0x0000, 0x2000, CRC(08962850) SHA1(a9375aa480f85e1422a0e1385acb0ea170c5c2e0) )
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ROM_END
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const tiny_rom_entry *pc88va2_fd_if_device::device_rom_region() const
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{
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return ROM_NAME( pc88va2_fd_if );
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}
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void pc88va2_fd_if_device::device_add_mconfig(machine_config &config)
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{
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pc80s31k_device::device_add_mconfig(config);
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m_fdc->intrq_wr_callback().append([this](int state) { if(m_fdc_mode & 1) { m_write_irq(state); } });
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m_fdc->drq_wr_callback().set([this](int state) { printf("%d %d\n", m_fdc_mode, state); if(m_fdc_mode & 1) { m_write_drq(state); } });
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// m_fdc->set_ready_line_connected(false);
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}
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void pc88va2_fd_if_device::device_start()
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{
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pc80s31k_device::device_start();
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m_write_irq.resolve_safe();
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m_write_drq.resolve_safe();
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m_fdc_timer = timer_alloc(FUNC(pc88va2_fd_if_device::fdc_timer_cb), this);
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m_fdc_timer->adjust(attotime::never);
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m_motor_start_timer[0] = timer_alloc(FUNC(pc88va2_fd_if_device::motor_start_timer_cb<0>), this);
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m_motor_start_timer[1] = timer_alloc(FUNC(pc88va2_fd_if_device::motor_start_timer_cb<1>), this);
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m_motor_start_timer[0]->adjust(attotime::never);
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m_motor_start_timer[1]->adjust(attotime::never);
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floppy_image_device *floppy;
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floppy = m_floppy[0]->get_device();
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if(floppy)
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floppy->setup_ready_cb(floppy_image_device::ready_cb(&pc88va2_fd_if_device::fdc_update_ready, this));
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floppy = m_floppy[1]->get_device();
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if(floppy)
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floppy->setup_ready_cb(floppy_image_device::ready_cb(&pc88va2_fd_if_device::fdc_update_ready, this));
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}
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void pc88va2_fd_if_device::device_reset()
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{
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pc80s31k_device::device_reset();
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m_fdc_mode = 0;
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// m_fdc_irq_opcode = 0x00; //0x7f ld a,a !
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m_xtmask = false;
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m_dmae = false;
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}
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void pc88va2_fd_if_device::host_io(address_map &map)
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{
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map(0x00, 0x00).w(FUNC(pc88va2_fd_if_device::host_mode_w));
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map(0x02, 0x02).w(FUNC(pc88va2_fd_if_device::host_drive_rate_w));
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map(0x04, 0x04).w(FUNC(pc88va2_fd_if_device::host_motor_control_w));
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map(0x06, 0x06).rw(FUNC(pc88va2_fd_if_device::host_ready_r), FUNC(pc88va2_fd_if_device::host_fdc_control_w));
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map(0x08, 0x08).r(m_fdc, FUNC(upd765a_device::msr_r));
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map(0x0a, 0x0a).rw(m_fdc, FUNC(upd765a_device::fifo_r), FUNC(upd765a_device::fifo_w));
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}
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template <unsigned DriveN> TIMER_CALLBACK_MEMBER(pc88va2_fd_if_device::motor_start_timer_cb)
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{
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m_floppy[DriveN]->get_device()->mon_w(0);
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}
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TIMER_CALLBACK_MEMBER(pc88va2_fd_if_device::fdc_timer_cb)
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{
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if(m_xtmask)
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{
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m_write_irq(1);
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// m_write_irq(0);
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}
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}
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void pc88va2_fd_if_device::fdc_update_ready(floppy_image_device *, int)
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{
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if (!BIT(m_fdc_ctrl_2, 5))
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return;
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bool force_ready = bool(BIT(m_fdc_ctrl_2, 6));
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floppy_image_device *floppy0, *floppy1;
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floppy0 = m_floppy[0]->get_device();
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floppy1 = m_floppy[1]->get_device();
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if (!floppy0 && !floppy1)
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force_ready = false;
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//if(floppy && force_ready)
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// ready = floppy->ready_r();
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//if(floppy && force_ready)
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// ready = floppy->ready_r();
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LOG("Force ready signal %d\n", force_ready);
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if (force_ready)
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{
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m_fdc->set_ready_line_connected(false);
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m_fdc->ready_w(0);
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}
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else
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m_fdc->ready_w(1);
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}
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void pc88va2_fd_if_device::host_mode_w(u8 data)
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{
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m_fdc_mode = data & 1;
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LOG("$1b0 FDC op mode (%02x) %s mode\n"
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, data
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, m_fdc_mode ? "DMA" : "Intelligent (PIO)"
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);
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// m_fdc_cpu->set_input_line(INPUT_LINE_HALT, (m_fdc_mode) ? ASSERT_LINE : CLEAR_LINE);
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}
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/*
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* --x- ---- CLK: FDC clock selection (0) 4.8MHz (1) 8 MHz
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* ---x ---- DS1: Prohibition of the drive selection of FDC (0) Permission (1) Prohibition
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* ---- xx-- TD1/TD0: Drive 1/0 track density (0) 48 TPI (1) 96 TPI
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* ---- --xx RV1/RV0: Drive 1/0 mode selection (0) 2D and 2DD mode (1) 2HD mode
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*/
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void pc88va2_fd_if_device::host_drive_rate_w(u8 data)
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{
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const bool clk = bool(BIT(data, 5));
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const bool rv1 = bool(BIT(data, 1));
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const bool rv0 = bool(BIT(data, 0));
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LOG("$1b2 FDC control port 0 (%02x) %s CLK| %d DS1| %d%d TD1/TD0| %d%d RV1/RV0\n"
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, data
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, clk ? " 8 MHz" : "4.8 MHz"
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, !bool(BIT(data, 4))
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, bool(BIT(data, 3))
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, bool(BIT(data, 2))
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, rv1
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, rv0
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);
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m_floppy[0]->get_device()->set_rpm(rv0 ? 360 : 300);
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m_floppy[1]->get_device()->set_rpm(rv1 ? 360 : 300);
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//m_fdd[0]->get_device()->ds_w(!BIT(data, 4));
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//m_fdd[1]->get_device()->ds_w(!BIT(data, 4));
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// TODO: is this correct? sounds more like a controller clock change, while TD1/TD0 should do the rate change
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m_fdc->set_rate(clk ? 500000 : 250000);
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}
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/*
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* ---- x--- PCM: precompensation control (1) on
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* ---- --xx M1/M0: Drive 1/0 motor control (0) NOP (1) Change motor status
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*/
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void pc88va2_fd_if_device::host_motor_control_w(u8 data)
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{
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const bool m0 = bool(BIT(data, 0));
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const bool m1 = bool(BIT(data, 1));
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LOG("$1b4 FDC control port 1 (%02x) %d PCM| %d%d M1/M0\n"
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, data
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, bool(BIT(data, 3))
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, m1
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, m0
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);
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// TODO: fine grain motor timings
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// docs claims 600 msecs, must be more complex than that
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if( m0 )
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m_motor_start_timer[0]->adjust(attotime::from_msec(505));
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else
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m_floppy[0]->get_device()->mon_w(1);
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if( m1 )
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m_motor_start_timer[1]->adjust(attotime::from_msec(505));
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else
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m_floppy[1]->get_device()->mon_w(1);
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}
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/*
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* FDC control port 2
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* x--- ---- FDCRST: FDC Reset
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* -xx- ---- FDCFRY FRYCEN: FDC force ready control
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* -x0- ---- ignored
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* -01- ---- force ready release
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* -11- ---- force ready assert
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* ---x ---- DMAE: DMA Enable (0) Prohibit DMA (1) Enable DMA
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* ---- -x-- XTMASK: FDC timer IRQ mask (0) Disable (1) Enable
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* ---- ---x TTRG: FDC timer trigger (0) FDC timer clearing (1) FDC timer start
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*/
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void pc88va2_fd_if_device::host_fdc_control_w(u8 data)
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{
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const bool fdcrst = bool(BIT(data, 7));
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const bool ttrg = bool(BIT(data, 0));
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const bool cur_xtmask = bool(BIT(data, 2));
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const bool cur_dmae = bool(BIT(data, 4));
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LOG("$1b6 FDC control port 2 (%02x) %d FDCRST| %d%d FDCFRY| %d DMAE| %d XTMASK| %d TTRG\n"
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, data
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, fdcrst
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, bool(BIT(data, 6))
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, bool(BIT(data, 5))
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, cur_dmae
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, cur_xtmask
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, ttrg
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);
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if( ttrg )
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m_fdc_timer->adjust(attotime::from_msec(100));
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// if (cur_dmae && !m_dmae)
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{
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// m_fdc->set_ready_line_connected(0);
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// m_fdc->ready_w(0);
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}
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m_dmae = cur_dmae;
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// TODO: confirm condition
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// shanghai and famista (at very least) sends a motor off if left idle for a while,
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// then any attempt to load/save will fail because there's no explicit motor on
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// written back to $1b4.
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// Note that this still isn't enough to avoid floppy errors, but makes failures
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// to be eventually recoverable for now.
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if (!m_xtmask && cur_xtmask && ttrg)
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{
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floppy_image_device *floppy0, *floppy1;
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floppy0 = m_floppy[0]->get_device();
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floppy1 = m_floppy[1]->get_device();
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// TODO: check me out
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if (floppy0)
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if (m_floppy[0]->get_device()->mon_r() == 1)
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m_motor_start_timer[0]->adjust(attotime::from_msec(505));
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if (floppy1)
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if (m_floppy[1]->get_device()->mon_r() == 1)
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m_motor_start_timer[1]->adjust(attotime::from_msec(505));
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}
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m_xtmask = cur_xtmask;
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//if (!BIT(m_fdc_ctrl_2, 4) && BIT(data, 4))
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// m_maincpu->dreq_w<2>(1);
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//m_dmac->dreq2_w(1);
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// TODO: 0 -> 1 transition?
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if( fdcrst )
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m_fdc->reset();
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m_fdc_ctrl_2 = data;
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||||
|
||||
//m_fdd[0]->get_device()->mon_w(!(BIT(data, 5)));
|
||||
|
||||
// TODO: verify if this requires updating drive B: as well
|
||||
fdc_update_ready(nullptr, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* ---x ---- RDY: (0) Busy (1) Ready
|
||||
*/
|
||||
u8 pc88va2_fd_if_device::host_ready_r()
|
||||
{
|
||||
// TODO: easy to implement, but no SW accesses it so far
|
||||
if (!machine().side_effects_disabled())
|
||||
logerror("Unhandled read $1b6!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -47,8 +47,8 @@ protected:
|
||||
required_device_array<floppy_connector, 2> m_floppy;
|
||||
u8 m_irq_vector = 0;
|
||||
|
||||
private:
|
||||
required_device<z80_device> m_fdc_cpu;
|
||||
private:
|
||||
required_memory_region m_fdc_rom;
|
||||
required_device<i8255_device> m_ppi_host;
|
||||
required_device<i8255_device> m_ppi_fdc;
|
||||
@ -73,6 +73,8 @@ public:
|
||||
pc80s31k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
pc80s31k_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void fdc_io(address_map &map) override;
|
||||
|
||||
@ -80,8 +82,53 @@ private:
|
||||
void drive_mode_w(u8 data);
|
||||
};
|
||||
|
||||
class pc88va2_fd_if_device : public pc80s31k_device
|
||||
{
|
||||
public:
|
||||
pc88va2_fd_if_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
auto int_wr_callback() { return m_write_irq.bind(); }
|
||||
auto drq_wr_callback() { return m_write_drq.bind(); }
|
||||
|
||||
void host_io(address_map &map);
|
||||
|
||||
void tc_w(int state) { m_fdc->tc_w(state); }
|
||||
u8 dack_r() { return m_fdc->dma_r(); }
|
||||
void dack_w(u8 data) { m_fdc->dma_w(data); }
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
||||
private:
|
||||
devcb_write_line m_write_irq;
|
||||
devcb_write_line m_write_drq;
|
||||
|
||||
emu_timer *m_motor_start_timer[2]{};
|
||||
emu_timer *m_fdc_timer = nullptr;
|
||||
|
||||
template <unsigned DriveN> TIMER_CALLBACK_MEMBER(motor_start_timer_cb);
|
||||
TIMER_CALLBACK_MEMBER(fdc_timer_cb);
|
||||
|
||||
void fdc_update_ready(floppy_image_device *, int);
|
||||
|
||||
void host_mode_w(u8 data);
|
||||
void host_drive_rate_w(u8 data);
|
||||
void host_motor_control_w(u8 data);
|
||||
void host_fdc_control_w(u8 data);
|
||||
u8 host_ready_r();
|
||||
|
||||
u8 m_fdc_ctrl_2 = 0;
|
||||
u8 m_fdc_mode = 0;
|
||||
bool m_xtmask = false;
|
||||
bool m_dmae = false;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
DECLARE_DEVICE_TYPE(PC80S31, pc80s31_device)
|
||||
DECLARE_DEVICE_TYPE(PC80S31K, pc80s31k_device)
|
||||
DECLARE_DEVICE_TYPE(PC80S31, pc80s31_device)
|
||||
DECLARE_DEVICE_TYPE(PC80S31K, pc80s31k_device)
|
||||
DECLARE_DEVICE_TYPE(PC88VA2_FD_IF, pc88va2_fd_if_device)
|
||||
|
||||
#endif // MAME_MACHINE_PC80S31K_H
|
||||
|
||||
Loading…
Reference in New Issue
Block a user