From a154c0eb92377633d98bdb017d5645d8d79b55f5 Mon Sep 17 00:00:00 2001 From: "R. Belmont" Date: Thu, 27 Dec 2012 03:55:41 +0000 Subject: [PATCH] Preliminary support for M740 (M5074x/M5074x) CPU family [R. Belmont] --- .gitattributes | 4 ++ src/emu/cpu/cpu.mak | 11 +++- src/emu/cpu/m6502/dm740.lst | 18 ++++++ src/emu/cpu/m6502/m6502.c | 15 +++++ src/emu/cpu/m6502/m6502.h | 4 ++ src/emu/cpu/m6502/m740.c | 92 ++++++++++++++++++++++++++++++ src/emu/cpu/m6502/m740.h | 89 +++++++++++++++++++++++++++++ src/emu/cpu/m6502/om740.lst | 110 ++++++++++++++++++++++++++++++++++++ 8 files changed, 342 insertions(+), 1 deletion(-) create mode 100644 src/emu/cpu/m6502/dm740.lst create mode 100644 src/emu/cpu/m6502/m740.c create mode 100644 src/emu/cpu/m6502/m740.h create mode 100644 src/emu/cpu/m6502/om740.lst diff --git a/.gitattributes b/.gitattributes index 85999b1754c..8f2a6278ddf 100644 --- a/.gitattributes +++ b/.gitattributes @@ -499,6 +499,7 @@ src/emu/cpu/m6502/dm6509.lst svneol=native#text/plain src/emu/cpu/m6502/dm6510.lst svneol=native#text/plain src/emu/cpu/m6502/dm65c02.lst svneol=native#text/plain src/emu/cpu/m6502/dm65ce02.lst svneol=native#text/plain +src/emu/cpu/m6502/dm740.lst svneol=native#text/plain src/emu/cpu/m6502/dn2a03.lst svneol=native#text/plain src/emu/cpu/m6502/dr65c02.lst svneol=native#text/plain src/emu/cpu/m6502/m4510.c svneol=native#text/plain @@ -521,6 +522,8 @@ src/emu/cpu/m6502/m65ce02.c svneol=native#text/plain src/emu/cpu/m6502/m65ce02.h svneol=native#text/plain src/emu/cpu/m6502/m65sc02.c svneol=native#text/plain src/emu/cpu/m6502/m65sc02.h svneol=native#text/plain +src/emu/cpu/m6502/m740.c svneol=native#text/plain +src/emu/cpu/m6502/m740.h svneol=native#text/plain src/emu/cpu/m6502/m7501.c svneol=native#text/plain src/emu/cpu/m6502/m7501.h svneol=native#text/plain src/emu/cpu/m6502/m8502.c svneol=native#text/plain @@ -534,6 +537,7 @@ src/emu/cpu/m6502/om6509.lst svneol=native#text/plain src/emu/cpu/m6502/om6510.lst svneol=native#text/plain src/emu/cpu/m6502/om65c02.lst svneol=native#text/plain src/emu/cpu/m6502/om65ce02.lst svneol=native#text/plain +src/emu/cpu/m6502/om740.lst svneol=native#text/plain src/emu/cpu/m6502/on2a03.lst svneol=native#text/plain src/emu/cpu/m6502/r65c02.c svneol=native#text/plain src/emu/cpu/m6502/r65c02.h svneol=native#text/plain diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index cac99314f47..13076a5a9ba 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -1053,7 +1053,8 @@ CPUOBJS += $(CPUOBJ)/m6502/deco16.o \ $(CPUOBJ)/m6502/m7501.o \ $(CPUOBJ)/m6502/m8502.o \ $(CPUOBJ)/m6502/n2a03.o \ - $(CPUOBJ)/m6502/r65c02.o + $(CPUOBJ)/m6502/r65c02.o \ + $(CPUOBJ)/m6502/m740.o DASMOBJS += endif @@ -1129,6 +1130,11 @@ $(CPUOBJ)/m6502/r65c02.o: $(CPUSRC)/m6502/r65c02.c \ $(CPUSRC)/m6502/m65c02.h \ $(CPUSRC)/m6502/m6502.h +$(CPUOBJ)/m6502/m740.o: $(CPUSRC)/m6502/m740.c \ + $(CPUOBJ)/m6502/m740.inc \ + $(CPUSRC)/m6502/m740.h \ + $(CPUSRC)/m6502/m6502.h + # rule to generate the C files $(CPUOBJ)/m6502/deco16.inc: $(CPUSRC)/m6502/m6502make.py $(CPUSRC)/m6502/odeco16.lst $(CPUSRC)/m6502/ddeco16.lst @echo Generating DECO16 source file... @@ -1166,6 +1172,9 @@ $(CPUOBJ)/m6502/r65c02.inc: $(CPUSRC)/m6502/m6502make.py $(CPUSRC)/m6502/dr65c02 @echo Generating R65C02 source file... $(PYTHON) $(CPUSRC)/m6502/m6502make.py r65c02_device - $(CPUSRC)/m6502/dr65c02.lst $@ +$(CPUOBJ)/m6502/m740.inc: $(CPUSRC)/m6502/m6502make.py $(CPUSRC)/m6502/om740.lst $(CPUSRC)/m6502/dm740.lst + @echo Generating M740 source file... + $(PYTHON) $(CPUSRC)/m6502/m6502make.py m740_device $(CPUSRC)/m6502/om740.lst $(CPUSRC)/m6502/dm740.lst $@ #------------------------------------------------- # Motorola 680x diff --git a/src/emu/cpu/m6502/dm740.lst b/src/emu/cpu/m6502/dm740.lst new file mode 100644 index 00000000000..9cdd516e69b --- /dev/null +++ b/src/emu/cpu/m6502/dm740.lst @@ -0,0 +1,18 @@ +# m740 device +brk_imp ora_idx kil_non bbs_acc nop_zpg ora_zpg asl_zpg bbs_biz php_imp ora_imm asl_acc seb_acc nop_aba ora_aba asl_aba seb_biz +bpl_rel ora_idy clt_imp bbc_acc nop_zpx ora_zpx asl_zpx bbc_biz clc_imp ora_aby nop_imp clb_acc nop_abx ora_abx asl_abx clb_biz +jsr_adr and_idx jsr_spg bbs_acc bit_zpg and_zpg rol_zpg bbs_biz plp_imp and_imm rol_acc seb_acc bit_aba and_aba rol_aba seb_biz +bmi_rel and_idy set_imp bbc_acc nop_zpx and_zpx rol_zpx bbc_biz sec_imp and_aby nop_imp clb_acc ldm_imz and_abx rol_abx clb_biz +rti_imp eor_idx kil_non bbs_acc nop_zpg eor_zpg lsr_zpg bbs_biz pha_imp eor_imm lsr_acc seb_acc jmp_adr eor_aba lsr_aba seb_biz +bvc_rel eor_idy kil_non bbc_acc nop_zpx eor_zpx lsr_zpx bbc_biz cli_imp eor_aby nop_imp clb_acc nop_abx eor_abx lsr_abx clb_biz +rts_imp adc_idx kil_non bbs_acc nop_zpg adc_zpg ror_zpg bbs_biz pla_imp adc_imm ror_acc seb_acc jmp_ind adc_aba ror_aba seb_biz +bvs_rel adc_idy kil_non bbc_acc nop_zpx adc_zpx ror_zpx bbc_biz sei_imp adc_aby nop_imp clb_acc nop_abx adc_abx ror_abx clb_biz +bra_rel sta_idx rrf_zpg bbs_acc sty_zpg sta_zpg stx_zpg bbs_biz dey_imp nop_imm txa_imp seb_acc sty_aba sta_aba stx_aba seb_biz +bcc_rel sta_idy kil_non bbc_acc sty_zpx sta_zpx stx_zpy bbc_biz tya_imp sta_aby txs_imp clb_acc shy_abx sta_abx shx_aby clb_biz +ldy_imm lda_idx ldx_imm bbs_acc ldy_zpg lda_zpg ldx_zpg bbs_biz tay_imp lda_imm tax_imp seb_acc ldy_aba lda_aba ldx_aba seb_biz +bcs_rel lda_idy kil_non bbc_acc ldy_zpx lda_zpx ldx_zpy bbc_biz clv_imp lda_aby tsx_imp clb_acc ldy_abx lda_abx ldx_aby clb_biz +cpy_imm cmp_idx nop_imm bbs_acc cpy_zpg cmp_zpg dec_zpg bbs_biz iny_imp cmp_imm dex_imp seb_acc cpy_aba cmp_aba dec_aba seb_biz +bne_rel cmp_idy kil_non bbc_acc nop_zpx cmp_zpx dec_zpx bbc_biz cld_imp cmp_aby nop_imp clb_acc nop_abx cmp_abx dec_abx clb_biz +cpx_imm sbc_idx nop_imm bbs_acc cpx_zpg sbc_zpg inc_zpg bbs_biz inx_imp sbc_imm nop_imp seb_acc cpx_aba sbc_aba inc_aba seb_biz +beq_rel sbc_idy kil_non bbc_acc nop_zpx sbc_zpx inc_zpx bbc_biz sed_imp sbc_aby nop_imp clb_acc nop_abx sbc_abx inc_abx clb_biz +reset740 diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c index a76a0621a26..de518e7c153 100644 --- a/src/emu/cpu/m6502/m6502.c +++ b/src/emu/cpu/m6502/m6502.c @@ -602,6 +602,21 @@ offs_t m6502_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *o flags |= 2; break; + case DASM_imz: + sprintf(buffer, " #$%02x, $%02x", opram[1], opram[2]); + flags |= 3; + break; + + case DASM_spg: + sprintf(buffer, " \\$%02x", opram[1]); + flags |= 2; + break; + + case DASM_biz: + sprintf(buffer, " %d, $%02x", (opram[0] >> 5) & 7, opram[1]); + flags |= 2; + break; + default: fprintf(stderr, "Unhandled dasm mode %d\n", e.mode); abort(); diff --git a/src/emu/cpu/m6502/m6502.h b/src/emu/cpu/m6502/m6502.h index 0f2b4ee01c4..7314282618f 100644 --- a/src/emu/cpu/m6502/m6502.h +++ b/src/emu/cpu/m6502/m6502.h @@ -124,12 +124,16 @@ protected: DASM_zpi, /* zero page indirect (65c02) */ DASM_zpx, /* zero page + X */ DASM_zpy, /* zero page + Y */ + DASM_imz, /* load immediate byte, store to zero page address (M740) */ + DASM_spg, /* "special page": implied FF00 plus immediate value (M740)*/ + DASM_biz /* bit, zero page (M740) */ }; enum { F_N = 0x80, F_V = 0x40, F_E = 0x20, // 65ce02 + F_T = 0x20, // M740: replaces A with $00,X in some opcodes when set F_B = 0x10, F_D = 0x08, F_I = 0x04, diff --git a/src/emu/cpu/m6502/m740.c b/src/emu/cpu/m6502/m740.c new file mode 100644 index 00000000000..39f032d8ebb --- /dev/null +++ b/src/emu/cpu/m6502/m740.c @@ -0,0 +1,92 @@ +/*************************************************************************** + + m740.c + + Mitsubishi M740 series (M507xx/M509xx) + +**************************************************************************** + + Copyright Olivier Galibert + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are + met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + * Neither the name 'MAME' nor the names of its contributors may be + used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY OLIVIER GALIBERT ''AS IS'' AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT, + INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +***************************************************************************/ + +#include "emu.h" +#include "m740.h" + +const device_type M740 = &device_creator; + +m740_device::m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + m6502_device(mconfig, M740, "M740", tag, owner, clock) +{ +} + +m740_device::m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) : + m6502_device(mconfig, type, name, tag, owner, clock) +{ +} + +offs_t m740_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) +{ + return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries); +} + +void m740_device::device_reset() +{ + inst_state = STATE_RESET; + inst_substate = 0; + nmi_state = false; + irq_state = false; + apu_irq_state = false; + irq_taken = false; + v_state = false; + end_cycles = 0; + sync = false; + inhibit_interrupts = false; + SP = 0x00ff; +} + +UINT8 m740_device::do_clb(UINT8 in, UINT8 bit) +{ + return in & ~(1<>4); +} + +#include "cpu/m6502/m740.inc" diff --git a/src/emu/cpu/m6502/m740.h b/src/emu/cpu/m6502/m740.h new file mode 100644 index 00000000000..2632e0595c6 --- /dev/null +++ b/src/emu/cpu/m6502/m740.h @@ -0,0 +1,89 @@ +/*************************************************************************** + + m740.h + + Mitsubishi M740 series (M507xx/M509xx) + +**************************************************************************** + + Copyright Olivier Galibert + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are + met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + * Neither the name 'MAME' nor the names of its contributors may be + used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY OLIVIER GALIBERT ''AS IS'' AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT, + INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +***************************************************************************/ + +#ifndef __M740_H__ +#define __M740_H__ + +#include "m6502.h" + +class m740_device : public m6502_device { +public: + m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); + + virtual void device_reset(); + + static const disasm_entry disasm_entries[0x100]; + + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + virtual void do_exec_full(); + virtual void do_exec_partial(); + +protected: +#define O(o) void o ## _full(); void o ## _partial() + + UINT8 do_clb(UINT8 in, UINT8 bit); + UINT8 do_seb(UINT8 in, UINT8 bit); + UINT8 do_rrf(UINT8 in); + + // m740 opcodes + O(clt_imp); + O(set_imp); + O(ldm_imz); + O(jsr_spg); + O(reset740); + O(seb_biz); O(seb_acc); + O(clb_biz); O(clb_acc); + O(bbc_biz); O(bbc_acc); + O(bbs_biz); O(bbs_acc); + O(rrf_zpg); + O(bra_rel); + +#undef O +}; + +enum { + M740_IRQ_LINE = m6502_device::IRQ_LINE, + M740_NMI_LINE = m6502_device::NMI_LINE, + M740_SET_OVERFLOW = m6502_device::V_LINE, +}; + +extern const device_type M740; + +#endif diff --git a/src/emu/cpu/m6502/om740.lst b/src/emu/cpu/m6502/om740.lst new file mode 100644 index 00000000000..0f4b9f5760f --- /dev/null +++ b/src/emu/cpu/m6502/om740.lst @@ -0,0 +1,110 @@ +# m740 opcodes +set_imp + read_pc_noinc(); + P |= F_T; + prefetch(); + +clt_imp + read_pc_noinc(); + P &= ~F_T; + prefetch(); + +ldm_imz + TMP = read_pc(); + TMP2 = read_pc(); + write(TMP2, TMP); + prefetch(); + +jsr_spg + TMP = read_pc_noinc(); + read(SP); + write(SP, PC>>8); + dec_SP(); + write(SP, PC); + dec_SP(); + TMP = set_h(TMP, 0xff); + PC = TMP; + prefetch(); + +clb_acc + read_pc_noinc(); + A = do_clb(A, (IR>>5) & 7); + prefetch(); + +seb_acc + read_pc_noinc(); + A = do_seb(A, (IR>>5) & 7); + prefetch(); + +clb_biz + TMP = read_pc(); + TMP2 = read(TMP); + TMP2 = do_clb(TMP2, (IR>>5) & 7); + write(TMP, TMP2); + prefetch(); + +seb_biz + TMP = read_pc(); + TMP2 = read(TMP); + TMP2 = do_seb(TMP2, (IR>>5) & 7); + write(TMP, TMP2); + prefetch(); + +bbc_biz + TMP = read_pc(); + TMP2 = read(TMP); + TMP = read_pc(); + read_pc_noinc(); + if(!(TMP2 & (1 << ((IR>>5) & 7)))) { + PC += INT8(TMP); + } + prefetch(); + +bbs_biz + TMP = read_pc(); + TMP2 = read(TMP); + TMP = read_pc(); + read_pc_noinc(); + if(TMP2 & (1 << ((IR>>5) & 7))) { + PC += INT8(TMP); + } + prefetch(); + +bbc_acc + TMP = read_pc(); + read_pc_noinc(); + if(!(A & (1 << ((IR>>5) & 7)))) { + PC += INT8(TMP); + } + prefetch(); + +bbs_acc + TMP = read_pc(); + read_pc_noinc(); + if(A & (1 << ((IR>>5) & 7))) { + PC += INT8(TMP); + } + prefetch(); + +rrf_zpg + TMP = read_pc(); + TMP2 = read(TMP); + TMP2 = do_rrf(TMP2); + write(TMP, TMP2); + prefetch(); + +bra_rel + TMP = read_pc(); + read_pc_noinc(); + if(page_changing(PC, INT8(TMP))) { + read_direct(set_l(PC, PC+INT8(TMP))); + } + PC += INT8(TMP); + prefetch(); + +reset740 + PC = read_direct(0xfffe); + PC = set_h(PC, read_direct(0xffff)); + prefetch(); + inst_state = -1; +