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Some mess modernization (nw)

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This commit is contained in:
Miodrag Milanovic 2013-02-18 14:57:32 +00:00
parent 7623d362cf
commit a18a189d09
45 changed files with 1220 additions and 1183 deletions
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9
src/mess/drivers/4004clk.c
View File

@ -30,6 +30,9 @@ public:
UINT8 m_timer;
virtual void machine_start();
TIMER_DEVICE_CALLBACK_MEMBER(timer_callback);
UINT8 nixie_to_num(UINT16 val);
inline void output_set_nixie_value(int index, int value);
inline void output_set_neon_value(int index, int value);
};
READ8_MEMBER(nixieclock_state::data_r)
@ -37,7 +40,7 @@ READ8_MEMBER(nixieclock_state::data_r)
return ioport("INPUT")->read() & 0x0f;
}
static UINT8 nixie_to_num(UINT16 val)
UINT8 nixieclock_state::nixie_to_num(UINT16 val)
{
if (BIT(val,0)) return 0;
if (BIT(val,1)) return 1;
@ -52,12 +55,12 @@ static UINT8 nixie_to_num(UINT16 val)
return 10;
}
INLINE void output_set_nixie_value(int index, int value)
inline void nixieclock_state::output_set_nixie_value(int index, int value)
{
output_set_indexed_value("nixie", index, value);
}
INLINE void output_set_neon_value(int index, int value)
inline void nixieclock_state::output_set_neon_value(int index, int value)
{
output_set_indexed_value("neon", index, value);
}

165
src/mess/drivers/a2600.c
View File

@ -153,12 +153,26 @@ protected:
void install_banks(int count, unsigned init);
UINT8 *m_cart;
int detect_modeDC();
int detect_modef6();
int detect_mode3E();
int detect_modeSS();
int detect_modeFE();
int detect_modeE0();
int detect_modeCV();
int detect_modeFV();
int detect_modeJVP();
int detect_modeE7();
int detect_modeUA();
int detect_8K_mode3F();
int detect_32K_mode3F();
int detect_super_chip();
unsigned long detect_2600controllers();
};
#define CART machine.root_device().memregion("user1")->base()
#define CART_MEMBER machine().root_device().memregion("user1")->base()
#define CART machine().root_device().memregion("user1")->base()
#define MASTER_CLOCK_NTSC 3579545
#define MASTER_CLOCK_PAL 3546894
@ -191,16 +205,15 @@ enum
static const UINT16 supported_screen_heights[4] = { 262, 312, 328, 342 };
static int detect_modeDC(running_machine &machine)
int a2600_state::detect_modeDC()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,numfound = 0;
// signature is also in 'video reflex'.. maybe figure out that controller port someday...
static const unsigned char signature[3] = { 0x8d, 0xf0, 0xff };
if (state->m_cart_size == 0x10000)
if (m_cart_size == 0x10000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature,sizeof signature))
{
@ -212,15 +225,14 @@ static int detect_modeDC(running_machine &machine)
return 0;
}
static int detect_modef6(running_machine &machine)
int a2600_state::detect_modef6()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i, numfound = 0;
static const unsigned char signature[3] = { 0x8d, 0xf6, 0xff };
if (state->m_cart_size == 0x4000)
if (m_cart_size == 0x4000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature, sizeof signature))
{
@ -232,19 +244,18 @@ static int detect_modef6(running_machine &machine)
return 0;
}
static int detect_mode3E(running_machine &machine)
int a2600_state::detect_mode3E()
{
a2600_state *state = machine.driver_data<a2600_state>();
// this one is a little hacky.. looks for STY $3e, which is unique to
// 'not boulderdash', but is the only example i have (cow)
// Would have used STA $3e, but 'Alien' and 'Star Raiders' do that for unknown reasons
int i,numfound = 0;
static const unsigned char signature[3] = { 0x84, 0x3e, 0x9d };
if (state->m_cart_size == 0x0800 || state->m_cart_size == 0x1000)
if (m_cart_size == 0x0800 || m_cart_size == 0x1000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature,sizeof signature))
{
@ -256,15 +267,14 @@ static int detect_mode3E(running_machine &machine)
return 0;
}
static int detect_modeSS(running_machine &machine)
int a2600_state::detect_modeSS()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,numfound = 0;
static const unsigned char signature[5] = { 0xbd, 0xe5, 0xff, 0x95, 0x81 };
if (state->m_cart_size == 0x0800 || state->m_cart_size == 0x1000)
if (m_cart_size == 0x0800 || m_cart_size == 0x1000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature,sizeof signature))
{
@ -276,9 +286,8 @@ static int detect_modeSS(running_machine &machine)
return 0;
}
static int detect_modeFE(running_machine &machine)
int a2600_state::detect_modeFE()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][5] = {
{ 0x20, 0x00, 0xd0, 0xc6, 0xc5 },
@ -286,10 +295,10 @@ static int detect_modeFE(running_machine &machine)
{ 0xd0, 0xfb, 0x20, 0x73, 0xfe },
{ 0x20, 0x00, 0xf0, 0x84, 0xd6 }
};
if (state->m_cart_size == 0x2000)
if (m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -304,9 +313,8 @@ static int detect_modeFE(running_machine &machine)
return 0;
}
static int detect_modeE0(running_machine &machine)
int a2600_state::detect_modeE0()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][3] = {
{ 0x8d, 0xe0, 0x1f },
@ -316,10 +324,10 @@ static int detect_modeE0(running_machine &machine)
{ 0xad, 0xed, 0xff },
{ 0xad, 0xf3, 0xbf }
};
if (state->m_cart_size == 0x2000)
if (m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -334,18 +342,17 @@ static int detect_modeE0(running_machine &machine)
return 0;
}
static int detect_modeCV(running_machine &machine)
int a2600_state::detect_modeCV()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][3] = {
{ 0x9d, 0xff, 0xf3 },
{ 0x99, 0x00, 0xf4 }
};
if (state->m_cart_size == 0x0800 || state->m_cart_size == 0x1000)
if (m_cart_size == 0x0800 || m_cart_size == 0x1000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -360,17 +367,16 @@ static int detect_modeCV(running_machine &machine)
return 0;
}
static int detect_modeFV(running_machine &machine)
int a2600_state::detect_modeFV()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][3] = {
{ 0x2c, 0xd0, 0xff }
};
if (state->m_cart_size == 0x2000)
if (m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -380,24 +386,23 @@ static int detect_modeFV(running_machine &machine)
}
}
}
state->m_FVlocked = 0;
m_FVlocked = 0;
}
if (numfound) return 1;
return 0;
}
static int detect_modeJVP(running_machine &machine)
int a2600_state::detect_modeJVP()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][4] = {
{ 0x2c, 0xc0, 0xef, 0x60 },
{ 0x8d, 0xa0, 0x0f, 0xf0 }
};
if (state->m_cart_size == 0x4000 || state->m_cart_size == 0x2000)
if (m_cart_size == 0x4000 || m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -412,18 +417,17 @@ static int detect_modeJVP(running_machine &machine)
return 0;
}
static int detect_modeE7(running_machine &machine)
int a2600_state::detect_modeE7()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j,numfound = 0;
static const unsigned char signatures[][3] = {
{ 0xad, 0xe5, 0xff },
{ 0x8d, 0xe7, 0xff }
};
if (state->m_cart_size == 0x2000 || state->m_cart_size == 0x4000)
if (m_cart_size == 0x2000 || m_cart_size == 0x4000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]) && !numfound; j++)
{
@ -438,15 +442,14 @@ static int detect_modeE7(running_machine &machine)
return 0;
}
static int detect_modeUA(running_machine &machine)
int a2600_state::detect_modeUA()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,numfound = 0;
static const unsigned char signature[3] = { 0x8d, 0x40, 0x02 };
if (state->m_cart_size == 0x2000)
if (m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature,sizeof signature))
{
@ -458,17 +461,16 @@ static int detect_modeUA(running_machine &machine)
return 0;
}
static int detect_8K_mode3F(running_machine &machine)
int a2600_state::detect_8K_mode3F()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,numfound = 0;
static const unsigned char signature1[4] = { 0xa9, 0x01, 0x85, 0x3f };
static const unsigned char signature2[4] = { 0xa9, 0x02, 0x85, 0x3f };
// have to look for two signatures because 'not boulderdash' gives false positive otherwise
if (state->m_cart_size == 0x2000)
if (m_cart_size == 0x2000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature1; i++)
for (i = 0; i < m_cart_size - sizeof signature1; i++)
{
if (!memcmp(&cart[i], signature1,sizeof signature1))
{
@ -484,15 +486,14 @@ static int detect_8K_mode3F(running_machine &machine)
return 0;
}
static int detect_32K_mode3F(running_machine &machine)
int a2600_state::detect_32K_mode3F()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,numfound = 0;
static const unsigned char signature[4] = { 0xa9, 0x0e, 0x85, 0x3f };
if (state->m_cart_size >= 0x8000)
if (m_cart_size >= 0x8000)
{
UINT8 *cart = CART;
for (i = 0; i < state->m_cart_size - sizeof signature; i++)
for (i = 0; i < m_cart_size - sizeof signature; i++)
{
if (!memcmp(&cart[i], signature,sizeof signature))
{
@ -504,9 +505,8 @@ static int detect_32K_mode3F(running_machine &machine)
return 0;
}
static int detect_super_chip(running_machine &machine)
int a2600_state::detect_super_chip()
{
a2600_state *state = machine.driver_data<a2600_state>();
int i,j;
UINT8 *cart = CART;
static const unsigned char signatures[][5] = {
@ -514,9 +514,9 @@ static int detect_super_chip(running_machine &machine)
{ 0xae, 0xf6, 0xff, 0x4c, 0x00 } // off the wall
};
if (state->m_cart_size == 0x4000)
if (m_cart_size == 0x4000)
{
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]); j++)
{
@ -527,7 +527,7 @@ static int detect_super_chip(running_machine &machine)
}
}
}
for (i = 0x1000; i < state->m_cart_size; i += 0x1000)
for (i = 0x1000; i < m_cart_size; i += 0x1000)
{
if (memcmp(cart, cart + i, 0x100))
{
@ -619,7 +619,7 @@ DEVICE_IMAGE_LOAD_MEMBER( a2600_state, a2600_cart )
}
}
if (!(m_cart_size == 0x4000 && detect_modef6(machine())))
if (!(m_cart_size == 0x4000 && detect_modef6()))
{
while (m_cart_size > 0x00800)
{
@ -1458,16 +1458,15 @@ MACHINE_START_MEMBER(a2600_state,a2600)
memset( m_riot_ram, 0x00, 0x80 );
m_current_reset_bank_counter = 0xFF;
m_dpc.oscillator = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(a2600_state::modeDPC_timer_callback),this));
m_cart = CART_MEMBER;
m_cart = CART;
m_modeSS_last_address = 0;
}
#ifdef UNUSED_FUNCTIONS
// try to detect 2600 controller setup. returns 32bits with left/right controller info
static unsigned long detect_2600controllers(running_machine &machine)
unsigned a2600_state::long detect_2600controllers()
{
a2600_state *state = machine.driver_data<a2600_state>();
#define JOYS 0x001
#define PADD 0x002
#define KEYP 0x004
@ -1513,10 +1512,10 @@ static unsigned long detect_2600controllers(running_machine &machine)
// it can be fixed here with a new signature (note that the Coleco Gemini has this setup also)
left = JOYS+PADD; right = JOYS+PADD;
// default for bad dumps and roms too large to have special controllers
if ((state->m_cart_size > 0x4000) || (state->m_cart_size & 0x7ff)) return (left << 16) + right;
if ((m_cart_size > 0x4000) || (m_cart_size & 0x7ff)) return (left << 16) + right;
cart = CART;
for (i = 0; i < state->m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
for (i = 0; i < m_cart_size - (sizeof signatures/sizeof signatures[0]); i++)
{
for (j = 0; j < (sizeof signatures/sizeof signatures[0]); j++)
{
@ -1553,18 +1552,18 @@ void a2600_state::machine_reset()
m_current_reset_bank_counter++;
/* auto-detect bank mode */
if (m_banking_mode == 0xff) if (detect_modeDC(machine())) m_banking_mode = modeDC;
if (m_banking_mode == 0xff) if (detect_mode3E(machine())) m_banking_mode = mode3E;
if (m_banking_mode == 0xff) if (detect_modeFE(machine())) m_banking_mode = modeFE;
if (m_banking_mode == 0xff) if (detect_modeSS(machine())) m_banking_mode = modeSS;
if (m_banking_mode == 0xff) if (detect_modeE0(machine())) m_banking_mode = modeE0;
if (m_banking_mode == 0xff) if (detect_modeCV(machine())) m_banking_mode = modeCV;
if (m_banking_mode == 0xff) if (detect_modeFV(machine())) m_banking_mode = modeFV;
if (m_banking_mode == 0xff) if (detect_modeJVP(machine())) m_banking_mode = modeJVP;
if (m_banking_mode == 0xff) if (detect_modeUA(machine())) m_banking_mode = modeUA;
if (m_banking_mode == 0xff) if (detect_8K_mode3F(machine())) m_banking_mode = mode3F;
if (m_banking_mode == 0xff) if (detect_32K_mode3F(machine())) m_banking_mode = mode3F;
if (m_banking_mode == 0xff) if (detect_modeE7(machine())) m_banking_mode = modeE7;
if (m_banking_mode == 0xff) if (detect_modeDC()) m_banking_mode = modeDC;
if (m_banking_mode == 0xff) if (detect_mode3E()) m_banking_mode = mode3E;
if (m_banking_mode == 0xff) if (detect_modeFE()) m_banking_mode = modeFE;
if (m_banking_mode == 0xff) if (detect_modeSS()) m_banking_mode = modeSS;
if (m_banking_mode == 0xff) if (detect_modeE0()) m_banking_mode = modeE0;
if (m_banking_mode == 0xff) if (detect_modeCV()) m_banking_mode = modeCV;
if (m_banking_mode == 0xff) if (detect_modeFV()) m_banking_mode = modeFV;
if (m_banking_mode == 0xff) if (detect_modeJVP()) m_banking_mode = modeJVP;
if (m_banking_mode == 0xff) if (detect_modeUA()) m_banking_mode = modeUA;
if (m_banking_mode == 0xff) if (detect_8K_mode3F()) m_banking_mode = mode3F;
if (m_banking_mode == 0xff) if (detect_32K_mode3F()) m_banking_mode = mode3F;
if (m_banking_mode == 0xff) if (detect_modeE7()) m_banking_mode = modeE7;
if (m_banking_mode == 0xff)
{
@ -1607,7 +1606,7 @@ void a2600_state::machine_reset()
if (m_cart_size == 0x2000 || m_cart_size == 0x4000 || m_cart_size == 0x8000)
{
chip = detect_super_chip(machine());
chip = detect_super_chip();
}
/* Super chip games:
@ -1648,7 +1647,7 @@ void a2600_state::machine_reset()
case modeF8:
m_current_reset_bank_counter = 0;
if (!memcmp(&CART_MEMBER[0x1ffc],snowwhite,sizeof(snowwhite)))
if (!memcmp(&CART[0x1ffc],snowwhite,sizeof(snowwhite)))
{
install_banks(1, 0x0000);
}
@ -1809,7 +1808,7 @@ void a2600_state::machine_reset()
case modeSS:
space.install_read_handler(0x1000, 0x1fff, read8_delegate(FUNC(a2600_state::modeSS_r),this));
m_bank_base[1] = m_extra_RAM->base() + 2 * 0x800;
m_bank_base[2] = CART_MEMBER;
m_bank_base[2] = CART;
membank("bank1")->set_base(m_bank_base[1] );
membank("bank2")->set_base(m_bank_base[2] );
m_modeSS_write_enabled = 0;
@ -1842,8 +1841,8 @@ void a2600_state::machine_reset()
break;
case mode32in1:
membank("bank1")->set_base(CART_MEMBER + m_current_reset_bank_counter * 0x800 );
membank("bank2")->set_base(CART_MEMBER + m_current_reset_bank_counter * 0x800 );
membank("bank1")->set_base(CART + m_current_reset_bank_counter * 0x800 );
membank("bank2")->set_base(CART + m_current_reset_bank_counter * 0x800 );
break;
case modeJVP:

14
src/mess/drivers/apc.c
View File

@ -157,6 +157,7 @@ protected:
virtual void video_start();
virtual void palette_init();
inline void set_dma_channel(int channel, int state);
};
void apc_state::video_start()
@ -955,16 +956,15 @@ WRITE8_MEMBER(apc_state::apc_dma_write_byte)
program.write_byte(addr, data);
}
static void set_dma_channel(running_machine &machine, int channel, int state)
inline void apc_state::set_dma_channel(int channel, int state)
{
apc_state *drvstate = machine.driver_data<apc_state>();
if (!state) drvstate->m_dack = channel;
if (!state) m_dack = channel;
}
WRITE_LINE_MEMBER(apc_state::apc_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(machine(), 0, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(machine(), 1, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(machine(), 2, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(machine(), 3, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(0, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(1, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(2, state); }
WRITE_LINE_MEMBER(apc_state::apc_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(3, state); }
READ8_MEMBER(apc_state::fdc_r)
{

74
src/mess/drivers/apexc.c
View File

@ -35,16 +35,17 @@ public:
INTERRUPT_GEN_MEMBER(apexc_interrupt);
DECLARE_READ8_MEMBER(tape_read);
DECLARE_WRITE8_MEMBER(tape_write);
void apexc_draw_led(bitmap_ind16 &bitmap, int x, int y, int state);
void apexc_draw_char(bitmap_ind16 &bitmap, char character, int x, int y, int color);
void apexc_draw_string(bitmap_ind16 &bitmap, const char *buf, int x, int y, int color);
void apexc_teletyper_init();
void apexc_teletyper_linefeed();
void apexc_teletyper_putchar(int character);
};
static void apexc_teletyper_init(running_machine &machine);
static void apexc_teletyper_putchar(running_machine &machine, int character);
void apexc_state::machine_start()
{
apexc_teletyper_init(machine());
apexc_teletyper_init();
}
@ -287,7 +288,7 @@ WRITE8_MEMBER(apexc_state::tape_write)
if (image->exists())
image->fwrite(& data5, 1);
apexc_teletyper_putchar(machine(), data & 0x1f); /* display on screen */
apexc_teletyper_putchar(data & 0x1f); /* display on screen */
}
/*
@ -567,7 +568,7 @@ void apexc_state::video_start()
}
/* draw a small 8*8 LED (well, there were no LEDs at the time, so let's call this a lamp ;-) ) */
static void apexc_draw_led(bitmap_ind16 &bitmap, int x, int y, int state)
void apexc_state::apexc_draw_led(bitmap_ind16 &bitmap, int x, int y, int state)
{
int xx, yy;
@ -577,18 +578,18 @@ static void apexc_draw_led(bitmap_ind16 &bitmap, int x, int y, int state)
}
/* write a single char on screen */
static void apexc_draw_char(running_machine &machine, bitmap_ind16 &bitmap, char character, int x, int y, int color)
void apexc_state::apexc_draw_char(bitmap_ind16 &bitmap, char character, int x, int y, int color)
{
drawgfx_transpen(bitmap, bitmap.cliprect(), machine.gfx[0], character-32, color, 0, 0,
drawgfx_transpen(bitmap, bitmap.cliprect(), machine().gfx[0], character-32, color, 0, 0,
x+1, y, 0);
}
/* write a string on screen */
static void apexc_draw_string(running_machine &machine, bitmap_ind16 &bitmap, const char *buf, int x, int y, int color)
void apexc_state::apexc_draw_string(bitmap_ind16 &bitmap, const char *buf, int x, int y, int color)
{
while (* buf)
{
apexc_draw_char(machine, bitmap, *buf, x, y, color);
apexc_draw_char(bitmap, *buf, x, y, color);
x += 8;
buf++;
@ -602,9 +603,9 @@ UINT32 apexc_state::screen_update_apexc(screen_device &screen, bitmap_ind16 &bit
char the_char;
bitmap.fill(0, /*machine().visible_area*/panel_window);
apexc_draw_string(machine(), bitmap, "power", 8, 0, 0);
apexc_draw_string(machine(), bitmap, "running", 8, 8, 0);
apexc_draw_string(machine(), bitmap, "data :", 0, 24, 0);
apexc_draw_string(bitmap, "power", 8, 0, 0);
apexc_draw_string(bitmap, "running", 8, 8, 0);
apexc_draw_string(bitmap, "data :", 0, 24, 0);
copybitmap(bitmap, *m_bitmap, 0, 0, 0, 0, teletyper_window);
@ -617,40 +618,38 @@ UINT32 apexc_state::screen_update_apexc(screen_device &screen, bitmap_ind16 &bit
{
apexc_draw_led(bitmap, i*8, 32, (m_panel_data_reg << i) & 0x80000000UL);
the_char = '0' + ((i + 1) % 10);
apexc_draw_char(machine(), bitmap, the_char, i*8, 40, 0);
apexc_draw_char(bitmap, the_char, i*8, 40, 0);
if (((i + 1) % 10) == 0)
{
the_char = '0' + ((i + 1) / 10);
apexc_draw_char(machine(), bitmap, the_char, i*8, 48, 0);
apexc_draw_char(bitmap, the_char, i*8, 48, 0);
}
}
return 0;
}
static void apexc_teletyper_init(running_machine &machine)
void apexc_state::apexc_teletyper_init()
{
apexc_state *state = machine.driver_data<apexc_state>();
state->m_letters = FALSE;
state->m_pos = 0;
m_letters = FALSE;
m_pos = 0;
}
static void apexc_teletyper_linefeed(running_machine &machine)
void apexc_state::apexc_teletyper_linefeed()
{
apexc_state *state = machine.driver_data<apexc_state>();
UINT8 buf[teletyper_window_width];
int y;
for (y=teletyper_window_offset_y; y<teletyper_window_offset_y+teletyper_window_height-teletyper_scroll_step; y++)
{
extract_scanline8(*state->m_bitmap, teletyper_window_offset_x, y+teletyper_scroll_step, teletyper_window_width, buf);
draw_scanline8(*state->m_bitmap, teletyper_window_offset_x, y, teletyper_window_width, buf, machine.pens);
extract_scanline8(*m_bitmap, teletyper_window_offset_x, y+teletyper_scroll_step, teletyper_window_width, buf);
draw_scanline8(*m_bitmap, teletyper_window_offset_x, y, teletyper_window_width, buf, machine().pens);
}
state->m_bitmap->fill(0, teletyper_scroll_clear_window);
m_bitmap->fill(0, teletyper_scroll_clear_window);
}
static void apexc_teletyper_putchar(running_machine &machine, int character)
void apexc_state::apexc_teletyper_putchar(int character)
{
static const char ascii_table[2][32] =
{
@ -676,7 +675,6 @@ static void apexc_teletyper_putchar(running_machine &machine, int character)
}
};
apexc_state *state = machine.driver_data<apexc_state>();
char buffer[2] = "x";
character &= 0x1f;
@ -685,38 +683,38 @@ static void apexc_teletyper_putchar(running_machine &machine, int character)
{
case 19:
/* Line Space */
apexc_teletyper_linefeed(machine);
apexc_teletyper_linefeed();
break;
case 24:
/* Carriage Return */
state->m_pos = 0;
m_pos = 0;
break;
case 27:
/* Figures */
state->m_letters = FALSE;
m_letters = FALSE;
break;
case 31:
/* Letters */
state->m_letters = TRUE;
m_letters = TRUE;
break;
default:
/* Any printable character... */
if (state->m_pos >= 32)
if (m_pos >= 32)
{ /* if past right border, wrap around */
apexc_teletyper_linefeed(machine); /* next line */
state->m_pos = 0; /* return to start of line */
apexc_teletyper_linefeed(); /* next line */
m_pos = 0; /* return to start of line */
}
/* print character */
buffer[0] = ascii_table[state->m_letters][character]; /* lookup ASCII equivalent in table */
buffer[0] = ascii_table[m_letters][character]; /* lookup ASCII equivalent in table */
buffer[1] = '\0'; /* terminate string */
apexc_draw_string(machine, *state->m_bitmap, buffer, 8*state->m_pos, 176, 0); /* print char */
state->m_pos++; /* step carriage forward */
apexc_draw_string(*m_bitmap, buffer, 8*m_pos, 176, 0); /* print char */
m_pos++; /* step carriage forward */
break;
}

9
src/mess/drivers/atari400.c
View File

@ -341,6 +341,9 @@ protected:
void a1200xl_mmu(UINT8 new_mmu);
void xegs_mmu(UINT8 new_mmu);
void a800_setup_mappers(int type);
int a800_get_pcb_id(const char *pcb);
int a800_get_type(device_image_interface &image);
int a800_check_cart_type(device_image_interface &image);
};
/**************************************************************
@ -1180,7 +1183,7 @@ static const a800_pcb pcb_list[] =
{"N/A", A800_UNKNOWN}
};
static int a800_get_pcb_id(const char *pcb)
int a400_state::a800_get_pcb_id(const char *pcb)
{
int i;
@ -1374,7 +1377,7 @@ void a400_state::a800_setup_mappers(int type)
}
static int a800_get_type(device_image_interface &image)
int a400_state::a800_get_type(device_image_interface &image)
{
UINT8 header[16];
image.fread(header, 0x10);
@ -1439,7 +1442,7 @@ static int a800_get_type(device_image_interface &image)
}
static int a800_check_cart_type(device_image_interface &image)
int a400_state::a800_check_cart_type(device_image_interface &image)
{
const char *pcb_name;
int type = A800_UNKNOWN;

7
src/mess/drivers/craft.c
View File

@ -13,7 +13,7 @@
#define ENABLE_VERBOSE_LOG (0)
#if ENABLE_VERBOSE_LOG
INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt, ...)
inline void craft_state::verboselog(int n_level, const char *s_fmt, ...)
{
if( VERBOSE_LEVEL >= n_level )
{
@ -22,7 +22,7 @@ INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
logerror( "%08x: %s", machine().device("maincpu")->safe_pc(), buf );
}
}
#else
@ -76,6 +76,9 @@ public:
DECLARE_DRIVER_INIT(craft);
virtual void machine_reset();
UINT32 screen_update_craft(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
#if ENABLE_VERBOSE_LOG
inline void verboselog(int n_level, const char *s_fmt, ...);
#endif
};
void craft_state::machine_start()

90
src/mess/drivers/dectalk.c
View File

@ -196,6 +196,12 @@ public:
virtual void machine_reset();
TIMER_CALLBACK_MEMBER(outfifo_read_cb);
DECLARE_WRITE8_MEMBER(dectalk_kbd_put);
void dectalk_outfifo_check ();
void dectalk_clear_all_fifos( );
void dectalk_x2212_store( );
void dectalk_x2212_recall( );
void dectalk_semaphore_w ( UINT16 data );
UINT16 dectalk_outfifo_r ( );
};
@ -247,79 +253,73 @@ static const duart68681_config dectalk_duart68681_config =
#define SPC_INITIALIZE state->m_m68k_spcflags_latch&0x1 // speech initialize flag
#define SPC_IRQ_ENABLED ((state->m_m68k_spcflags_latch&0x40)>>6) // irq enable flag
static void dectalk_outfifo_check (running_machine &machine)
void dectalk_state::dectalk_outfifo_check ()
{
dectalk_state *state = machine.driver_data<dectalk_state>();
// check if output fifo is full; if it isn't, set the int on the dsp
if (((state->m_outfifo_head_ptr-1)&0xF) != state->m_outfifo_tail_ptr)
machine.device("dsp")->execute().set_input_line(0, ASSERT_LINE); // TMS32010 INT
if (((m_outfifo_head_ptr-1)&0xF) != m_outfifo_tail_ptr)
machine().device("dsp")->execute().set_input_line(0, ASSERT_LINE); // TMS32010 INT
else
machine.device("dsp")->execute().set_input_line(0, CLEAR_LINE); // TMS32010 INT
machine().device("dsp")->execute().set_input_line(0, CLEAR_LINE); // TMS32010 INT
}
static void dectalk_clear_all_fifos( running_machine &machine )
void dectalk_state::dectalk_clear_all_fifos( )
{
dectalk_state *state = machine.driver_data<dectalk_state>();
// clear fifos (TODO: memset would work better here...)
int i;
for (i=0; i<16; i++) state->m_outfifo[i] = 0;
for (i=0; i<32; i++) state->m_infifo[i] = 0;
state->m_outfifo_tail_ptr = state->m_outfifo_head_ptr = 0;
state->m_infifo_tail_ptr = state->m_infifo_head_ptr = 0;
dectalk_outfifo_check(machine);
for (i=0; i<16; i++) m_outfifo[i] = 0;
for (i=0; i<32; i++) m_infifo[i] = 0;
m_outfifo_tail_ptr = m_outfifo_head_ptr = 0;
m_infifo_tail_ptr = m_infifo_head_ptr = 0;
dectalk_outfifo_check();
}
static void dectalk_x2212_store( running_machine &machine )
void dectalk_state::dectalk_x2212_store( )
{
dectalk_state *state = machine.driver_data<dectalk_state>();
UINT8 *nvram = state->memregion("nvram")->base();
UINT8 *nvram = memregion("nvram")->base();
int i;
for (i = 0; i < 256; i++)
nvram[i] = state->m_x2214_sram[i];
nvram[i] = m_x2214_sram[i];
#ifdef NVRAM_LOG
logerror("nvram store done\n");
#endif
}
static void dectalk_x2212_recall( running_machine &machine )
void dectalk_state::dectalk_x2212_recall( )
{
dectalk_state *state = machine.driver_data<dectalk_state>();
UINT8 *nvram = state->memregion("nvram")->base();
UINT8 *nvram = memregion("nvram")->base();
int i;
for (i = 0; i < 256; i++)
state->m_x2214_sram[i] = nvram[i];
m_x2214_sram[i] = nvram[i];
#ifdef NVRAM_LOG
logerror("nvram recall done\n");
#endif
}
// helper for dsp infifo_semaphore flag to make dealing with interrupts easier
static void dectalk_semaphore_w ( running_machine &machine, UINT16 data )
void dectalk_state::dectalk_semaphore_w ( UINT16 data )
{
dectalk_state *state = machine.driver_data<dectalk_state>();
state->m_infifo_semaphore = data&1;
if ((state->m_infifo_semaphore == 1) && (state->m_m68k_spcflags_latch&0x40))
m_infifo_semaphore = data&1;
if ((m_infifo_semaphore == 1) && (m_m68k_spcflags_latch&0x40))
{
#ifdef VERBOSE
logerror("speech int fired!\n");
#endif
machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_5, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_5, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
}
else
machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_5, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_5, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
}
// read the output fifo and set the interrupt line active on the dsp
static UINT16 dectalk_outfifo_r ( running_machine &machine )
UINT16 dectalk_state::dectalk_outfifo_r ( )
{
dectalk_state *state = machine.driver_data<dectalk_state>();
UINT16 data = 0xFFFF;
data = state->m_outfifo[state->m_outfifo_tail_ptr];
data = m_outfifo[m_outfifo_tail_ptr];
// if fifo is empty (tail ptr == head ptr), do not increment the tail ptr, otherwise do.
//if (state->m_outfifo_tail_ptr != state->m_outfifo_head_ptr) state->m_outfifo_tail_ptr++; // technically correct but doesn't match sn74ls224 sheet
if (((state->m_outfifo_head_ptr-1)&0xF) != state->m_outfifo_tail_ptr) state->m_outfifo_tail_ptr++; // matches sn74ls224 sheet
state->m_outfifo_tail_ptr&=0xF;
dectalk_outfifo_check(machine);
//if (m_outfifo_tail_ptr != m_outfifo_head_ptr) m_outfifo_tail_ptr++; // technically correct but doesn't match sn74ls224 sheet
if (((m_outfifo_head_ptr-1)&0xF) != m_outfifo_tail_ptr) m_outfifo_tail_ptr++; // matches sn74ls224 sheet
m_outfifo_tail_ptr&=0xF;
dectalk_outfifo_check();
return ((data&0xfff0)^0x8000); // yes this is right, top bit is inverted and bottom 4 are ignored
//return data; // not right but want to get it working first
}
@ -331,13 +331,13 @@ static void dectalk_reset(device_t *device)
state->m_hack_self_test = 0; // hack
// stuff that is DIRECTLY affected by the RESET line
state->m_statusLED = 0; // clear status led latch
dectalk_x2212_recall(device->machine()); // nvram recall
state->dectalk_x2212_recall(); // nvram recall
state->m_m68k_spcflags_latch = 1; // initial status is speech reset(d0) active and spc int(d6) disabled
state->m_m68k_tlcflags_latch = 0; // initial status is tone detect int(d6) off, answer phone(d8) off, ring detect int(d14) off
device->machine().device("duart68681")->reset(); // reset the DUART
// stuff that is INDIRECTLY affected by the RESET line
dectalk_clear_all_fifos(device->machine()); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
dectalk_semaphore_w(device->machine(), 0); // on the original state->m_dectalk pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
state->dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
state->dectalk_semaphore_w(0); // on the original state->m_dectalk pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
state->m_spc_error_latch = 0; // spc error latch is cleared on /reset
device->machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
state->m_tlc_tonedetect = 0; // TODO, needed for selftest pass
@ -362,7 +362,7 @@ READ8_MEMBER(dectalk_state::nvram_read)// read from x2212 nvram chip and possibl
logerror("m68k: nvram read at %08X: %02X\n", offset, data);
#endif
if (offset&0x200) // if a9 is set, do a /RECALL
dectalk_x2212_recall(machine());
dectalk_x2212_recall();
return data;
}
@ -383,7 +383,7 @@ WRITE8_MEMBER(dectalk_state::nvram_write)// write to X2212 NVRAM chip and possib
#endif
m_x2214_sram[offset&0xff] = (UINT8)data&0x0f; // TODO: should this be before or after a possible /STORE? I'm guessing before.
if (offset&0x200) // if a9 is set, do a /STORE
dectalk_x2212_store(machine());
dectalk_x2212_store();
}
WRITE16_MEMBER(dectalk_state::m68k_infifo_w)// 68k write to the speech input fifo
@ -434,11 +434,11 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
#ifdef SPC_LOG_68K
logerror(" | 0x01: initialize speech: fifos reset, clear error+semaphore latches and dsp reset\n");
#endif
dectalk_clear_all_fifos(machine());
dectalk_clear_all_fifos();
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
// clear the two speech side latches
m_spc_error_latch = 0;
dectalk_semaphore_w(machine(), 0);
dectalk_semaphore_w(0);
}
else // (data&0x1) == 0
{
@ -454,7 +454,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
#endif
// clear the two speech side latches
m_spc_error_latch = 0;
dectalk_semaphore_w(machine(), 0);
dectalk_semaphore_w(0);
}
if ((data&0x40) == 0x40) // bit 6 - spc irq enable
{
@ -572,7 +572,7 @@ WRITE16_MEMBER(dectalk_state::spc_latch_outfifo_error_stats)// latch 74ls74 @ E6
#ifdef SPC_LOG_DSP
logerror("dsp: set fifo semaphore and set error status = %01X\n",data&1);
#endif
dectalk_semaphore_w(machine(), (~m_simulate_outfifo_error)&1); // always set to 1 here, unless outfifo error.
dectalk_semaphore_w((~m_simulate_outfifo_error)&1); // always set to 1 here, unless outfifo error.
m_spc_error_latch = (data&1);
}
@ -608,7 +608,7 @@ WRITE16_MEMBER(dectalk_state::spc_outfifo_data_w)
m_outfifo[m_outfifo_head_ptr] = data;
m_outfifo_head_ptr++;
m_outfifo_head_ptr&=0xF;
//dectalk_outfifo_check(machine()); // commented to allow int to clear
//dectalk_outfifo_check(); // commented to allow int to clear
}
READ16_MEMBER(dectalk_state::spc_semaphore_r)// Return state of d-latch 74ls74 @ E64 'lower half' in d0 which indicates whether infifo is readable
@ -703,7 +703,7 @@ TIMER_CALLBACK_MEMBER(dectalk_state::outfifo_read_cb)
{
UINT16 data;
dac_device *speaker = machine().device<dac_device>("dac");
data = dectalk_outfifo_r(machine());
data = dectalk_outfifo_r();
#ifdef VERBOSE
if (data!= 0x8000) logerror("sample output: %04X\n", data);
#endif
@ -714,7 +714,7 @@ TIMER_CALLBACK_MEMBER(dectalk_state::outfifo_read_cb)
/* Driver init: stuff that needs setting up which isn't directly affected by reset */
DRIVER_INIT_MEMBER(dectalk_state,dectalk)
{
dectalk_clear_all_fifos(machine());
dectalk_clear_all_fifos();
m_simulate_outfifo_error = 0;
machine().scheduler().timer_set(attotime::from_hz(10000), timer_expired_delegate(FUNC(dectalk_state::outfifo_read_cb),this));
}

26
src/mess/drivers/gizmondo.c
View File

@ -36,18 +36,6 @@ SYSINTR_GPS = INT_EINT3, INT_EINT8_23 (EINT18)
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine.describe_context( ), buf);
}
}
#define BIT(x,n) (((x)>>(n))&1)
#define BITS(x,m,n) (((x)>>(n))&(((UINT32)1<<((m)-(n)+1))-1))
@ -64,8 +52,22 @@ public:
virtual void machine_start();
virtual void machine_reset();
DECLARE_INPUT_CHANGED_MEMBER(port_changed);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ...);
};
inline void ATTR_PRINTF(3,4) gizmondo_state::verboselog( int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine().describe_context( ), buf);
}
}
/*******************************************************************************
...
*******************************************************************************/

120
src/mess/drivers/hp49gp.c
View File

@ -11,19 +11,6 @@
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine.describe_context( ), buf);
}
}
struct lcd_spi_t
{
int l1;
@ -47,6 +34,11 @@ public:
virtual void machine_start();
virtual void machine_reset();
DECLARE_INPUT_CHANGED_MEMBER(port_changed);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ...);
void lcd_spi_reset( );
void lcd_spi_init( );
void lcd_spi_line_w( int line, int data);
int lcd_spi_line_r( int line);
};
/***************************************************************************
@ -62,99 +54,109 @@ enum
LCD_SPI_LINE_3
};
static void lcd_spi_reset( running_machine &machine)
inline void ATTR_PRINTF(3,4) hp49gp_state::verboselog( int n_level, const char *s_fmt, ...)
{
hp49gp_state *hp49gp = machine.driver_data<hp49gp_state>();
verboselog( machine, 5, "lcd_spi_reset\n");
hp49gp->m_lcd_spi.l1 = 0;
hp49gp->m_lcd_spi.data = 0;
hp49gp->m_lcd_spi.l3 = 0;
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine().describe_context( ), buf);
}
}
static void lcd_spi_init( running_machine &machine)
void hp49gp_state::lcd_spi_reset( )
{
verboselog( machine, 5, "lcd_spi_init\n");
lcd_spi_reset( machine);
verboselog( 5, "lcd_spi_reset\n");
m_lcd_spi.l1 = 0;
m_lcd_spi.data = 0;
m_lcd_spi.l3 = 0;
}
static void lcd_spi_line_w( running_machine &machine, int line, int data)
void hp49gp_state::lcd_spi_init( )
{
verboselog( 5, "lcd_spi_init\n");
lcd_spi_reset();
}
void hp49gp_state::lcd_spi_line_w( int line, int data)
{
hp49gp_state *hp49gp = machine.driver_data<hp49gp_state>();
switch (line)
{
case LCD_SPI_LINE_1 :
{
if (data != hp49gp->m_lcd_spi.l1)
if (data != m_lcd_spi.l1)
{
if (data == 0)
{
hp49gp->m_lcd_spi.shift = 0;
hp49gp->m_lcd_spi.bits = 0;
m_lcd_spi.shift = 0;
m_lcd_spi.bits = 0;
}
verboselog( machine, 5, "LCD_SPI_LINE_1 <- %d\n", data);
hp49gp->m_lcd_spi.l1 = data;
verboselog( 5, "LCD_SPI_LINE_1 <- %d\n", data);
m_lcd_spi.l1 = data;
}
}
break;
case LCD_SPI_LINE_DATA :
{
if (data != hp49gp->m_lcd_spi.data)
if (data != m_lcd_spi.data)
{
verboselog( machine, 5, "LCD_SPI_LINE_DATA <- %d\n", data);
hp49gp->m_lcd_spi.data = data;
verboselog( 5, "LCD_SPI_LINE_DATA <- %d\n", data);
m_lcd_spi.data = data;
}
}
break;
case LCD_SPI_LINE_3 :
{
if (data != hp49gp->m_lcd_spi.l3)
if (data != m_lcd_spi.l3)
{
if ((data != 0) && (hp49gp->m_lcd_spi.l1 == 0))
if ((data != 0) && (m_lcd_spi.l1 == 0))
{
verboselog( machine, 5, "LCD SPI write bit %d\n", hp49gp->m_lcd_spi.data ? 1 : 0);
if (hp49gp->m_lcd_spi.bits < 8)
verboselog( 5, "LCD SPI write bit %d\n", m_lcd_spi.data ? 1 : 0);
if (m_lcd_spi.bits < 8)
{
hp49gp->m_lcd_spi.shift = (hp49gp->m_lcd_spi.shift << 1) | (hp49gp->m_lcd_spi.data ? 1 : 0);
m_lcd_spi.shift = (m_lcd_spi.shift << 1) | (m_lcd_spi.data ? 1 : 0);
}
hp49gp->m_lcd_spi.bits++;
if (hp49gp->m_lcd_spi.bits == 8)
m_lcd_spi.bits++;
if (m_lcd_spi.bits == 8)
{
verboselog( machine, 5, "LCD SPI write byte %02X\n", hp49gp->m_lcd_spi.shift);
verboselog( 5, "LCD SPI write byte %02X\n", m_lcd_spi.shift);
}
else if (hp49gp->m_lcd_spi.bits == 9)
else if (m_lcd_spi.bits == 9)
{
verboselog( machine, 5, "LCD SPI write ack %d\n", (hp49gp->m_lcd_spi.data ? 1 : 0));
verboselog( 5, "LCD SPI write ack %d\n", (m_lcd_spi.data ? 1 : 0));
}
}
verboselog( machine, 5, "LCD_SPI_LINE_3 <- %d\n", data);
hp49gp->m_lcd_spi.l3 = data;
verboselog( 5, "LCD_SPI_LINE_3 <- %d\n", data);
m_lcd_spi.l3 = data;
}
}
break;
}
}
static int lcd_spi_line_r( running_machine &machine, int line)
int hp49gp_state::lcd_spi_line_r( int line)
{
hp49gp_state *hp49gp = machine.driver_data<hp49gp_state>();
switch (line)
{
case LCD_SPI_LINE_1 :
{
verboselog( machine, 7, "LCD_SPI_LINE_1 -> %d\n", hp49gp->m_lcd_spi.l1);
return hp49gp->m_lcd_spi.l1;
verboselog( 7, "LCD_SPI_LINE_1 -> %d\n", m_lcd_spi.l1);
return m_lcd_spi.l1;
}
break;
case LCD_SPI_LINE_DATA :
{
verboselog( machine, 7, "LCD_SPI_LINE_DATA -> %d\n", hp49gp->m_lcd_spi.data);
return hp49gp->m_lcd_spi.data;
verboselog( 7, "LCD_SPI_LINE_DATA -> %d\n", m_lcd_spi.data);
return m_lcd_spi.data;
}
break;
case LCD_SPI_LINE_3 :
{
verboselog( machine, 7, "LCD_SPI_LINE_3 -> %d\n", hp49gp->m_lcd_spi.l3);
return hp49gp->m_lcd_spi.l3;
verboselog( 7, "LCD_SPI_LINE_3 -> %d\n", m_lcd_spi.l3);
return m_lcd_spi.l3;
}
break;
}
@ -178,9 +180,9 @@ static UINT32 s3c2410_gpio_port_r( device_t *device, int port, UINT32 mask)
{
data = data | 0x0008;
data = data & ~0x3200;
data |= (lcd_spi_line_r( device->machine(), LCD_SPI_LINE_1) ? 1 : 0) << 9;
data |= (lcd_spi_line_r( device->machine(), LCD_SPI_LINE_DATA) ? 1 : 0) << 12;
data |= (lcd_spi_line_r( device->machine(), LCD_SPI_LINE_3) ? 1 : 0) << 13;
data |= (hp49gp->lcd_spi_line_r( LCD_SPI_LINE_1) ? 1 : 0) << 9;
data |= (hp49gp->lcd_spi_line_r( LCD_SPI_LINE_DATA) ? 1 : 0) << 12;
data |= (hp49gp->lcd_spi_line_r( LCD_SPI_LINE_3) ? 1 : 0) << 13;
}
break;
case S3C2410_GPIO_PORT_E :
@ -222,9 +224,9 @@ static void s3c2410_gpio_port_w( device_t *device, int port, UINT32 mask, UINT32
{
case S3C2410_GPIO_PORT_D :
{
lcd_spi_line_w( device->machine(), LCD_SPI_LINE_1, BIT( data, 9) ? 1 : 0);
lcd_spi_line_w( device->machine(), LCD_SPI_LINE_DATA, BIT( data, 12) ? 1 : 0);
lcd_spi_line_w( device->machine(), LCD_SPI_LINE_3, BIT( data, 13) ? 1 : 0);
hp49gp->lcd_spi_line_w( LCD_SPI_LINE_1, BIT( data, 9) ? 1 : 0);
hp49gp->lcd_spi_line_w( LCD_SPI_LINE_DATA, BIT( data, 12) ? 1 : 0);
hp49gp->lcd_spi_line_w( LCD_SPI_LINE_3, BIT( data, 13) ? 1 : 0);
}
break;
}
@ -269,7 +271,7 @@ DRIVER_INIT_MEMBER(hp49gp_state,hp49gp)
{
UINT8 *rom = (UINT8 *)machine().root_device().memregion( "maincpu")->base();
memcpy( m_steppingstone, rom, 1024);
lcd_spi_init( machine());
lcd_spi_init();
}
static S3C2410_INTERFACE( hp49gp_s3c2410_intf )

113
src/mess/drivers/ip20.c
View File

@ -67,12 +67,13 @@ public:
required_device<wd33c93_device> m_wd33c93;
required_device<scc8530_t> m_scc;
required_device<eeprom_device> m_eeprom;
inline void ATTR_PRINTF(3,4) verboselog(int n_level, const char *s_fmt, ... );
};
#define VERBOSE_LEVEL ( 2 )
INLINE void ATTR_PRINTF(3,4) verboselog(running_machine &machine, int n_level, const char *s_fmt, ... )
inline void ATTR_PRINTF(3,4) ip20_state::verboselog(int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
@ -81,7 +82,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog(running_machine &machine, int n_level, c
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
logerror( "%08x: %s", machine().device("maincpu")->safe_pc(), buf );
}
}
@ -122,19 +123,19 @@ READ32_MEMBER(ip20_state::hpc_r)
offset <<= 2;
if( offset >= 0x0e00 && offset <= 0x0e7c )
{
verboselog(machine(), 2, "RTC RAM[0x%02x] Read: %02x\n", ( offset - 0xe00 ) >> 2, m_RTC.nRAM[ ( offset - 0xe00 ) >> 2 ] );
verboselog(2, "RTC RAM[0x%02x] Read: %02x\n", ( offset - 0xe00 ) >> 2, m_RTC.nRAM[ ( offset - 0xe00 ) >> 2 ] );
return m_RTC.nRAM[ ( offset - 0xe00 ) >> 2 ];
}
switch( offset )
{
case 0x05c:
verboselog(machine(), 2, "HPC Unknown Read: %08x (%08x) (returning 0x000000a5 as kludge)\n", 0x1fb80000 + offset, mem_mask );
verboselog(2, "HPC Unknown Read: %08x (%08x) (returning 0x000000a5 as kludge)\n", 0x1fb80000 + offset, mem_mask );
return 0x0000a500;
case 0x00ac:
verboselog(machine(), 2, "HPC Parallel Buffer Pointer Read: %08x (%08x)\n", m_HPC.nParBufPtr, mem_mask );
verboselog(2, "HPC Parallel Buffer Pointer Read: %08x (%08x)\n", m_HPC.nParBufPtr, mem_mask );
return m_HPC.nParBufPtr;
case 0x00c0:
verboselog(machine(), 2, "HPC Endianness Read: %08x (%08x)\n", 0x0000001f, mem_mask );
verboselog(2, "HPC Endianness Read: %08x (%08x)\n", 0x0000001f, mem_mask );
return 0x0000001f;
case 0x0120:
if (ACCESSING_BITS_8_15)
@ -155,77 +156,77 @@ READ32_MEMBER(ip20_state::hpc_r)
return 0;
}
case 0x01b0:
verboselog(machine(), 2, "HPC Misc. Status Read: %08x (%08x)\n", m_HPC.nMiscStatus, mem_mask );
verboselog(2, "HPC Misc. Status Read: %08x (%08x)\n", m_HPC.nMiscStatus, mem_mask );
return m_HPC.nMiscStatus;
case 0x01bc:
// verboselog(machine, 2, "HPC CPU Serial EEPROM Read\n" );
return m_eeprom->read_bit() << 4;
case 0x01c4:
verboselog(machine(), 2, "HPC Local IO Register 0 Mask Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
verboselog(2, "HPC Local IO Register 0 Mask Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
return m_HPC.nLocalIOReg0Mask;
case 0x01cc:
verboselog(machine(), 2, "HPC Local IO Register 1 Mask Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
verboselog(2, "HPC Local IO Register 1 Mask Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
return m_HPC.nLocalIOReg1Mask;
case 0x01d4:
verboselog(machine(), 2, "HPC VME Interrupt Mask 0 Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
verboselog(2, "HPC VME Interrupt Mask 0 Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
return m_HPC.nVMEIntMask0;
case 0x01d8:
verboselog(machine(), 2, "HPC VME Interrupt Mask 1 Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
verboselog(2, "HPC VME Interrupt Mask 1 Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask );
return m_HPC.nVMEIntMask1;
case 0x0d00:
verboselog(machine(), 2, "HPC DUART0 Channel B Control Read\n" );
verboselog(2, "HPC DUART0 Channel B Control Read\n" );
// return 0x00000004;
return 0x7c; //m_scc->reg_r(space, 0);
case 0x0d04:
verboselog(machine(), 2, "HPC DUART0 Channel B Data Read\n" );
verboselog(2, "HPC DUART0 Channel B Data Read\n" );
// return 0;
return m_scc->reg_r(space, 2);
case 0x0d08:
verboselog(machine(), 2, "HPC DUART0 Channel A Control Read (%08x)\n", mem_mask );
verboselog(2, "HPC DUART0 Channel A Control Read (%08x)\n", mem_mask );
// return 0x40;
return 0x7c; //m_scc->reg_r(space, 1);
case 0x0d0c:
verboselog(machine(), 2, "HPC DUART0 Channel A Data Read\n" );
verboselog(2, "HPC DUART0 Channel A Data Read\n" );
// return 0;
return m_scc->reg_r(space, 3);
case 0x0d10:
// verboselog(machine, 2, "HPC DUART1 Channel B Control Read\n" );
return 0x00000004;
case 0x0d14:
verboselog(machine(), 2, "HPC DUART1 Channel B Data Read\n" );
verboselog(2, "HPC DUART1 Channel B Data Read\n" );
return 0;
case 0x0d18:
verboselog(machine(), 2, "HPC DUART1 Channel A Control Read\n" );
verboselog(2, "HPC DUART1 Channel A Control Read\n" );
return 0;
case 0x0d1c:
verboselog(machine(), 2, "HPC DUART1 Channel A Data Read\n" );
verboselog(2, "HPC DUART1 Channel A Data Read\n" );
return 0;
case 0x0d20:
verboselog(machine(), 2, "HPC DUART2 Channel B Control Read\n" );
verboselog(2, "HPC DUART2 Channel B Control Read\n" );
return 0x00000004;
case 0x0d24:
verboselog(machine(), 2, "HPC DUART2 Channel B Data Read\n" );
verboselog(2, "HPC DUART2 Channel B Data Read\n" );
return 0;
case 0x0d28:
verboselog(machine(), 2, "HPC DUART2 Channel A Control Read\n" );
verboselog(2, "HPC DUART2 Channel A Control Read\n" );
return 0;
case 0x0d2c:
verboselog(machine(), 2, "HPC DUART2 Channel A Data Read\n" );
verboselog(2, "HPC DUART2 Channel A Data Read\n" );
return 0;
case 0x0d30:
verboselog(machine(), 2, "HPC DUART3 Channel B Control Read\n" );
verboselog(2, "HPC DUART3 Channel B Control Read\n" );
return 0x00000004;
case 0x0d34:
verboselog(machine(), 2, "HPC DUART3 Channel B Data Read\n" );
verboselog(2, "HPC DUART3 Channel B Data Read\n" );
return 0;
case 0x0d38:
verboselog(machine(), 2, "HPC DUART3 Channel A Control Read\n" );
verboselog(2, "HPC DUART3 Channel A Control Read\n" );
return 0;
case 0x0d3c:
verboselog(machine(), 2, "HPC DUART3 Channel A Data Read\n" );
verboselog(2, "HPC DUART3 Channel A Data Read\n" );
return 0;
}
verboselog(machine(), 0, "Unmapped HPC read: 0x%08x (%08x)\n", 0x1fb80000 + offset, mem_mask );
verboselog(0, "Unmapped HPC read: 0x%08x (%08x)\n", 0x1fb80000 + offset, mem_mask );
return 0;
}
@ -234,7 +235,7 @@ WRITE32_MEMBER(ip20_state::hpc_w)
offset <<= 2;
if( offset >= 0x0e00 && offset <= 0x0e7c )
{
verboselog(machine(), 2, "RTC RAM[0x%02x] Write: %02x\n", ( offset - 0xe00 ) >> 2, data & 0x000000ff );
verboselog(2, "RTC RAM[0x%02x] Write: %02x\n", ( offset - 0xe00 ) >> 2, data & 0x000000ff );
m_RTC.nRAM[ ( offset - 0xe00 ) >> 2 ] = data & 0x000000ff;
switch( ( offset - 0xe00 ) >> 2 )
{
@ -284,13 +285,13 @@ WRITE32_MEMBER(ip20_state::hpc_w)
break;
case 0x00ac:
verboselog(machine(), 2, "HPC Parallel Buffer Pointer Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC Parallel Buffer Pointer Write: %08x (%08x)\n", data, mem_mask );
m_HPC.nParBufPtr = data;
break;
case 0x0120:
if (ACCESSING_BITS_8_15)
{
verboselog(machine(), 2, "HPC SCSI Controller Register Write: %08x\n", ( data >> 8 ) & 0x000000ff );
verboselog(2, "HPC SCSI Controller Register Write: %08x\n", ( data >> 8 ) & 0x000000ff );
m_wd33c93->write( space, 0, ( data >> 8 ) & 0x000000ff );
}
else
@ -301,7 +302,7 @@ WRITE32_MEMBER(ip20_state::hpc_w)
case 0x0124:
if (ACCESSING_BITS_8_15)
{
verboselog(machine(), 2, "HPC SCSI Controller Data Write: %08x\n", ( data >> 8 ) & 0x000000ff );
verboselog(2, "HPC SCSI Controller Data Write: %08x\n", ( data >> 8 ) & 0x000000ff );
m_wd33c93->write( space, 1, ( data >> 8 ) & 0x000000ff );
}
else
@ -310,30 +311,30 @@ WRITE32_MEMBER(ip20_state::hpc_w)
}
break;
case 0x01b0:
verboselog(machine(), 2, "HPC Misc. Status Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC Misc. Status Write: %08x (%08x)\n", data, mem_mask );
if( data & 0x00000001 )
{
verboselog(machine(), 2, " Force DSP hard reset\n" );
verboselog(2, " Force DSP hard reset\n" );
}
if( data & 0x00000002 )
{
verboselog(machine(), 2, " Force IRQA\n" );
verboselog(2, " Force IRQA\n" );
}
if( data & 0x00000004 )
{
verboselog(machine(), 2, " Set IRQA polarity high\n" );
verboselog(2, " Set IRQA polarity high\n" );
}
else
{
verboselog(machine(), 2, " Set IRQA polarity low\n" );
verboselog(2, " Set IRQA polarity low\n" );
}
if( data & 0x00000008 )
{
verboselog(machine(), 2, " SRAM size: 32K\n" );
verboselog(2, " SRAM size: 32K\n" );
}
else
{
verboselog(machine(), 2, " SRAM size: 8K\n" );
verboselog(2, " SRAM size: 8K\n" );
}
m_HPC.nMiscStatus = data;
break;
@ -341,95 +342,95 @@ WRITE32_MEMBER(ip20_state::hpc_w)
// verboselog(machine, 2, "HPC CPU Serial EEPROM Write: %08x (%08x)\n", data, mem_mask );
if( data & 0x00000001 )
{
verboselog(machine(), 2, " CPU board LED on\n" );
verboselog(2, " CPU board LED on\n" );
}
m_eeprom->write_bit((data & 0x00000008) ? 1 : 0 );
m_eeprom->set_cs_line((data & 0x00000002) ? ASSERT_LINE : CLEAR_LINE );
m_eeprom->set_clock_line((data & 0x00000004) ? CLEAR_LINE : ASSERT_LINE );
break;
case 0x01c4:
verboselog(machine(), 2, "HPC Local IO Register 0 Mask Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC Local IO Register 0 Mask Write: %08x (%08x)\n", data, mem_mask );
m_HPC.nLocalIOReg0Mask = data;
break;
case 0x01cc:
verboselog(machine(), 2, "HPC Local IO Register 1 Mask Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC Local IO Register 1 Mask Write: %08x (%08x)\n", data, mem_mask );
m_HPC.nLocalIOReg1Mask = data;
break;
case 0x01d4:
verboselog(machine(), 2, "HPC VME Interrupt Mask 0 Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC VME Interrupt Mask 0 Write: %08x (%08x)\n", data, mem_mask );
m_HPC.nVMEIntMask0 = data;
break;
case 0x01d8:
verboselog(machine(), 2, "HPC VME Interrupt Mask 1 Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC VME Interrupt Mask 1 Write: %08x (%08x)\n", data, mem_mask );
m_HPC.nVMEIntMask1 = data;
break;
case 0x0d00:
verboselog(machine(), 2, "HPC DUART0 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART0 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
m_scc->reg_w(space, 0, data);
break;
case 0x0d04:
verboselog(machine(), 2, "HPC DUART0 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART0 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
m_scc->reg_w(space, 2, data);
break;
case 0x0d08:
verboselog(machine(), 2, "HPC DUART0 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART0 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
m_scc->reg_w(space, 1, data);
break;
case 0x0d0c:
verboselog(machine(), 2, "HPC DUART0 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART0 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
m_scc->reg_w(space, 3, data);
break;
case 0x0d10:
if( ( data & 0x000000ff ) >= 0x00000020 )
{
// verboselog(machine(), 2, "HPC DUART1 Channel B Control Write: %08x (%08x) %c\n", data, mem_mask, data & 0x000000ff );
// verboselog(2, "HPC DUART1 Channel B Control Write: %08x (%08x) %c\n", data, mem_mask, data & 0x000000ff );
//mame_printf_info( "%c", data & 0x000000ff );
}
else
{
// verboselog(machine(), 2, "HPC DUART1 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
// verboselog(2, "HPC DUART1 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
}
break;
case 0x0d14:
if( ( data & 0x000000ff ) >= 0x00000020 || ( data & 0x000000ff ) == 0x0d || ( data & 0x000000ff ) == 0x0a )
{
verboselog(machine(), 2, "HPC DUART1 Channel B Data Write: %08x (%08x) %c\n", data, mem_mask, data & 0x000000ff );
verboselog(2, "HPC DUART1 Channel B Data Write: %08x (%08x) %c\n", data, mem_mask, data & 0x000000ff );
mame_printf_info( "%c", data & 0x000000ff );
}
else
{
verboselog(machine(), 2, "HPC DUART1 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART1 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
}
break;
case 0x0d18:
mame_printf_info("HPC DUART1 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d1c:
verboselog(machine(), 2, "HPC DUART1 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART1 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d20:
mame_printf_info("HPC DUART2 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d24:
verboselog(machine(), 2, "HPC DUART2 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART2 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d28:
mame_printf_info("HPC DUART2 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d2c:
verboselog(machine(), 2, "HPC DUART2 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART2 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d30:
mame_printf_info("HPC DUART3 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d34:
verboselog(machine(), 2, "HPC DUART3 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART3 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d38:
mame_printf_info("HPC DUART3 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
break;
case 0x0d3c:
verboselog(machine(), 2, "HPC DUART3 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
verboselog(2, "HPC DUART3 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
break;
default:
mame_printf_info("Unmapped HPC write: 0x%08x (%08x): %08x\n", 0x1fb80000 + offset, mem_mask, data);

158
src/mess/drivers/ip22.c
View File

@ -143,13 +143,20 @@ public:
required_device<device_t> m_lpt0;
required_device<pit8254_device> m_pit;
required_device<dac_device> m_dac;
inline void ATTR_PRINTF(3,4) verboselog(int n_level, const char *s_fmt, ... );
void int3_raise_local0_irq(UINT8 source_mask);
void int3_lower_local0_irq(UINT8 source_mask);
void int3_raise_local1_irq(UINT8 source_mask);
void int3_lower_local1_irq(UINT8 source_mask);
void dump_chain(address_space &space, UINT32 ch_base);
void rtc_update();
};
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog(running_machine &machine, int n_level, const char *s_fmt, ... )
inline void ATTR_PRINTF(3,4) ip22_state::verboselog(int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
@ -158,7 +165,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog(running_machine &machine, int n_level, c
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
logerror("%08x: %s", machine().device("maincpu")->safe_pc(), buf);
}
}
@ -209,41 +216,38 @@ static const struct pit8253_config ip22_pit8254_config =
#define INT3_LOCAL1_RETRACE (0x80)
// raise a local0 interrupt
static void int3_raise_local0_irq(running_machine &machine, UINT8 source_mask)
void ip22_state::int3_raise_local0_irq(UINT8 source_mask)
{
ip22_state *state = machine.driver_data<ip22_state>();
// signal the interrupt is pending
state->m_int3_regs[0] |= source_mask;
m_int3_regs[0] |= source_mask;
// if it's not masked, also assert it now at the CPU
if (state->m_int3_regs[1] & source_mask)
state->m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE);
if (m_int3_regs[1] & source_mask)
m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE);
}
// lower a local0 interrupt
static void int3_lower_local0_irq(ip22_state *state, UINT8 source_mask)
void ip22_state::int3_lower_local0_irq(UINT8 source_mask)
{
state->m_int3_regs[0] &= ~source_mask;
m_int3_regs[0] &= ~source_mask;
}
#ifdef UNUSED_FUNCTION
// raise a local1 interrupt
static void int3_raise_local1_irq(running_machine &machine, UINT8 source_mask)
void ip22_state::int3_raise_local1_irq(UINT8 source_mask)
{
ip22_state *state = machine.driver_data<ip22_state>();
// signal the interrupt is pending
state->m_int3_regs[2] |= source_mask;
m_int3_regs[2] |= source_mask;
// if it's not masked, also assert it now at the CPU
if (state->m_int3_regs[2] & source_mask)
state->m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE);
if (m_int3_regs[2] & source_mask)
m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE);
}
// lower a local1 interrupt
static void int3_lower_local1_irq(UINT8 source_mask)
void ip22_state::int3_lower_local1_irq(UINT8 source_mask)
{
ip22_state *state = machine.driver_data<ip22_state>();
state->m_int3_regs[2] &= ~source_mask;
m_int3_regs[2] &= ~source_mask;
}
#endif
@ -254,14 +258,14 @@ READ32_MEMBER(ip22_state::hpc3_pbus6_r)
{
case 0x004/4:
ret8 = pc_lpt_control_r(m_lpt0, space, 0) ^ 0x0d;
//verboselog(( machine, 0, "Parallel Control Read: %02x\n", ret8 );
//verboselog(0, "Parallel Control Read: %02x\n", ret8 );
return ret8;
case 0x008/4:
ret8 = pc_lpt_status_r(m_lpt0, space, 0) ^ 0x80;
//verboselog(( machine, 0, "Parallel Status Read: %02x\n", ret8 );
//verboselog(0, "Parallel Status Read: %02x\n", ret8 );
return ret8;
case 0x030/4:
//verboselog(( machine, 2, "Serial 1 Command Transfer Read, 0x1fbd9830: %02x\n", 0x04 );
//verboselog(2, "Serial 1 Command Transfer Read, 0x1fbd9830: %02x\n", 0x04 );
switch(space.device().safe_pc())
{
case 0x9fc1d9e4: // interpreter (ip244415)
@ -274,7 +278,7 @@ READ32_MEMBER(ip22_state::hpc3_pbus6_r)
}
return 0x00000004;
case 0x038/4:
//verboselog(( machine, 2, "Serial 2 Command Transfer Read, 0x1fbd9838: %02x\n", 0x04 );
//verboselog(2, "Serial 2 Command Transfer Read, 0x1fbd9838: %02x\n", 0x04 );
return 0x00000004;
case 0x40/4:
return kbdc8042_8_r(space, 0);
@ -298,22 +302,22 @@ READ32_MEMBER(ip22_state::hpc3_pbus6_r)
return m_int3_regs[offset-0x80/4];
case 0xb0/4:
ret8 = pit8253_r(m_pit, space, 0);
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 0 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
return ret8;
case 0xb4/4:
ret8 = pit8253_r(m_pit, space, 1);
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 1 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
return ret8;
case 0xb8/4:
ret8 = pit8253_r(m_pit, space, 2);
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 2 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
return ret8;
case 0xbc/4:
ret8 = pit8253_r(m_pit, space, 3);
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Control Word Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
return ret8;
default:
//verboselog(( machine, 0, "Unknown HPC PBUS6 Read: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), mem_mask );
//verboselog(0, "Unknown HPC PBUS6 Read: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), mem_mask );
return 0;
}
return 0;
@ -326,18 +330,18 @@ WRITE32_MEMBER(ip22_state::hpc3_pbus6_w)
switch( offset )
{
case 0x004/4:
//verboselog(( machine, 0, "Parallel Control Write: %08x\n", data );
//verboselog(0, "Parallel Control Write: %08x\n", data );
pc_lpt_control_w(m_lpt0, space, 0, data ^ 0x0d);
//m_nIOC_ParCntl = data;
break;
case 0x030/4:
if( ( data & 0x000000ff ) >= 0x20 )
{
//verboselog(( machine, 2, "Serial 1 Command Transfer Write: %02x: %c\n", data & 0x000000ff, data & 0x000000ff );
//verboselog(2, "Serial 1 Command Transfer Write: %02x: %c\n", data & 0x000000ff, data & 0x000000ff );
}
else
{
//verboselog(( machine, 2, "Serial 1 Command Transfer Write: %02x\n", data & 0x000000ff );
//verboselog(2, "Serial 1 Command Transfer Write: %02x\n", data & 0x000000ff );
}
cChar = data & 0x000000ff;
if( cChar >= 0x20 || cChar == 0x0d || cChar == 0x0a )
@ -348,11 +352,11 @@ WRITE32_MEMBER(ip22_state::hpc3_pbus6_w)
case 0x034/4:
if( ( data & 0x000000ff ) >= 0x20 )
{
//verboselog(( machine, 2, "Serial 1 Data Transfer Write: %02x: %c\n", data & 0x000000ff, data & 0x000000ff );
//verboselog(2, "Serial 1 Data Transfer Write: %02x: %c\n", data & 0x000000ff, data & 0x000000ff );
}
else
{
//verboselog(( machine, 2, "Serial 1 Data Transfer Write: %02x\n", data & 0x000000ff );
//verboselog(2, "Serial 1 Data Transfer Write: %02x\n", data & 0x000000ff );
}
cChar = data & 0x000000ff;
if( cChar >= 0x20 || cChar == 0x0d || cChar == 0x0a )
@ -393,23 +397,23 @@ WRITE32_MEMBER(ip22_state::hpc3_pbus6_w)
break;
case 0xb0/4:
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Write: 0x%08x (%08x)\n", data, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 0 Register Write: 0x%08x (%08x)\n", data, mem_mask );
pit8253_w(m_pit, space, 0, data & 0x000000ff);
return;
case 0xb4/4:
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Write: 0x%08x (%08x)\n", data, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 1 Register Write: 0x%08x (%08x)\n", data, mem_mask );
pit8253_w(m_pit, space, 1, data & 0x000000ff);
return;
case 0xb8/4:
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Write: 0x%08x (%08x)\n", data, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Counter 2 Register Write: 0x%08x (%08x)\n", data, mem_mask );
pit8253_w(m_pit, space, 2, data & 0x000000ff);
return;
case 0xbc/4:
//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Write: 0x%08x (%08x)\n", data, mem_mask );
//verboselog(0, "HPC PBUS6 IOC4 Timer Control Word Register Write: 0x%08x (%08x)\n", data, mem_mask );
pit8253_w(m_pit, space, 3, data & 0x000000ff);
return;
default:
//verboselog(( machine, 0, "Unknown HPC PBUS6 Write: 0x%08x: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), data, mem_mask );
//verboselog(0, "Unknown HPC PBUS6 Write: 0x%08x: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), data, mem_mask );
break;
}
}
@ -565,42 +569,40 @@ WRITE32_MEMBER(ip22_state::hpc3_pbus4_w)
}
}
#define RTC_SECONDS state->m_RTC.nRegs[0x00]
#define RTC_SECONDS_A state->m_RTC.nRegs[0x01]
#define RTC_MINUTES state->m_RTC.nRegs[0x02]
#define RTC_MINUTES_A state->m_RTC.nRegs[0x03]
#define RTC_HOURS state->m_RTC.nRegs[0x04]
#define RTC_HOURS_A state->m_RTC.nRegs[0x05]
#define RTC_DAYOFWEEK state->m_RTC.nRegs[0x06]
#define RTC_DAYOFMONTH state->m_RTC.nRegs[0x07]
#define RTC_MONTH state->m_RTC.nRegs[0x08]
#define RTC_YEAR state->m_RTC.nRegs[0x09]
#define RTC_REGISTERA state->m_RTC.nRegs[0x0a]
#define RTC_REGISTERB state->m_RTC.nRegs[0x0b]
#define RTC_REGISTERC state->m_RTC.nRegs[0x0c]
#define RTC_REGISTERD state->m_RTC.nRegs[0x0d]
#define RTC_MODELBYTE state->m_RTC.nRegs[0x40]
#define RTC_SERBYTE0 state->m_RTC.nRegs[0x41]
#define RTC_SERBYTE1 state->m_RTC.nRegs[0x42]
#define RTC_SERBYTE2 state->m_RTC.nRegs[0x43]
#define RTC_SERBYTE3 state->m_RTC.nRegs[0x44]
#define RTC_SERBYTE4 state->m_RTC.nRegs[0x45]
#define RTC_SERBYTE5 state->m_RTC.nRegs[0x46]
#define RTC_CRC state->m_RTC.nRegs[0x47]
#define RTC_CENTURY state->m_RTC.nRegs[0x48]
#define RTC_DAYOFMONTH_A state->m_RTC.nRegs[0x49]
#define RTC_EXTCTRL0 state->m_RTC.nRegs[0x4a]
#define RTC_EXTCTRL1 state->m_RTC.nRegs[0x4b]
#define RTC_RTCADDR2 state->m_RTC.nRegs[0x4e]
#define RTC_RTCADDR3 state->m_RTC.nRegs[0x4f]
#define RTC_RAMLSB state->m_RTC.nRegs[0x50]
#define RTC_RAMMSB state->m_RTC.nRegs[0x51]
#define RTC_WRITECNT state->m_RTC.nRegs[0x5e]
#define RTC_SECONDS m_RTC.nRegs[0x00]
#define RTC_SECONDS_A m_RTC.nRegs[0x01]
#define RTC_MINUTES m_RTC.nRegs[0x02]
#define RTC_MINUTES_A m_RTC.nRegs[0x03]
#define RTC_HOURS m_RTC.nRegs[0x04]
#define RTC_HOURS_A m_RTC.nRegs[0x05]
#define RTC_DAYOFWEEK m_RTC.nRegs[0x06]
#define RTC_DAYOFMONTH m_RTC.nRegs[0x07]
#define RTC_MONTH m_RTC.nRegs[0x08]
#define RTC_YEAR m_RTC.nRegs[0x09]
#define RTC_REGISTERA m_RTC.nRegs[0x0a]
#define RTC_REGISTERB m_RTC.nRegs[0x0b]
#define RTC_REGISTERC m_RTC.nRegs[0x0c]
#define RTC_REGISTERD m_RTC.nRegs[0x0d]
#define RTC_MODELBYTE m_RTC.nRegs[0x40]
#define RTC_SERBYTE0 m_RTC.nRegs[0x41]
#define RTC_SERBYTE1 m_RTC.nRegs[0x42]
#define RTC_SERBYTE2 m_RTC.nRegs[0x43]
#define RTC_SERBYTE3 m_RTC.nRegs[0x44]
#define RTC_SERBYTE4 m_RTC.nRegs[0x45]
#define RTC_SERBYTE5 m_RTC.nRegs[0x46]
#define RTC_CRC m_RTC.nRegs[0x47]
#define RTC_CENTURY m_RTC.nRegs[0x48]
#define RTC_DAYOFMONTH_A m_RTC.nRegs[0x49]
#define RTC_EXTCTRL0 m_RTC.nRegs[0x4a]
#define RTC_EXTCTRL1 m_RTC.nRegs[0x4b]
#define RTC_RTCADDR2 m_RTC.nRegs[0x4e]
#define RTC_RTCADDR3 m_RTC.nRegs[0x4f]
#define RTC_RAMLSB m_RTC.nRegs[0x50]
#define RTC_RAMMSB m_RTC.nRegs[0x51]
#define RTC_WRITECNT m_RTC.nRegs[0x5e]
READ32_MEMBER(ip22_state::rtc_r)
{
ip22_state *state = machine().driver_data<ip22_state>();
if( offset <= 0x0d )
{
switch( offset )
@ -729,7 +731,6 @@ READ32_MEMBER(ip22_state::rtc_r)
WRITE32_MEMBER(ip22_state::rtc_w)
{
ip22_state *state = machine().driver_data<ip22_state>();
RTC_WRITECNT++;
// mame_printf_info("RTC_W: offset %x => %x (PC=%x)\n", data, offset, activecpu_get_pc());
@ -1196,7 +1197,6 @@ TIMER_CALLBACK_MEMBER(ip22_state::ip22_timer)
void ip22_state::machine_reset()
{
ip22_state *state = machine().driver_data<ip22_state>();
m_HPC3.nenetr_nbdp = 0x80000000;
m_HPC3.nenetr_cbp = 0x80000000;
m_nIntCounter = 0;
@ -1210,10 +1210,10 @@ void ip22_state::machine_reset()
m_PBUS_DMA.nActive = 0;
mips3drc_set_options(state->m_maincpu, MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
mips3drc_set_options(m_maincpu, MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
}
static void dump_chain(address_space &space, UINT32 ch_base)
void ip22_state::dump_chain(address_space &space, UINT32 ch_base)
{
printf("node: %08x %08x %08x (len = %x)\n", space.read_dword(ch_base), space.read_dword(ch_base+4), space.read_dword(ch_base+8), space.read_dword(ch_base+4) & 0x3fff);
@ -1260,7 +1260,7 @@ static void scsi_irq(running_machine &machine, int state)
printf("DMA to device: %d words @ %x\n", words, wptr);
dump_chain(space, drvstate->m_HPC3.nSCSI0Descriptor);
drvstate->dump_chain(space, drvstate->m_HPC3.nSCSI0Descriptor);
if (words <= (512/4))
{
@ -1401,7 +1401,7 @@ static void scsi_irq(running_machine &machine, int state)
// mame_printf_info("DMA from device: %d words @ %x\n", words, wptr);
dump_chain(space, drvstate->m_HPC3.nSCSI0Descriptor);
drvstate->dump_chain(space, drvstate->m_HPC3.nSCSI0Descriptor);
if (words <= (1024/4))
{
@ -1463,11 +1463,11 @@ static void scsi_irq(running_machine &machine, int state)
drvstate->m_HPC3.nSCSI0DMACtrl &= ~HPC3_DMACTRL_ENABLE;
// set the interrupt
int3_raise_local0_irq(machine, INT3_LOCAL0_SCSI0);
drvstate->int3_raise_local0_irq(INT3_LOCAL0_SCSI0);
}
else
{
int3_lower_local0_irq(drvstate, INT3_LOCAL0_SCSI0);
drvstate->int3_lower_local0_irq(INT3_LOCAL0_SCSI0);
}
}
@ -1514,7 +1514,7 @@ static INPUT_PORTS_START( ip225015 )
PORT_INCLUDE( at_keyboard ) /* IN4 - IN11 */
INPUT_PORTS_END
static void rtc_update(ip22_state *state)
void ip22_state::rtc_update()
{
RTC_SECONDS++;
@ -1584,7 +1584,7 @@ INTERRUPT_GEN_MEMBER(ip22_state::ip22_vbl)
// if( m_nIntCounter == 60 )
{
m_nIntCounter = 0;
rtc_update(this);
rtc_update();
}
}

13
src/mess/drivers/jr100.c
View File

@ -63,6 +63,7 @@ public:
DECLARE_WRITE8_MEMBER(jr100_via_write_a);
DECLARE_WRITE8_MEMBER(jr100_via_write_b);
DECLARE_WRITE_LINE_MEMBER(jr100_via_write_cb2);
UINT32 readByLittleEndian(UINT8 *buf,int pos);
protected:
required_device<via6522_device> m_via;
@ -329,7 +330,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(jr100_state::sound_tick)
}
}
static UINT32 readByLittleEndian(UINT8 *buf,int pos)
UINT32 jr100_state::readByLittleEndian(UINT8 *buf,int pos)
{
return buf[pos] + (buf[pos+1] << 8) + (buf[pos+2] << 16) + (buf[pos+3] << 24);
}
@ -352,16 +353,16 @@ static QUICKLOAD_LOAD(jr100)
return IMAGE_INIT_FAIL;
}
int pos = 4;
if (readByLittleEndian(buf,pos)!=1) {
if (state->readByLittleEndian(buf,pos)!=1) {
// not version 1 of PRG file
return IMAGE_INIT_FAIL;
}
pos += 4;
UINT32 len =readByLittleEndian(buf,pos); pos+= 4;
UINT32 len =state->readByLittleEndian(buf,pos); pos+= 4;
pos += len; // skip name
UINT32 start_address = readByLittleEndian(buf,pos); pos+= 4;
UINT32 code_length = readByLittleEndian(buf,pos); pos+= 4;
UINT32 flag = readByLittleEndian(buf,pos); pos+= 4;
UINT32 start_address = state->readByLittleEndian(buf,pos); pos+= 4;
UINT32 code_length = state->readByLittleEndian(buf,pos); pos+= 4;
UINT32 flag = state->readByLittleEndian(buf,pos); pos+= 4;
UINT32 end_address = start_address + code_length - 1;
// copy code

96
src/mess/drivers/juicebox.c
View File

@ -18,19 +18,6 @@
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine.describe_context(), buf);
}
}
struct smc_t
{
int add_latch;
@ -60,8 +47,27 @@ public:
virtual void machine_start();
virtual void machine_reset();
DECLARE_INPUT_CHANGED_MEMBER(port_changed);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ...);
void smc_reset( );
void smc_init( );
UINT8 smc_read( );
void smc_write( UINT8 data);
};
inline void ATTR_PRINTF(3,4) juicebox_state::verboselog( int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine().describe_context(), buf);
}
}
/***************************************************************************
MACHINE HARDWARE
***************************************************************************/
@ -69,23 +75,22 @@ public:
// SMARTMEDIA
static void smc_reset( running_machine &machine)
void juicebox_state::smc_reset( )
{
juicebox_state *state = machine.driver_data<juicebox_state>();
verboselog( machine, 5, "smc_reset\n");
state->smc.add_latch = 0;
state->smc.cmd_latch = 0;
verboselog(5, "smc_reset\n");
smc.add_latch = 0;
smc.cmd_latch = 0;
}
static void smc_init( running_machine &machine)
void juicebox_state::smc_init( )
{
verboselog( machine, 5, "smc_init\n");
smc_reset( machine);
verboselog(5, "smc_init\n");
smc_reset();
}
static UINT8 smc_read( running_machine &machine)
UINT8 juicebox_state::smc_read( )
{
smartmedia_image_device *smartmedia = machine.device<smartmedia_image_device>( "smartmedia");
smartmedia_image_device *smartmedia = machine().device<smartmedia_image_device>( "smartmedia");
UINT8 data;
if (smartmedia->is_present())
{
@ -95,30 +100,29 @@ static UINT8 smc_read( running_machine &machine)
{
data = 0xFF;
}
verboselog( machine, 5, "smc_read %08X\n", data);
verboselog(5, "smc_read %08X\n", data);
return data;
}
static void smc_write( running_machine &machine, UINT8 data)
void juicebox_state::smc_write( UINT8 data)
{
juicebox_state *state = machine.driver_data<juicebox_state>();
smartmedia_image_device *smartmedia = machine.device<smartmedia_image_device>( "smartmedia");
verboselog( machine, 5, "smc_write %08X\n", data);
smartmedia_image_device *smartmedia = machine().device<smartmedia_image_device>( "smartmedia");
verboselog(5, "smc_write %08X\n", data);
if (smartmedia->is_present())
{
if (state->smc.cmd_latch)
if (smc.cmd_latch)
{
verboselog( machine, 5, "smartmedia_command_w %08X\n", data);
verboselog(5, "smartmedia_command_w %08X\n", data);
smartmedia->command_w(data);
}
else if (state->smc.add_latch)
else if (smc.add_latch)
{
verboselog( machine, 5, "smartmedia_address_w %08X\n", data);
verboselog(5, "smartmedia_address_w %08X\n", data);
smartmedia->address_w(data);
}
else
{
verboselog( machine, 5, "smartmedia_data_w %08X\n", data);
verboselog(5, "smartmedia_data_w %08X\n", data);
smartmedia->data_w(data);
}
}
@ -201,7 +205,7 @@ static void s3c44b0_gpio_port_w( device_t *device, int port, UINT32 data)
{
juicebox->smc.cmd_latch = ((data & 0x00000020) != 0);
juicebox->smc.add_latch = ((data & 0x00000040) != 0);
verboselog( device->machine(), 5, "s3c44b0_gpio_port_w - nand cle %d ale %d\n", (data & 0x20) ? 1 : 0, (data & 0x40) ? 1 : 0);
juicebox->verboselog( 5, "s3c44b0_gpio_port_w - nand cle %d ale %d\n", (data & 0x20) ? 1 : 0, (data & 0x40) ? 1 : 0);
}
break;
}
@ -212,21 +216,21 @@ static void s3c44b0_gpio_port_w( device_t *device, int port, UINT32 data)
READ32_MEMBER(juicebox_state::juicebox_nand_r)
{
UINT32 data = 0;
if (mem_mask & 0x000000FF) data = data | (smc_read(machine()) << 0);
if (mem_mask & 0x0000FF00) data = data | (smc_read(machine()) << 8);
if (mem_mask & 0x00FF0000) data = data | (smc_read(machine()) << 16);
if (mem_mask & 0xFF000000) data = data | (smc_read(machine()) << 24);
verboselog( machine(), 5, "juicebox_nand_r %08X %08X %08X\n", offset, mem_mask, data);
if (mem_mask & 0x000000FF) data = data | (smc_read() << 0);
if (mem_mask & 0x0000FF00) data = data | (smc_read() << 8);
if (mem_mask & 0x00FF0000) data = data | (smc_read() << 16);
if (mem_mask & 0xFF000000) data = data | (smc_read() << 24);
verboselog( 5, "juicebox_nand_r %08X %08X %08X\n", offset, mem_mask, data);
return data;
}
WRITE32_MEMBER(juicebox_state::juicebox_nand_w)
{
verboselog( machine(), 5, "juicebox_nand_w %08X %08X %08X\n", offset, mem_mask, data);
if (mem_mask & 0x000000FF) smc_write(machine(), (data >> 0) & 0xFF);
if (mem_mask & 0x0000FF00) smc_write(machine(), (data >> 8) & 0xFF);
if (mem_mask & 0x00FF0000) smc_write(machine(), (data >> 16) & 0xFF);
if (mem_mask & 0xFF000000) smc_write(machine(), (data >> 24) & 0xFF);
verboselog( 5, "juicebox_nand_w %08X %08X %08X\n", offset, mem_mask, data);
if (mem_mask & 0x000000FF) smc_write((data >> 0) & 0xFF);
if (mem_mask & 0x0000FF00) smc_write((data >> 8) & 0xFF);
if (mem_mask & 0x00FF0000) smc_write((data >> 16) & 0xFF);
if (mem_mask & 0xFF000000) smc_write((data >> 24) & 0xFF);
}
// I2S
@ -249,14 +253,14 @@ INPUT_CHANGED_MEMBER(juicebox_state::port_changed)
void juicebox_state::machine_start()
{
s3c44b0 = machine().device( "s3c44b0");
smc_init( machine());
smc_init();
dac = machine().device<dac_device>( "dac");
}
void juicebox_state::machine_reset()
{
machine().device("maincpu")->reset();
smc_reset( machine());
smc_reset();
}
/***************************************************************************

31
src/mess/drivers/mini2440.c
View File

@ -13,19 +13,6 @@
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine.describe_context(), buf);
}
}
class mini2440_state : public driver_device
{
public:
@ -53,8 +40,22 @@ public:
virtual void machine_start();
virtual void machine_reset();
DECLARE_INPUT_CHANGED_MEMBER(mini2440_input_changed);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ...);
};
inline void ATTR_PRINTF(3,4) mini2440_state::verboselog( int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine().describe_context(), buf);
}
}
/***************************************************************************
MACHINE HARDWARE
***************************************************************************/
@ -87,7 +88,7 @@ static void s3c2440_gpio_port_w( device_t *device, int port, UINT32 mask, UINT32
{
case S3C2440_GPIO_PORT_B :
{
verboselog( device->machine(), 5, "LED %d %d %d %d\n", BIT( data, 5), BIT( data, 6), BIT( data, 7), BIT( data, 8));
state->verboselog(5, "LED %d %d %d %d\n", BIT( data, 5), BIT( data, 6), BIT( data, 7), BIT( data, 8));
}
break;
}
@ -166,7 +167,7 @@ static READ32_DEVICE_HANDLER( s3c2440_adc_data_r )
case 2 + 0 : data = state->m_penx->read(); break;
case 2 + 1 : data = 915 - state->m_peny->read() + 90; break;
}
verboselog( space.machine(), 5, "s3c2440_adc_data_r %08X\n", data);
state->verboselog(5, "s3c2440_adc_data_r %08X\n", data);
return data;
}

10
src/mess/drivers/mmodular.c
View File

@ -205,9 +205,12 @@ public:
TIMER_DEVICE_CALLBACK_MEMBER(timer_update_irq2);
TIMER_DEVICE_CALLBACK_MEMBER(timer_update_irq_academy);
void common_chess_start();
UINT8 convert_imputmask(UINT8 input);
UINT8 convertMCIV2LED(UINT8 codedchar);
void write_IOenable(unsigned char data,address_space &space);
};
static UINT8 convert_imputmask(UINT8 input)
UINT8 polgar_state::convert_imputmask(UINT8 input)
{
input^=0xff;
switch (input) {
@ -513,7 +516,7 @@ WRITE8_MEMBER(polgar_state::polgar_write_LED)
logerror("LEDs Offset = %d Data = %d\n",offset,data);
}
static UINT8 convertMCIV2LED(UINT8 codedchar)
UINT8 polgar_state::convertMCIV2LED(UINT8 codedchar)
{
UINT8 data = 0;
if (BIT(codedchar,0)) data |= 0x80;
@ -857,7 +860,8 @@ WRITE16_MEMBER(polgar_state::write_LCD_data)
}
static void write_IOenable(unsigned char data,address_space &space) {
void polgar_state::write_IOenable(unsigned char data,address_space &space)
{
hd44780_device * hd44780 = space.machine().device<hd44780_device>("hd44780");
device_t *speaker = space.machine().device("beep");

11
src/mess/drivers/multi8.c
View File

@ -70,6 +70,7 @@ public:
virtual void palette_init();
UINT32 screen_update_multi8(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(keyboard_callback);
void multi8_draw_pixel(bitmap_ind16 &bitmap,int y,int x,UINT8 pen,UINT8 width);
};
#define mc6845_h_char_total (m_crtc_vreg[0])
@ -101,9 +102,9 @@ void multi8_state::video_start()
m_p_chargen = memregion("chargen")->base();
}
static void multi8_draw_pixel(running_machine &machine, bitmap_ind16 &bitmap,int y,int x,UINT8 pen,UINT8 width)
void multi8_state::multi8_draw_pixel(bitmap_ind16 &bitmap,int y,int x,UINT8 pen,UINT8 width)
{
if(!machine.primary_screen->visible_area().contains(x, y))
if(!machine().primary_screen->visible_area().contains(x, y))
return;
if(width)
@ -148,7 +149,7 @@ UINT32 multi8_state::screen_update_multi8(screen_device &screen, bitmap_ind16 &b
else
color = (pen_b) | (pen_r << 1) | (pen_g << 2);
multi8_draw_pixel(machine(),bitmap, y, x*8+xi,m_pen_clut[color], 0);
multi8_draw_pixel(bitmap, y, x*8+xi,m_pen_clut[color], 0);
}
count++;
}
@ -176,7 +177,7 @@ UINT32 multi8_state::screen_update_multi8(screen_device &screen, bitmap_ind16 &b
pen = (m_p_chargen[tile*8+yi] >> (7-xi) & 1) ? color : 0;
if(pen)
multi8_draw_pixel(machine(),bitmap, y*mc6845_tile_height+yi, x*8+xi, pen, (m_display_reg & 0x40) == 0x00);
multi8_draw_pixel(bitmap, y*mc6845_tile_height+yi, x*8+xi, pen, (m_display_reg & 0x40) == 0x00);
}
}
@ -201,7 +202,7 @@ UINT32 multi8_state::screen_update_multi8(screen_device &screen, bitmap_ind16 &b
for (yc=0; yc<(mc6845_tile_height-(mc6845_cursor_y_start & 7)); yc++)
{
for (xc=0; xc<8; xc++)
multi8_draw_pixel(machine(),bitmap, y*mc6845_tile_height+yc, x*8+xc,0x07,(m_display_reg & 0x40) == 0x00);
multi8_draw_pixel(bitmap, y*mc6845_tile_height+yc, x*8+xc,0x07,(m_display_reg & 0x40) == 0x00);
}
}

174
src/mess/drivers/mz2500.c
View File

@ -196,14 +196,18 @@ public:
DECLARE_WRITE_LINE_MEMBER(pit8253_clk0_irq);
DECLARE_WRITE_LINE_MEMBER(mz2500_rtc_alarm_irq);
void draw_80x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,UINT16 map_addr);
void draw_40x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,UINT16 map_addr);
void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int pri);
void draw_cg16_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int x_size,int pri);
void draw_cg256_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int pri);
void draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect);
void draw_cg_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int pri);
void draw_80x25(bitmap_ind16 &bitmap,const rectangle &cliprect,UINT16 map_addr);
void draw_40x25(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,UINT16 map_addr);
void draw_cg4_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int pri);
void draw_cg16_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int x_size,int pri);
void draw_cg256_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int pri);
void draw_tv_screen(bitmap_ind16 &bitmap,const rectangle &cliprect);
void draw_cg_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int pri);
void mz2500_draw_pixel(bitmap_ind16 &bitmap,int x,int y,UINT16 pen,UINT8 width,UINT8 height);
void mz2500_reconfigure_screen();
UINT8 pal_256_param(int index, int param);
void mz2500_reset(mz2500_state *state, UINT8 type);
};
@ -212,7 +216,6 @@ public:
#define WRAM_RESET 0
#define IPL_RESET 1
static void mz2500_reset(mz2500_state *state, UINT8 type);
static const UINT8 bank_reset_val[2][8] =
{
{ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 },
@ -236,30 +239,30 @@ void mz2500_state::video_start()
*/
/* helper function, to draw stuff without getting crazy with height / width conditions :) */
static void mz2500_draw_pixel(running_machine &machine, bitmap_ind16 &bitmap,int x,int y,UINT16 pen,UINT8 width,UINT8 height)
void mz2500_state::mz2500_draw_pixel(bitmap_ind16 &bitmap,int x,int y,UINT16 pen,UINT8 width,UINT8 height)
{
if(width && height)
{
bitmap.pix16(y*2+0, x*2+0) = machine.pens[pen];
bitmap.pix16(y*2+0, x*2+1) = machine.pens[pen];
bitmap.pix16(y*2+1, x*2+0) = machine.pens[pen];
bitmap.pix16(y*2+1, x*2+1) = machine.pens[pen];
bitmap.pix16(y*2+0, x*2+0) = machine().pens[pen];
bitmap.pix16(y*2+0, x*2+1) = machine().pens[pen];
bitmap.pix16(y*2+1, x*2+0) = machine().pens[pen];
bitmap.pix16(y*2+1, x*2+1) = machine().pens[pen];
}
else if(width)
{
bitmap.pix16(y, x*2+0) = machine.pens[pen];
bitmap.pix16(y, x*2+1) = machine.pens[pen];
bitmap.pix16(y, x*2+0) = machine().pens[pen];
bitmap.pix16(y, x*2+1) = machine().pens[pen];
}
else if(height)
{
bitmap.pix16(y*2+0, x) = machine.pens[pen];
bitmap.pix16(y*2+1, x) = machine.pens[pen];
bitmap.pix16(y*2+0, x) = machine().pens[pen];
bitmap.pix16(y*2+1, x) = machine().pens[pen];
}
else
bitmap.pix16(y, x) = machine.pens[pen];
bitmap.pix16(y, x) = machine().pens[pen];
}
void mz2500_state::draw_80x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,UINT16 map_addr)
void mz2500_state::draw_80x25(bitmap_ind16 &bitmap,const rectangle &cliprect,UINT16 map_addr)
{
UINT8 *vram = m_main_ram; // TODO
int x,y,count,xi,yi;
@ -337,7 +340,7 @@ void mz2500_state::draw_80x25(running_machine &machine, bitmap_ind16 &bitmap,con
if(pen)
{
if((res_y) >= 0 && (res_y) < 200*y_step)
mz2500_draw_pixel(machine,bitmap,res_x,res_y,pen+(m_pal_select ? 0x00 : 0x10),0,0);
mz2500_draw_pixel(bitmap,res_x,res_y,pen+(m_pal_select ? 0x00 : 0x10),0,0);
}
}
}
@ -348,7 +351,7 @@ void mz2500_state::draw_80x25(running_machine &machine, bitmap_ind16 &bitmap,con
}
}
void mz2500_state::draw_40x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,UINT16 map_addr)
void mz2500_state::draw_40x25(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,UINT16 map_addr)
{
UINT8 *vram = m_main_ram; // TODO
int x,y,count,xi,yi;
@ -427,7 +430,7 @@ void mz2500_state::draw_40x25(running_machine &machine, bitmap_ind16 &bitmap,con
if(pen)
{
if((res_y) >= 0 && (res_y) < 200*y_step)
mz2500_draw_pixel(machine,bitmap,res_x,res_y,pen+(m_pal_select ? 0x00 : 0x10),m_scr_x_size == 640,0);
mz2500_draw_pixel(bitmap,res_x,res_y,pen+(m_pal_select ? 0x00 : 0x10),m_scr_x_size == 640,0);
}
}
}
@ -438,7 +441,7 @@ void mz2500_state::draw_40x25(running_machine &machine, bitmap_ind16 &bitmap,con
}
}
void mz2500_state::draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int pri)
void mz2500_state::draw_cg4_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int pri)
{
UINT32 count;
UINT8 *vram = m_main_ram; // TODO
@ -471,7 +474,7 @@ void mz2500_state::draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitma
{
//if(pri == ((m_clut256[pen] & 0x100) >> 8))
mz2500_draw_pixel(machine,bitmap,res_x,res_y,pen,0,0);
mz2500_draw_pixel(bitmap,res_x,res_y,pen,0,0);
}
}
count++;
@ -479,7 +482,7 @@ void mz2500_state::draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitma
}
}
void mz2500_state::draw_cg16_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int x_size,int pri)
void mz2500_state::draw_cg16_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int x_size,int pri)
{
UINT32 count;
UINT8 *vram = m_main_ram; //TODO
@ -526,7 +529,7 @@ void mz2500_state::draw_cg16_screen(running_machine &machine, bitmap_ind16 &bitm
pen |= pen_bit[pen_i];
if(pri == ((m_clut16[pen] & 0x10) >> 4) && m_clut16[pen] != 0x00 && pen_mask) //correct?
mz2500_draw_pixel(machine,bitmap,res_x,res_y,(m_clut16[pen] & 0x0f)+0x10,(x_size == 320 && m_scr_x_size == 640),cg_interlace == 2);
mz2500_draw_pixel(bitmap,res_x,res_y,(m_clut16[pen] & 0x0f)+0x10,(x_size == 320 && m_scr_x_size == 640),cg_interlace == 2);
}
count++;
count&=((base_mask<<8) | 0xff);
@ -536,7 +539,7 @@ void mz2500_state::draw_cg16_screen(running_machine &machine, bitmap_ind16 &bitm
}
}
void mz2500_state::draw_cg256_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int pri)
void mz2500_state::draw_cg256_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,int pri)
{
UINT32 count;
UINT8 *vram = m_main_ram;
@ -583,7 +586,7 @@ void mz2500_state::draw_cg256_screen(running_machine &machine, bitmap_ind16 &bit
pen |= pen_bit[pen_i];
if(pri == ((m_clut256[pen] & 0x100) >> 8))
mz2500_draw_pixel(machine,bitmap,res_x,res_y,(m_clut256[pen] & 0xff)+0x100,m_scr_x_size == 640,cg_interlace == 2);
mz2500_draw_pixel(bitmap,res_x,res_y,(m_clut256[pen] & 0xff)+0x100,m_scr_x_size == 640,cg_interlace == 2);
}
count++;
count&=((base_mask<<8) | 0xff);
@ -593,7 +596,7 @@ void mz2500_state::draw_cg256_screen(running_machine &machine, bitmap_ind16 &bit
}
}
void mz2500_state::draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect)
void mz2500_state::draw_tv_screen(bitmap_ind16 &bitmap,const rectangle &cliprect)
{
UINT16 base_addr;
@ -603,7 +606,7 @@ void mz2500_state::draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap
// popmessage("%d %d %d %d",m_tv_hs,(m_tv_he),m_tv_vs,(m_tv_ve));
if(m_text_col_size)
draw_80x25(machine,bitmap,cliprect,base_addr);
draw_80x25(bitmap,cliprect,base_addr);
else
{
int tv_mode;
@ -613,24 +616,24 @@ void mz2500_state::draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap
switch(tv_mode & 3)
{
case 0: //mixed 6bpp mode, TODO
draw_40x25(machine,bitmap,cliprect,0,base_addr);
draw_40x25(bitmap,cliprect,0,base_addr);
break;
case 1:
draw_40x25(machine,bitmap,cliprect,0,base_addr);
draw_40x25(bitmap,cliprect,0,base_addr);
break;
case 2:
draw_40x25(machine,bitmap,cliprect,1,base_addr);
draw_40x25(bitmap,cliprect,1,base_addr);
break;
case 3:
draw_40x25(machine,bitmap,cliprect,1,base_addr);
draw_40x25(machine,bitmap,cliprect,0,base_addr);
draw_40x25(bitmap,cliprect,1,base_addr);
draw_40x25(bitmap,cliprect,0,base_addr);
break;
//default: popmessage("%02x %02x %02x",tv_mode & 3,m_text_reg[1],m_text_reg[2]); break;
}
}
}
void mz2500_state::draw_cg_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int pri)
void mz2500_state::draw_cg_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int pri)
{
//popmessage("%02x %02x",m_cg_reg[0x0e],m_cg_reg[0x18]);
@ -639,24 +642,24 @@ void mz2500_state::draw_cg_screen(running_machine &machine, bitmap_ind16 &bitmap
case 0x00:
break;
case 0x03:
draw_cg4_screen(machine,bitmap,cliprect,0);
draw_cg4_screen(bitmap,cliprect,0);
break;
case 0x14:
draw_cg16_screen(machine,bitmap,cliprect,0,320,pri);
draw_cg16_screen(machine,bitmap,cliprect,1,320,pri);
draw_cg16_screen(bitmap,cliprect,0,320,pri);
draw_cg16_screen(bitmap,cliprect,1,320,pri);
break;
case 0x15:
draw_cg16_screen(machine,bitmap,cliprect,1,320,pri);
draw_cg16_screen(machine,bitmap,cliprect,0,320,pri);
draw_cg16_screen(bitmap,cliprect,1,320,pri);
draw_cg16_screen(bitmap,cliprect,0,320,pri);
break;
case 0x17:
draw_cg16_screen(machine,bitmap,cliprect,0,640,pri);
draw_cg16_screen(bitmap,cliprect,0,640,pri);
break;
case 0x1d:
draw_cg256_screen(machine,bitmap,cliprect,0,pri);
draw_cg256_screen(bitmap,cliprect,0,pri);
break;
case 0x97:
draw_cg16_screen(machine,bitmap,cliprect,2,640,pri);
draw_cg16_screen(bitmap,cliprect,2,640,pri);
break;
default:
popmessage("Unsupported CG mode %02x, contact MESS dev",m_cg_reg[0x0e]);
@ -671,9 +674,9 @@ UINT32 mz2500_state::screen_update_mz2500(screen_device &screen, bitmap_ind16 &b
if(m_screen_enable)
return 0;
draw_cg_screen(machine(),bitmap,cliprect,0);
draw_tv_screen(machine(),bitmap,cliprect);
draw_cg_screen(machine(),bitmap,cliprect,1);
draw_cg_screen(bitmap,cliprect,0);
draw_tv_screen(bitmap,cliprect);
draw_cg_screen(bitmap,cliprect,1);
// popmessage("%02x (%02x %02x) (%02x %02x) (%02x %02x) (%02x %02x)",m_cg_reg[0x0f],m_cg_reg[0x10],m_cg_reg[0x11],m_cg_reg[0x12],m_cg_reg[0x13],m_cg_reg[0x14],m_cg_reg[0x15],m_cg_reg[0x16],m_cg_reg[0x17]);
// popmessage("%02x",m_text_reg[0x0f]);
@ -681,46 +684,45 @@ UINT32 mz2500_state::screen_update_mz2500(screen_device &screen, bitmap_ind16 &b
return 0;
}
static void mz2500_reconfigure_screen(running_machine &machine)
void mz2500_state::mz2500_reconfigure_screen()
{
mz2500_state *state = machine.driver_data<mz2500_state>();
rectangle visarea;
if((state->m_cg_reg[0x0e] & 0x1f) == 0x17 || (state->m_cg_reg[0x0e] & 0x1f) == 0x03 || state->m_text_col_size)
state->m_scr_x_size = 640;
if((m_cg_reg[0x0e] & 0x1f) == 0x17 || (m_cg_reg[0x0e] & 0x1f) == 0x03 || m_text_col_size)
m_scr_x_size = 640;
else
state->m_scr_x_size = 320;
m_scr_x_size = 320;
if((state->m_cg_reg[0x0e] & 0x1f) == 0x03)
state->m_scr_y_size = 400;
if((m_cg_reg[0x0e] & 0x1f) == 0x03)
m_scr_y_size = 400;
else
state->m_scr_y_size = 200 * ((state->m_text_font_reg) ? 1 : 2);
m_scr_y_size = 200 * ((m_text_font_reg) ? 1 : 2);
visarea.set(0, state->m_scr_x_size - 1, 0, state->m_scr_y_size - 1);
visarea.set(0, m_scr_x_size - 1, 0, m_scr_y_size - 1);
//popmessage("%d %d %d %d %02x",vs,ve,hs,he,state->m_cg_reg[0x0e]);
//popmessage("%d %d %d %d %02x",vs,ve,hs,he,m_cg_reg[0x0e]);
machine.primary_screen->configure(720, 480, visarea, machine.primary_screen->frame_period().attoseconds);
machine().primary_screen->configure(720, 480, visarea, machine().primary_screen->frame_period().attoseconds);
/* calculate CG window parameters here */
state->m_cg_vs = (state->m_cg_reg[0x08]) | ((state->m_cg_reg[0x09]<<8) & 1);
state->m_cg_ve = (state->m_cg_reg[0x0a]) | ((state->m_cg_reg[0x0b]<<8) & 1);
state->m_cg_hs = ((state->m_cg_reg[0x0c] & 0x7f)*8);
state->m_cg_he = ((state->m_cg_reg[0x0d] & 0x7f)*8);
m_cg_vs = (m_cg_reg[0x08]) | ((m_cg_reg[0x09]<<8) & 1);
m_cg_ve = (m_cg_reg[0x0a]) | ((m_cg_reg[0x0b]<<8) & 1);
m_cg_hs = ((m_cg_reg[0x0c] & 0x7f)*8);
m_cg_he = ((m_cg_reg[0x0d] & 0x7f)*8);
if(state->m_scr_x_size == 320)
if(m_scr_x_size == 320)
{
state->m_cg_hs /= 2;
state->m_cg_he /= 2;
m_cg_hs /= 2;
m_cg_he /= 2;
}
/* calculate TV window parameters here */
{
int x_offs,y_offs;
state->m_monitor_type = ((state->m_text_reg[0x0f] & 0x08) >> 3);
m_monitor_type = ((m_text_reg[0x0f] & 0x08) >> 3);
switch((state->m_monitor_type|state->m_text_col_size<<1) & 3)
switch((m_monitor_type|m_text_col_size<<1) & 3)
{
default:
case 0: x_offs = 64; break;
@ -728,25 +730,25 @@ static void mz2500_reconfigure_screen(running_machine &machine)
case 2: x_offs = 72; break;
case 3: x_offs = 88; break;
}
//printf("%d %d %d\n",x_offs,(state->m_text_reg[7] & 0x7f) * 8,(state->m_text_reg[8] & 0x7f)* 8);
//printf("%d %d %d\n",x_offs,(m_text_reg[7] & 0x7f) * 8,(m_text_reg[8] & 0x7f)* 8);
y_offs = (state->m_monitor_type) ? 76 : 34;
y_offs = (m_monitor_type) ? 76 : 34;
state->m_tv_hs = ((state->m_text_reg[7] & 0x7f)*8) - x_offs;
state->m_tv_he = ((state->m_text_reg[8] & 0x7f)*8) - x_offs;
state->m_tv_vs = (state->m_text_reg[3]*2) - y_offs;
state->m_tv_ve = (state->m_text_reg[5]*2) - y_offs;
m_tv_hs = ((m_text_reg[7] & 0x7f)*8) - x_offs;
m_tv_he = ((m_text_reg[8] & 0x7f)*8) - x_offs;
m_tv_vs = (m_text_reg[3]*2) - y_offs;
m_tv_ve = (m_text_reg[5]*2) - y_offs;
if(state->m_scr_x_size == 320)
if(m_scr_x_size == 320)
{
state->m_tv_hs /= 2;
state->m_tv_he /= 2;
m_tv_hs /= 2;
m_tv_he /= 2;
}
if(state->m_scr_y_size == 200)
if(m_scr_y_size == 200)
{
state->m_tv_vs /= 2;
state->m_tv_ve /= 2;
m_tv_vs /= 2;
m_tv_ve /= 2;
}
}
}
@ -1050,7 +1052,7 @@ TVRAM / CRTC registers
[0x0f] ---- x--- sets monitor type interlace / progressive
*/
static UINT8 pal_256_param(int index, int param)
UINT8 mz2500_state::pal_256_param(int index, int param)
{
UINT8 val = 0;
@ -1084,7 +1086,7 @@ WRITE8_MEMBER(mz2500_state::mz2500_tv_crtc_w)
#endif
//popmessage("%d %02x %d %02x %d %d",m_text_reg[3],m_text_reg[4],m_text_reg[5],m_text_reg[6],m_text_reg[7]*8,m_text_reg[8]*8);
mz2500_reconfigure_screen(machine());
mz2500_reconfigure_screen();
if(m_text_reg_index == 0x0a) // set 256 color palette
{
@ -1140,7 +1142,7 @@ WRITE8_MEMBER(mz2500_state::mz2500_tv_crtc_w)
case 3:
/* Font size reg */
m_text_font_reg = data & 1;
mz2500_reconfigure_screen(machine());
mz2500_reconfigure_screen();
break;
}
}
@ -1389,7 +1391,7 @@ WRITE8_MEMBER(mz2500_state::mz2500_cg_data_w)
}
{
mz2500_reconfigure_screen(machine());
mz2500_reconfigure_screen();
}
if(m_cg_reg_index & 0x80) //enable auto-inc
@ -1722,12 +1724,12 @@ static INPUT_PORTS_START( mz2500 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static void mz2500_reset(mz2500_state *state, UINT8 type)
void mz2500_state::mz2500_reset(mz2500_state *state, UINT8 type)
{
int i;
for(i=0;i<8;i++)
state->m_bank_val[i] = bank_reset_val[type][i];
m_bank_val[i] = bank_reset_val[type][i];
}
static const gfx_layout mz2500_pcg_layout_1bpp =
@ -1945,7 +1947,7 @@ WRITE8_MEMBER(mz2500_state::mz2500_pio1_porta_w)
{
m_text_col_size = ((data & 0x20) >> 5);
m_prev_col_val = m_text_col_size;
mz2500_reconfigure_screen(machine());
mz2500_reconfigure_screen();
}
m_key_mux = data & 0x1f;
}

3
src/mess/drivers/n64.c
View File

@ -25,6 +25,7 @@ public:
DECLARE_MACHINE_START(n64dd);
INTERRUPT_GEN_MEMBER(n64_reset_poll);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(n64_cart);
void mempak_format(UINT8* pak);
};
READ32_MEMBER(n64_mess_state::dd_null_r)
@ -141,7 +142,7 @@ static const mips3_config config =
62500000 /* system clock */
};
static void mempak_format(UINT8* pak)
void n64_mess_state::mempak_format(UINT8* pak)
{
unsigned char pak_header[] =
{

4
src/mess/drivers/nanos.c
View File

@ -90,6 +90,7 @@ protected:
required_ioport m_line5;
required_ioport m_line6;
required_ioport m_linec;
UINT8 row_number(UINT8 code);
};
@ -366,7 +367,8 @@ WRITE8_MEMBER(nanos_state::nanos_port_b_w)
}
}
static UINT8 row_number(UINT8 code) {
UINT8 nanos_state::row_number(UINT8 code)
{
if BIT(code,0) return 0;
if BIT(code,1) return 1;
if BIT(code,2) return 2;

3
src/mess/drivers/ng_aes.c
View File

@ -210,6 +210,7 @@ protected:
required_ioport m_io_ctrlsel;
void common_machine_start();
INT32 SekIdle(INT32 nCycles);
};
@ -688,7 +689,7 @@ void ng_aes_state::set_DMA_regs(int offset, UINT16 wordValue)
static INT32 SekIdle(INT32 nCycles)
INT32 ng_aes_state::SekIdle(INT32 nCycles)
{
return nCycles;
}

41
src/mess/drivers/palmz22.c
View File

@ -71,19 +71,6 @@ end
#define VERBOSE_LEVEL ( 0 )
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine.describe_context(), buf);
}
}
class palmz22_state : public driver_device
{
public:
@ -102,8 +89,23 @@ public:
virtual void machine_start();
virtual void machine_reset();
DECLARE_INPUT_CHANGED_MEMBER(palmz22_input_changed);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ...);
};
inline void ATTR_PRINTF(3,4) palmz22_state::verboselog( int n_level, const char *s_fmt, ...)
{
if (VERBOSE_LEVEL >= n_level)
{
va_list v;
char buf[32768];
va_start( v, s_fmt);
vsprintf( buf, s_fmt, v);
va_end( v);
logerror( "%s: %s", machine().describe_context(), buf);
}
}
/***************************************************************************
MACHINE HARDWARE
***************************************************************************/
@ -113,14 +115,14 @@ public:
static WRITE8_DEVICE_HANDLER( s3c2410_nand_command_w )
{
palmz22_state *state = space.machine().driver_data<palmz22_state>();
verboselog( space.machine(), 9, "s3c2410_nand_command_w %02X\n", data);
state->verboselog(9, "s3c2410_nand_command_w %02X\n", data);
state->m_nand->command_w(data);
}
static WRITE8_DEVICE_HANDLER( s3c2410_nand_address_w )
{
palmz22_state *state = space.machine().driver_data<palmz22_state>();
verboselog( space.machine(), 9, "s3c2410_nand_address_w %02X\n", data);
state->verboselog(9, "s3c2410_nand_address_w %02X\n", data);
state->m_nand->address_w(data);
}
@ -128,14 +130,14 @@ static READ8_DEVICE_HANDLER( s3c2410_nand_data_r )
{
palmz22_state *state = space.machine().driver_data<palmz22_state>();
UINT8 data = state->m_nand->data_r();
verboselog( space.machine(), 9, "s3c2410_nand_data_r %02X\n", data);
state->verboselog(9, "s3c2410_nand_data_r %02X\n", data);
return data;
}
static WRITE8_DEVICE_HANDLER( s3c2410_nand_data_w )
{
palmz22_state *state = space.machine().driver_data<palmz22_state>();
verboselog( space.machine(), 9, "s3c2410_nand_data_w %02X\n", data);
state->verboselog(9, "s3c2410_nand_data_w %02X\n", data);
state->m_nand->data_w(data);
}
@ -143,7 +145,7 @@ ATTR_UNUSED static READ8_DEVICE_HANDLER( s3c2410_nand_busy_r )
{
palmz22_state *state = device->machine().driver_data<palmz22_state>();
UINT8 data = state->m_nand->is_busy();
verboselog( device->machine(), 9, "s3c2410_nand_busy_r %02X\n", data);
state->verboselog(9, "s3c2410_nand_busy_r %02X\n", data);
return data;
}
@ -212,6 +214,7 @@ static int s3c2410_core_pin_r( device_t *device, int pin)
static READ32_DEVICE_HANDLER( s3c2410_adc_data_r )
{
palmz22_state *state = device->machine().driver_data<palmz22_state>();
UINT32 data = 0;
switch (offset)
{
@ -220,7 +223,7 @@ static READ32_DEVICE_HANDLER( s3c2410_adc_data_r )
case 2 + 0 : data = space.machine().root_device().ioport( "PENX")->read(); break;
case 2 + 1 : data = 0x3FF - space.machine().root_device().ioport( "PENY")->read(); break;
}
verboselog( space.machine(), 5, "s3c2410_adc_data_r %08X\n", data);
state->verboselog(5, "s3c2410_adc_data_r %08X\n", data);
return data;
}

15
src/mess/drivers/pasogo.c
View File

@ -74,6 +74,8 @@ public:
TIMER_DEVICE_CALLBACK_MEMBER(vg230_timer);
DECLARE_WRITE_LINE_MEMBER(pasogo_pic8259_set_int_line);
IRQ_CALLBACK_MEMBER(pasogo_irq_callback);
void vg230_reset();
void vg230_init();
};
@ -107,15 +109,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(pasogo_state::vg230_timer)
}
}
static void vg230_reset(running_machine &machine)
void pasogo_state::vg230_reset()
{
pasogo_state *state = machine.driver_data<pasogo_state>();
vg230_t *vg230 = &state->m_vg230;
vg230_t *vg230 = &m_vg230;
system_time systime;
memset(vg230, 0, sizeof(*vg230));
vg230->pmu.write_protected=TRUE;
machine.base_datetime(systime);
machine().base_datetime(systime);
vg230->rtc.seconds= systime.local_time.second;
vg230->rtc.minutes= systime.local_time.minute;
@ -125,9 +126,9 @@ static void vg230_reset(running_machine &machine)
vg230->bios_timer.data=0x7200; // HACK
}
static void vg230_init(running_machine &machine)
void pasogo_state::vg230_init()
{
vg230_reset(machine);
vg230_reset();
}
@ -547,7 +548,7 @@ ROM_END
DRIVER_INIT_MEMBER(pasogo_state,pasogo)
{
vg230_init(machine());
vg230_init();
memset(&m_ems, 0, sizeof(m_ems));
membank( "bank27" )->set_base( machine().root_device().memregion("user1")->base() + 0x00000 );
membank( "bank28" )->set_base( memregion("maincpu")->base() + 0xb8000/*?*/ );

59
src/mess/drivers/pasopia7.c
View File

@ -116,6 +116,9 @@ public:
void fdc_irq(bool state);
TIMER_CALLBACK_MEMBER(pio_timer);
void draw_cg4_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width);
void draw_tv_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width);
void draw_mixed_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width);
};
#define VDP_CLOCK XTAL_3_579545MHz/4
@ -132,9 +135,9 @@ VIDEO_START_MEMBER(pasopia7_state,pasopia7)
m_p7_pal = auto_alloc_array(machine(), UINT8, 0x10);
}
static void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
void pasopia7_state::draw_cg4_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
{
UINT8 *vram = machine.root_device().memregion("vram")->base();
UINT8 *vram = machine().root_device().memregion("vram")->base();
int x,y,xi,yi;
int count;
@ -155,7 +158,7 @@ static void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const
color = pen_g<<2 | pen_r<<1 | pen_b<<0;
bitmap.pix16(y+yi, x+xi) = machine.pens[color];
bitmap.pix16(y+yi, x+xi) = machine().pens[color];
}
count+=8;
}
@ -163,11 +166,10 @@ static void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const
}
}
static void draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
void pasopia7_state::draw_tv_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
{
pasopia7_state *state = machine.driver_data<pasopia7_state>();
UINT8 *vram = machine.root_device().memregion("vram")->base();
UINT8 *gfx_data = state->memregion("font")->base();
UINT8 *vram = machine().root_device().memregion("vram")->base();
UINT8 *gfx_data = memregion("font")->base();
int x,y,xi,yi;
int count;
@ -188,31 +190,31 @@ static void draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const
int pen;
pen = ((gfx_data[tile*8+yi]>>(7-xi)) & 1) ? color : 0;
bitmap.pix16(y*8+yi, x*8+xi) = machine.pens[pen];
bitmap.pix16(y*8+yi, x*8+xi) = machine().pens[pen];
}
}
// draw cursor
if(state->m_cursor_addr*8 == count)
if(m_cursor_addr*8 == count)
{
int xc,yc,cursor_on;
cursor_on = 0;
switch(state->m_cursor_raster & 0x60)
switch(m_cursor_raster & 0x60)
{
case 0x00: cursor_on = 1; break; //always on
case 0x20: cursor_on = 0; break; //always off
case 0x40: if(machine.primary_screen->frame_number() & 0x10) { cursor_on = 1; } break; //fast blink
case 0x60: if(machine.primary_screen->frame_number() & 0x20) { cursor_on = 1; } break; //slow blink
case 0x40: if(machine().primary_screen->frame_number() & 0x10) { cursor_on = 1; } break; //fast blink
case 0x60: if(machine().primary_screen->frame_number() & 0x20) { cursor_on = 1; } break; //slow blink
}
if(cursor_on)
{
for(yc=0;yc<(8-(state->m_cursor_raster & 7));yc++)
for(yc=0;yc<(8-(m_cursor_raster & 7));yc++)
{
for(xc=0;xc<8;xc++)
{
bitmap.pix16(y*8-yc+7, x*8+xc) = machine.pens[7];
bitmap.pix16(y*8-yc+7, x*8+xc) = machine().pens[7];
}
}
}
@ -222,11 +224,10 @@ static void draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const
}
}
static void draw_mixed_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
void pasopia7_state::draw_mixed_screen(bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
{
pasopia7_state *state = machine.driver_data<pasopia7_state>();
UINT8 *vram = machine.root_device().memregion("vram")->base();
UINT8 *gfx_data = state->memregion("font")->base();
UINT8 *vram = machine().root_device().memregion("vram")->base();
UINT8 *gfx_data = memregion("font")->base();
int x,y,xi,yi;
int count;
@ -254,7 +255,7 @@ static void draw_mixed_screen(running_machine &machine, bitmap_ind16 &bitmap,con
pen = pen_g<<2 | pen_r<<1 | pen_b<<0;
bitmap.pix16(y*8+yi, x*8+xi) = machine.pens[pen];
bitmap.pix16(y*8+yi, x*8+xi) = machine().pens[pen];
}
}
else
@ -266,32 +267,32 @@ static void draw_mixed_screen(running_machine &machine, bitmap_ind16 &bitmap,con
int pen;
pen = ((gfx_data[tile*8+yi]>>(7-xi)) & 1) ? color : 0;
bitmap.pix16(y*8+yi, x*8+xi) = machine.pens[pen];
bitmap.pix16(y*8+yi, x*8+xi) = machine().pens[pen];
}
}
}
// draw cursor
if(state->m_cursor_addr*8 == count)
if(m_cursor_addr*8 == count)
{
int xc,yc,cursor_on;
cursor_on = 0;
switch(state->m_cursor_raster & 0x60)
switch(m_cursor_raster & 0x60)
{
case 0x00: cursor_on = 1; break; //always on
case 0x20: cursor_on = 0; break; //always off
case 0x40: if(machine.primary_screen->frame_number() & 0x10) { cursor_on = 1; } break; //fast blink
case 0x60: if(machine.primary_screen->frame_number() & 0x20) { cursor_on = 1; } break; //slow blink
case 0x40: if(machine().primary_screen->frame_number() & 0x10) { cursor_on = 1; } break; //fast blink
case 0x60: if(machine().primary_screen->frame_number() & 0x20) { cursor_on = 1; } break; //slow blink
}
if(cursor_on)
{
for(yc=0;yc<(8-(state->m_cursor_raster & 7));yc++)
for(yc=0;yc<(8-(m_cursor_raster & 7));yc++)
{
for(xc=0;xc<8;xc++)
{
bitmap.pix16(y*8-yc+7, x*8+xc) = machine.pens[7];
bitmap.pix16(y*8-yc+7, x*8+xc) = machine().pens[7];
}
}
}
@ -311,11 +312,11 @@ UINT32 pasopia7_state::screen_update_pasopia7(screen_device &screen, bitmap_ind1
width = m_x_width ? 80 : 40;
if(m_gfx_mode)
draw_mixed_screen(machine(),bitmap,cliprect,width);
draw_mixed_screen(bitmap,cliprect,width);
else
{
draw_cg4_screen(machine(),bitmap,cliprect,width);
draw_tv_screen(machine(),bitmap,cliprect,width);
draw_cg4_screen(bitmap,cliprect,width);
draw_tv_screen(bitmap,cliprect,width);
}
return 0;

15
src/mess/drivers/pc6001.c
View File

@ -299,6 +299,9 @@ protected:
UINT8 check_joy_press();
UINT8 check_keyboard_press();
void vram_bank_change(UINT8 vram_bank);
ATTR_CONST UINT8 pc6001_get_attributes(UINT8 c,int scanline, int pos);
const UINT8 *pc6001_get_video_ram(int scanline);
UINT8 pc6001_get_char_rom(UINT8 ch, int line);
};
@ -838,11 +841,10 @@ WRITE8_MEMBER(pc6001_state::pc6001_system_latch_w)
}
#if 0
static ATTR_CONST UINT8 pc6001_get_attributes(running_machine &machine, UINT8 c,int scanline, int pos)
ATTR_CONST pc6001_state::UINT8 pc6001_get_attributes(UINT8 c,int scanline, int pos)
{
pc6001_state *state = machine.driver_data<pc6001_state>();
UINT8 result = 0x00;
UINT8 val = state->m_video_ram [(scanline / 12) * 0x20 + pos];
UINT8 val = m_video_ram [(scanline / 12) * 0x20 + pos];
if (val & 0x01) {
result |= M6847_INV;
@ -854,13 +856,12 @@ static ATTR_CONST UINT8 pc6001_get_attributes(running_machine &machine, UINT8 c,
return result;
}
static const UINT8 *pc6001_get_video_ram(running_machine &machine, int scanline)
const pc6001_state::UINT8 *pc6001_get_video_ram(int scanline)
{
pc6001_state *state = machine.driver_data<pc6001_state>();
return state->m_video_ram +0x0200+ (scanline / 12) * 0x20;
return m_video_ram +0x0200+ (scanline / 12) * 0x20;
}
static UINT8 pc6001_get_char_rom(running_machine &machine, UINT8 ch, int line)
UINT8 pc6001_state::pc6001_get_char_rom(UINT8 ch, int line)
{
UINT8 *gfx = m_region_gfx1->base();
return gfx[ch*16+line];

10
src/mess/drivers/pc8801.c
View File

@ -484,6 +484,7 @@ public:
DECLARE_READ8_MEMBER(opn_porta_r);
DECLARE_READ8_MEMBER(opn_portb_r);
IRQ_CALLBACK_MEMBER(pc8801_irq_callback);
void pc8801_raise_irq(UINT8 irq,UINT8 state);
};
@ -2268,20 +2269,19 @@ static const cassette_interface pc88_cassette_interface =
};
#ifdef USE_PROPER_I8214
void pc8801_raise_irq(running_machine &machine,UINT8 irq,UINT8 state)
void pc8801_state::pc8801_raise_irq(UINT8 irq,UINT8 state)
{
pc8801_state *drvstate = machine.driver_data<pc8801_state>();
if(state)
{
drvstate->m_int_state |= irq;
drvm_int_state |= irq;
drvstate->m_pic->r_w(~irq);
drvm_pic->r_w(~irq);
m_maincpu->set_input_line(0,ASSERT_LINE);
}
else
{
//drvstate->m_int_state &= ~irq;
//drvm_int_state &= ~irq;
//m_maincpu->set_input_line(0,CLEAR_LINE);
}

137
src/mess/drivers/pc88va.c
View File

@ -152,6 +152,19 @@ public:
DECLARE_FLOPPY_FORMATS( floppy_formats );
void pc88va_fdc_update_ready(floppy_image_device *, int);
IRQ_CALLBACK_MEMBER(pc88va_irq_callback);
void draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect);
UINT32 calc_kanji_rom_addr(UINT8 jis1,UINT8 jis2,int x,int y);
void draw_text(bitmap_rgb32 &bitmap, const rectangle &cliprect);
void tsp_sprite_enable(UINT32 spr_offset, UINT8 sw_bit);
void execute_sync_cmd();
void execute_dspon_cmd();
void execute_dspdef_cmd();
void execute_curdef_cmd();
void execute_actscr_cmd();
void execute_curs_cmd();
void execute_emul_cmd();
void execute_spron_cmd();
void execute_sprsw_cmd();
};
@ -160,13 +173,12 @@ void pc88va_state::video_start()
{
}
static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
void pc88va_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
pc88va_state *state = machine.driver_data<pc88va_state>();
UINT16 *tvram = (UINT16 *)(*state->memregion("tvram"));
UINT16 *tvram = (UINT16 *)(*memregion("tvram"));
int offs,i;
offs = state->m_tsp.spr_offset;
offs = m_tsp.spr_offset;
for(i=0;i<(0x100);i+=(8))
{
int xp,yp,sw,md,xsize,ysize,spda,fg_col,bc;
@ -221,7 +233,7 @@ static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const r
pen = pen & 1 ? fg_col : (bc) ? 8 : -1;
if(pen != -1) //transparent pen
bitmap.pix32(yp+y_i, xp+x_i+(x_s)) = machine.pens[pen];
bitmap.pix32(yp+y_i, xp+x_i+(x_s)) = machine().pens[pen];
}
spr_count+=2;
}
@ -246,7 +258,7 @@ static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const r
pen = (BITSWAP16(tvram[(spda+spr_count) / 2],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8)) >> (16-(x_s*8)) & 0xf;
//if(bc != -1) //transparent pen
bitmap.pix32(yp+y_i, xp+x_i+(x_s)) = machine.pens[pen];
bitmap.pix32(yp+y_i, xp+x_i+(x_s)) = machine().pens[pen];
}
spr_count+=2;
}
@ -256,7 +268,7 @@ static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const r
}
/* TODO: this is either a result of an hand-crafted ROM or the JIS stuff is really attribute related ... */
static UINT32 calc_kanji_rom_addr(UINT8 jis1,UINT8 jis2,int x,int y)
UINT32 pc88va_state::calc_kanji_rom_addr(UINT8 jis1,UINT8 jis2,int x,int y)
{
if(jis1 < 0x30)
return ((jis2 & 0x60) << 8) + ((jis1 & 0x07) << 10) + ((jis2 & 0x1f) << 5);
@ -270,11 +282,10 @@ static UINT32 calc_kanji_rom_addr(UINT8 jis1,UINT8 jis2,int x,int y)
return 0;
}
static void draw_text(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
void pc88va_state::draw_text(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
pc88va_state *state = machine.driver_data<pc88va_state>();
UINT8 *tvram = machine.root_device().memregion("tvram")->base();
UINT8 *kanji = state->memregion("kanji")->base();
UINT8 *tvram = machine().root_device().memregion("tvram")->base();
UINT8 *kanji = memregion("kanji")->base();
int xi,yi;
int x,y;
int res_x,res_y;
@ -288,12 +299,12 @@ static void draw_text(running_machine &machine, bitmap_rgb32 &bitmap, const rect
//UINT8 blink,dwidc,dwid,uline,hline;
UINT8 screen_fg_col,screen_bg_col;
count = (tvram[state->m_tsp.tvram_vreg_offset+0] | tvram[state->m_tsp.tvram_vreg_offset+1] << 8);
count = (tvram[m_tsp.tvram_vreg_offset+0] | tvram[m_tsp.tvram_vreg_offset+1] << 8);
attr_mode = tvram[state->m_tsp.tvram_vreg_offset+0xa] & 0x1f;
attr_mode = tvram[m_tsp.tvram_vreg_offset+0xa] & 0x1f;
/* Note: bug in docs has the following two reversed */
screen_fg_col = (tvram[state->m_tsp.tvram_vreg_offset+0xb] & 0xf0) >> 4;
screen_bg_col = tvram[state->m_tsp.tvram_vreg_offset+0xb] & 0x0f;
screen_fg_col = (tvram[m_tsp.tvram_vreg_offset+0xb] & 0xf0) >> 4;
screen_bg_col = tvram[m_tsp.tvram_vreg_offset+0xb] & 0x0f;
for(y=0;y<13;y++)
{
@ -305,7 +316,7 @@ static void draw_text(running_machine &machine, bitmap_rgb32 &bitmap, const rect
tile_num = calc_kanji_rom_addr(jis1,jis2,x,y);
attr = (tvram[count+state->m_tsp.attr_offset] & 0x00ff);
attr = (tvram[count+m_tsp.attr_offset] & 0x00ff);
fg_col = bg_col = reverse = secret = 0; //blink = dwidc = dwid = uline = hline = 0;
@ -442,7 +453,7 @@ static void draw_text(running_machine &machine, bitmap_rgb32 &bitmap, const rect
if(secret) { pen = 0; } //hide text
if(pen != -1) //transparent
bitmap.pix32(res_y, res_x) = machine.pens[pen];
bitmap.pix32(res_y, res_x) = machine().pens[pen];
}
}
@ -496,8 +507,8 @@ UINT32 pc88va_state::screen_update_pc88va(screen_device &screen, bitmap_rgb32 &b
{
switch(cur_pri_lv & 3) // (palette color mode)
{
case 0: draw_text(machine(),bitmap,cliprect); break;
case 1: if(m_tsp.spr_on) { draw_sprites(machine(),bitmap,cliprect); } break;
case 0: draw_text(bitmap,cliprect); break;
case 1: if(m_tsp.spr_on) { draw_sprites(bitmap,cliprect); } break;
case 2: /* A = graphic 0 */ break;
case 3: /* B = graphic 1 */ break;
}
@ -697,18 +708,17 @@ WRITE8_MEMBER(pc88va_state::idp_command_w)
}
}
static void tsp_sprite_enable(running_machine &machine, UINT32 spr_offset, UINT8 sw_bit)
void pc88va_state::tsp_sprite_enable(UINT32 spr_offset, UINT8 sw_bit)
{
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
space.write_word(spr_offset, space.read_word(spr_offset) & ~0x200);
space.write_word(spr_offset, space.read_word(spr_offset) | (sw_bit & 0x200));
}
/* TODO: very preliminary, needs something showable first */
static void execute_sync_cmd(running_machine &machine)
void pc88va_state::execute_sync_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
???? ???? [0] - unknown
???? ???? [1] - unknown
@ -736,8 +746,8 @@ static void execute_sync_cmd(running_machine &machine)
//printf("V border end: %d\n",(sync_cmd[0xc]));
//printf("V blank end: %d\n",(sync_cmd[0xd]));
x_vis_area = state->m_buf_ram[4] * 4;
y_vis_area = (state->m_buf_ram[0xa])|((state->m_buf_ram[0xb] & 0x40)<<2);
x_vis_area = m_buf_ram[4] * 4;
y_vis_area = (m_buf_ram[0xa])|((m_buf_ram[0xb] & 0x40)<<2);
visarea.set(0, x_vis_area - 1, 0, y_vis_area - 1);
@ -748,24 +758,22 @@ static void execute_sync_cmd(running_machine &machine)
refresh = HZ_TO_ATTOSECONDS(60);
machine.primary_screen->configure(640, 480, visarea, refresh);
machine().primary_screen->configure(640, 480, visarea, refresh);
}
static void execute_dspon_cmd(running_machine &machine)
void pc88va_state::execute_dspon_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
[0] text table offset (hi word)
[1] unknown
[2] unknown
*/
state->m_tsp.tvram_vreg_offset = state->m_buf_ram[0] << 8;
state->m_tsp.disp_on = 1;
m_tsp.tvram_vreg_offset = m_buf_ram[0] << 8;
m_tsp.disp_on = 1;
}
static void execute_dspdef_cmd(running_machine &machine)
void pc88va_state::execute_dspdef_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
[0] attr offset (lo word)
[1] attr offset (hi word)
@ -774,16 +782,15 @@ static void execute_dspdef_cmd(running_machine &machine)
[4] hline vertical position
[5] blink number
*/
state->m_tsp.attr_offset = state->m_buf_ram[0] | state->m_buf_ram[1] << 8;
state->m_tsp.pitch = (state->m_buf_ram[2] & 0xf0) >> 4;
state->m_tsp.line_height = state->m_buf_ram[3] + 1;
state->m_tsp.h_line_pos = state->m_buf_ram[4];
state->m_tsp.blink = (state->m_buf_ram[5] & 0xf8) >> 3;
m_tsp.attr_offset = m_buf_ram[0] | m_buf_ram[1] << 8;
m_tsp.pitch = (m_buf_ram[2] & 0xf0) >> 4;
m_tsp.line_height = m_buf_ram[3] + 1;
m_tsp.h_line_pos = m_buf_ram[4];
m_tsp.blink = (m_buf_ram[5] & 0xf8) >> 3;
}
static void execute_curdef_cmd(running_machine &machine)
void pc88va_state::execute_curdef_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
xxxx x--- [0] Sprite Cursor number (sprite RAM entry)
---- --x- [0] show cursor bit (actively modifies the spriteram entry)
@ -791,27 +798,25 @@ static void execute_curdef_cmd(running_machine &machine)
*/
/* TODO: needs basic sprite emulation */
state->m_tsp.curn = (state->m_buf_ram[0] & 0xf8);
state->m_tsp.curn_blink = (state->m_buf_ram[0] & 1);
m_tsp.curn = (m_buf_ram[0] & 0xf8);
m_tsp.curn_blink = (m_buf_ram[0] & 1);
tsp_sprite_enable(machine, 0xa0000 + state->m_tsp.spr_offset + state->m_tsp.curn, (state->m_buf_ram[0] & 2) << 8);
tsp_sprite_enable(0xa0000 + m_tsp.spr_offset + m_tsp.curn, (m_buf_ram[0] & 2) << 8);
}
static void execute_actscr_cmd(running_machine &machine)
void pc88va_state::execute_actscr_cmd()
{
//pc88va_state *state = machine.driver_data<pc88va_state>();
/*
This command assigns a strip where the cursor is located.
xxxx xxxx [0] strip ID * 32 (???)
*/
/* TODO: no idea about this command */
//printf("ACTSCR: %02x\n",state->m_buf_ram[0]);
//printf("ACTSCR: %02x\n",m_buf_ram[0]);
}
static void execute_curs_cmd(running_machine &machine)
void pc88va_state::execute_curs_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
[0] Cursor Position Y (lo word)
[1] Cursor Position Y (hi word)
@ -819,11 +824,11 @@ static void execute_curs_cmd(running_machine &machine)
[3] Cursor Position X (hi word)
*/
state->m_tsp.cur_pos_y = state->m_buf_ram[0] | state->m_buf_ram[1] << 8;
state->m_tsp.cur_pos_x = state->m_buf_ram[2] | state->m_buf_ram[3] << 8;
m_tsp.cur_pos_y = m_buf_ram[0] | m_buf_ram[1] << 8;
m_tsp.cur_pos_x = m_buf_ram[2] | m_buf_ram[3] << 8;
}
static void execute_emul_cmd(running_machine &machine)
void pc88va_state::execute_emul_cmd()
{
/*
[0] Emulate target strip ID x 32
@ -836,9 +841,8 @@ static void execute_emul_cmd(running_machine &machine)
//popmessage("Warning: TSP executes EMUL command, contact MESSdev");
}
static void execute_spron_cmd(running_machine &machine)
void pc88va_state::execute_spron_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
[0] Sprite Table Offset (hi word)
[1] (unknown / reserved)
@ -846,21 +850,20 @@ static void execute_spron_cmd(running_machine &machine)
---- --x- [2] MG: all sprites are 2x zoomed vertically when 1
---- ---x [2] GR: 1 to enable the group collision detection
*/
state->m_tsp.spr_offset = state->m_buf_ram[0] << 8;
state->m_tsp.spr_on = 1;
printf("SPR TABLE %02x %02x %02x\n",state->m_buf_ram[0],state->m_buf_ram[1],state->m_buf_ram[2]);
m_tsp.spr_offset = m_buf_ram[0] << 8;
m_tsp.spr_on = 1;
printf("SPR TABLE %02x %02x %02x\n",m_buf_ram[0],m_buf_ram[1],m_buf_ram[2]);
}
static void execute_sprsw_cmd(running_machine &machine)
void pc88va_state::execute_sprsw_cmd()
{
pc88va_state *state = machine.driver_data<pc88va_state>();
/*
Toggle an individual sprite in the sprite ram entry
[0] xxxx x--- target sprite number
[0] ---- --x- sprite off/on switch
*/
tsp_sprite_enable(machine, 0xa0000 + state->m_tsp.spr_offset + (state->m_buf_ram[0] & 0xf8), (state->m_buf_ram[0] & 2) << 8);
tsp_sprite_enable(0xa0000 + m_tsp.spr_offset + (m_buf_ram[0] & 0xf8), (m_buf_ram[0] & 2) << 8);
}
WRITE8_MEMBER(pc88va_state::idp_param_w)
@ -876,15 +879,15 @@ WRITE8_MEMBER(pc88va_state::idp_param_w)
m_buf_index = 0;
switch(m_cmd)
{
case SYNC: execute_sync_cmd(machine()); break;
case DSPON: execute_dspon_cmd(machine()); break;
case DSPDEF: execute_dspdef_cmd(machine()); break;
case CURDEF: execute_curdef_cmd(machine()); break;
case ACTSCR: execute_actscr_cmd(machine()); break;
case CURS: execute_curs_cmd(machine()); break;
case EMUL: execute_emul_cmd(machine()); break;
case SPRON: execute_spron_cmd(machine()); break;
case SPRSW: execute_sprsw_cmd(machine()); break;
case SYNC: execute_sync_cmd(); break;
case DSPON: execute_dspon_cmd(); break;
case DSPDEF: execute_dspdef_cmd(); break;
case CURDEF: execute_curdef_cmd(); break;
case ACTSCR: execute_actscr_cmd(); break;
case CURS: execute_curs_cmd(); break;
case EMUL: execute_emul_cmd(); break;
case SPRON: execute_spron_cmd(); break;
case SPRSW: execute_sprsw_cmd(); break;
default:
//printf("%02x\n",data);

14
src/mess/drivers/pc9801.c
View File

@ -655,6 +655,7 @@ public:
DECLARE_DRIVER_INIT(pc9801_kanji);
IRQ_CALLBACK_MEMBER(irq_callback);
inline void set_dma_channel(int channel, int state);
};
@ -3036,16 +3037,15 @@ WRITE8_MEMBER(pc9801_state::pc9801_dma_write_byte)
program.write_byte(addr, data);
}
static void set_dma_channel(running_machine &machine, int channel, int state)
void pc9801_state::set_dma_channel(int channel, int state)
{
pc9801_state *drvstate = machine.driver_data<pc9801_state>();
if (!state) drvstate->m_dack = channel;
if (!state) m_dack = channel;
}
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(machine(), 0, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(machine(), 1, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(machine(), 2, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(machine(), 3, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(0, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(1, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(2, state); }
WRITE_LINE_MEMBER(pc9801_state::pc9801_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(3, state); }
READ8_MEMBER(pc9801_state::fdc_2hd_r)
{

3
src/mess/drivers/pdp11.c
View File

@ -92,6 +92,7 @@ public:
virtual void machine_reset();
DECLARE_MACHINE_RESET(pdp11ub2);
DECLARE_MACHINE_RESET(pdp11qb);
void load9312prom(UINT8 *desc, UINT8 *src, int size);
};
WRITE16_MEMBER(pdp11_state::term_w)
@ -248,7 +249,7 @@ void pdp11_state::machine_reset()
}
}
static void load9312prom(UINT8 *desc, UINT8 *src, int size)
void pdp11_state::load9312prom(UINT8 *desc, UINT8 *src, int size)
{
// 3 2 1 8
// 7 6 5 4

17
src/mess/drivers/pegasus.c
View File

@ -87,6 +87,7 @@ public:
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(pegasus_cart_3);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(pegasus_cart_4);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(pegasus_cart_5);
void pegasus_decrypt_rom( UINT16 addr );
};
TIMER_DEVICE_CALLBACK_MEMBER(pegasus_state::pegasus_firq)
@ -419,9 +420,9 @@ GFXDECODE_END
/* An encrypted single rom starts with 02, decrypted with 20. Not sure what
multipart roms will have. */
static void pegasus_decrypt_rom( running_machine &machine, UINT16 addr )
void pegasus_state::pegasus_decrypt_rom( UINT16 addr )
{
UINT8 b, *ROM = machine.root_device().memregion("maincpu")->base();
UINT8 b, *ROM = machine().root_device().memregion("maincpu")->base();
UINT16 i, j;
UINT8 buff[0x1000];
if (ROM[addr] == 0x02)
@ -441,7 +442,7 @@ static void pegasus_decrypt_rom( running_machine &machine, UINT16 addr )
DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_1 )
{
image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x0000, 0x1000);
pegasus_decrypt_rom( image.device().machine(), 0x0000 );
pegasus_decrypt_rom( 0x0000 );
return IMAGE_INIT_PASS;
}
@ -449,7 +450,7 @@ DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_1 )
DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_2 )
{
image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x1000, 0x1000);
pegasus_decrypt_rom( image.device().machine(), 0x1000 );
pegasus_decrypt_rom( 0x1000 );
return IMAGE_INIT_PASS;
}
@ -457,7 +458,7 @@ DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_2 )
DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_3 )
{
image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x2000, 0x1000);
pegasus_decrypt_rom( image.device().machine(), 0x2000 );
pegasus_decrypt_rom( 0x2000 );
return IMAGE_INIT_PASS;
}
@ -465,7 +466,7 @@ DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_3 )
DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_4 )
{
image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0xc000, 0x1000);
pegasus_decrypt_rom( image.device().machine(), 0xc000 );
pegasus_decrypt_rom( 0xc000 );
return IMAGE_INIT_PASS;
}
@ -473,7 +474,7 @@ DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_4 )
DEVICE_IMAGE_LOAD_MEMBER( pegasus_state, pegasus_cart_5 )
{
image.fread( image.device().machine().root_device().memregion("maincpu")->base() + 0xd000, 0x1000);
pegasus_decrypt_rom( image.device().machine(), 0xd000 );
pegasus_decrypt_rom( 0xd000 );
return IMAGE_INIT_PASS;
}
@ -492,7 +493,7 @@ void pegasus_state::machine_reset()
DRIVER_INIT_MEMBER(pegasus_state,pegasus)
{
pegasus_decrypt_rom( machine(), 0xf000 );
pegasus_decrypt_rom( 0xf000 );
}
static MACHINE_CONFIG_START( pegasus, pegasus_state )

215
src/mess/drivers/pockstat.c
View File

@ -127,6 +127,10 @@ public:
TIMER_CALLBACK_MEMBER(timer_tick);
TIMER_CALLBACK_MEMBER(rtc_tick);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER( pockstat_flash );
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
UINT32 ps_intc_get_interrupt_line(UINT32 line);
void ps_intc_set_interrupt_line(UINT32 line, int state);
void ps_timer_start(int index);
};
@ -157,7 +161,7 @@ static const int CPU_FREQ[16] =
#define ENABLE_VERBOSE_LOG (0)
#if ENABLE_VERBOSE_LOG
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
inline void ATTR_PRINTF(3,4) pockstat_state::verboselog( int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
@ -166,39 +170,13 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%s: %s", machine.describe_context(), buf );
logerror( "%s: %s", machine().describe_context(), buf );
}
}
#else
#define verboselog(x,y,z,...)
#endif
// Flash TLB
// Interrupt Controller
static UINT32 ps_intc_get_interrupt_line(running_machine &machine, UINT32 line);
static void ps_intc_set_interrupt_line(running_machine &machine, UINT32 line, int state);
// Timers
static void ps_timer_start(running_machine &machine, int index);
// Clock
// RTC
#define PS_INT_BTN_ACTION 0x00000001 // "Action button"
#define PS_INT_BTN_RIGHT 0x00000002 // "Right button"
#define PS_INT_BTN_LEFT 0x00000004 // "Left button"
@ -222,19 +200,19 @@ READ32_MEMBER(pockstat_state::ps_ftlb_r)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_ftlb_r: FlashROM TLB Control = %08x & %08x\n", m_ftlb_regs.control, mem_mask );
verboselog(0, "ps_ftlb_r: FlashROM TLB Control = %08x & %08x\n", m_ftlb_regs.control, mem_mask );
return m_ftlb_regs.control | 1; // ???
case 0x0004/4:
verboselog(machine(), 0, "ps_ftlb_r: Unknown (F_STAT) = %08x & %08x\n", m_ftlb_regs.stat, mem_mask );
verboselog(0, "ps_ftlb_r: Unknown (F_STAT) = %08x & %08x\n", m_ftlb_regs.stat, mem_mask );
return m_ftlb_regs.stat;
case 0x0008/4:
verboselog(machine(), 0, "ps_ftlb_r: FlashROM TLB Valid Tag = %08x & %08x\n", m_ftlb_regs.valid, mem_mask );
verboselog(0, "ps_ftlb_r: FlashROM TLB Valid Tag = %08x & %08x\n", m_ftlb_regs.valid, mem_mask );
return m_ftlb_regs.valid;
case 0x000c/4:
verboselog(machine(), 0, "ps_ftlb_r: Unknown (F_WAIT1) = %08x & %08x\n", m_ftlb_regs.wait1, mem_mask );
verboselog(0, "ps_ftlb_r: Unknown (F_WAIT1) = %08x & %08x\n", m_ftlb_regs.wait1, mem_mask );
return m_ftlb_regs.wait1;
case 0x0010/4:
verboselog(machine(), 0, "ps_ftlb_r: Unknown (F_WAIT2) = %08x & %08x\n", m_ftlb_regs.wait2 | 0x04, mem_mask );
verboselog(0, "ps_ftlb_r: Unknown (F_WAIT2) = %08x & %08x\n", m_ftlb_regs.wait2 | 0x04, mem_mask );
return m_ftlb_regs.wait2 | 0x04;
case 0x0100/4:
case 0x0104/4:
@ -252,13 +230,13 @@ READ32_MEMBER(pockstat_state::ps_ftlb_r)
case 0x0134/4:
case 0x0138/4:
case 0x013c/4:
verboselog(machine(), 0, "ps_ftlb_r: FlashROM TLB Entry %d = %08x & %08x\n", offset - 0x100/4, m_ftlb_regs.entry[offset - 0x100/4], mem_mask );
verboselog(0, "ps_ftlb_r: FlashROM TLB Entry %d = %08x & %08x\n", offset - 0x100/4, m_ftlb_regs.entry[offset - 0x100/4], mem_mask );
return m_ftlb_regs.entry[offset - 0x100/4];
case 0x0300/4:
verboselog(machine(), 0, "ps_ftlb_r: Unknown (F_SN) = %08x & %08x\n", m_ftlb_regs.serial, mem_mask );
verboselog(0, "ps_ftlb_r: Unknown (F_SN) = %08x & %08x\n", m_ftlb_regs.serial, mem_mask );
return m_ftlb_regs.serial;
default:
verboselog(machine(), 0, "ps_ftlb_r: Unknown Register %08x & %08x\n", 0x06000000 + (offset << 2), mem_mask );
verboselog(0, "ps_ftlb_r: Unknown Register %08x & %08x\n", 0x06000000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -269,23 +247,23 @@ WRITE32_MEMBER(pockstat_state::ps_ftlb_w)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_ftlb_w: FlashROM TLB Control = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: FlashROM TLB Control = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.control);
break;
case 0x0004/4:
verboselog(machine(), 0, "ps_ftlb_w: Unknown (F_STAT) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: Unknown (F_STAT) = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.stat);
break;
case 0x0008/4:
verboselog(machine(), 0, "ps_ftlb_w: FlashROM TLB Valid Tag = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: FlashROM TLB Valid Tag = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.valid);
break;
case 0x000c/4:
verboselog(machine(), 0, "ps_ftlb_w: Unknown (F_WAIT1) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: Unknown (F_WAIT1) = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.wait1);
break;
case 0x0010/4:
verboselog(machine(), 0, "ps_ftlb_w: Unknown (F_WAIT2) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: Unknown (F_WAIT2) = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.wait2);
break;
case 0x0100/4:
@ -304,59 +282,57 @@ WRITE32_MEMBER(pockstat_state::ps_ftlb_w)
case 0x0134/4:
case 0x0138/4:
case 0x013c/4:
verboselog(machine(), 0, "ps_ftlb_w: FlashROM TLB Entry %d = %08x & %08x\n", offset - 0x100/4, data, mem_mask );
verboselog(0, "ps_ftlb_w: FlashROM TLB Entry %d = %08x & %08x\n", offset - 0x100/4, data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.entry[offset - 0x100/4]);
break;
case 0x0300/4:
verboselog(machine(), 0, "ps_ftlb_w: Unknown (F_SN) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_ftlb_w: Unknown (F_SN) = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_ftlb_regs.serial);
break;
default:
verboselog(machine(), 0, "ps_ftlb_w: Unknown Register %08x = %08x & %08x\n", 0x06000000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_ftlb_w: Unknown Register %08x = %08x & %08x\n", 0x06000000 + (offset << 2), data, mem_mask );
break;
}
}
static UINT32 ps_intc_get_interrupt_line(running_machine &machine, UINT32 line)
UINT32 pockstat_state::ps_intc_get_interrupt_line(UINT32 line)
{
pockstat_state *state = machine.driver_data<pockstat_state>();
return state->m_intc_regs.status & line;
return m_intc_regs.status & line;
}
static void ps_intc_set_interrupt_line(running_machine &machine, UINT32 line, int state)
void pockstat_state::ps_intc_set_interrupt_line(UINT32 line, int state)
{
pockstat_state *drvstate = machine.driver_data<pockstat_state>();
//printf( "%08x %d %08x %08x %08x\n", line, state, drvstate->m_intc_regs.hold, drvstate->m_intc_regs.status, drvstate->m_intc_regs.enable );
//printf( "%08x %d %08x %08x %08x\n", line, state, drvm_intc_regs.hold, drvm_intc_regs.status, drvm_intc_regs.enable );
if(line)
{
if(state)
{
drvstate->m_intc_regs.status |= line & PS_INT_STATUS_MASK;
drvstate->m_intc_regs.hold |= line &~ PS_INT_STATUS_MASK;
//printf( " Setting %08x, status = %08x, hold = %08x\n", line, drvstate->m_intc_regs.status, drvstate->m_intc_regs.hold );
m_intc_regs.status |= line & PS_INT_STATUS_MASK;
m_intc_regs.hold |= line &~ PS_INT_STATUS_MASK;
//printf( " Setting %08x, status = %08x, hold = %08x\n", line, m_intc_regs.status, m_intc_regs.hold );
}
else
{
drvstate->m_intc_regs.status &= ~line;
drvstate->m_intc_regs.hold &= ~line;
//printf( "Clearing %08x, status = %08x, hold = %08x\n", line, drvstate->m_intc_regs.status, drvstate->m_intc_regs.hold );
m_intc_regs.status &= ~line;
m_intc_regs.hold &= ~line;
//printf( "Clearing %08x, status = %08x, hold = %08x\n", line, m_intc_regs.status, m_intc_regs.hold );
}
}
if(drvstate->m_intc_regs.hold & drvstate->m_intc_regs.enable & PS_INT_IRQ_MASK)
if(m_intc_regs.hold & m_intc_regs.enable & PS_INT_IRQ_MASK)
{
machine.device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE, ASSERT_LINE);
machine().device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE, ASSERT_LINE);
}
else
{
machine.device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE, CLEAR_LINE);
machine().device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE, CLEAR_LINE);
}
if(drvstate->m_intc_regs.hold & drvstate->m_intc_regs.enable & PS_INT_FIQ_MASK)
if(m_intc_regs.hold & m_intc_regs.enable & PS_INT_FIQ_MASK)
{
machine.device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE);
machine().device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE);
}
else
{
machine.device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE);
machine().device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE);
}
}
@ -365,22 +341,22 @@ READ32_MEMBER(pockstat_state::ps_intc_r)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_intc_r: Held Interrupt = %08x & %08x\n", m_intc_regs.hold, mem_mask );
verboselog(0, "ps_intc_r: Held Interrupt = %08x & %08x\n", m_intc_regs.hold, mem_mask );
return m_intc_regs.hold;
case 0x0004/4:
verboselog(machine(), 0, "ps_intc_r: Interrupt Status = %08x & %08x\n", m_intc_regs.status, mem_mask );
verboselog(0, "ps_intc_r: Interrupt Status = %08x & %08x\n", m_intc_regs.status, mem_mask );
return m_intc_regs.status;
case 0x0008/4:
verboselog(machine(), 0, "ps_intc_r: Interrupt Enable = %08x & %08x\n", m_intc_regs.enable, mem_mask );
verboselog(0, "ps_intc_r: Interrupt Enable = %08x & %08x\n", m_intc_regs.enable, mem_mask );
return m_intc_regs.enable;
case 0x000c/4:
verboselog(machine(), 0, "ps_intc_r: Interrupt Mask (Invalid Read) = %08x & %08x\n", 0, mem_mask );
verboselog(0, "ps_intc_r: Interrupt Mask (Invalid Read) = %08x & %08x\n", 0, mem_mask );
return 0;
case 0x0010/4:
verboselog(machine(), 0, "ps_intc_r: Interrupt Acknowledge (Invalid Read) = %08x & %08x\n", 0, mem_mask );
verboselog(0, "ps_intc_r: Interrupt Acknowledge (Invalid Read) = %08x & %08x\n", 0, mem_mask );
return 0;
default:
verboselog(machine(), 0, "ps_intc_r: Unknown Register %08x & %08x\n", 0x0a000000 + (offset << 2), mem_mask );
verboselog(0, "ps_intc_r: Unknown Register %08x & %08x\n", 0x0a000000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -391,54 +367,53 @@ WRITE32_MEMBER(pockstat_state::ps_intc_w)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_intc_w: Held Interrupt (Invalid Write) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_intc_w: Held Interrupt (Invalid Write) = %08x & %08x\n", data, mem_mask );
break;
case 0x0004/4:
verboselog(machine(), 0, "ps_intc_w: Interrupt Status (Invalid Write) = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_intc_w: Interrupt Status (Invalid Write) = %08x & %08x\n", data, mem_mask );
break;
case 0x0008/4:
verboselog(machine(), 0, "ps_intc_w: Interrupt Enable = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_intc_w: Interrupt Enable = %08x & %08x\n", data, mem_mask );
m_intc_regs.enable |= data;
//COMBINE_DATA(&m_intc_regs.enable);
//m_intc_regs.status &= m_intc_regs.enable;
//m_intc_regs.hold &= m_intc_regs.enable;
ps_intc_set_interrupt_line(machine(), 0, 0);
ps_intc_set_interrupt_line(0, 0);
break;
case 0x000c/4:
verboselog(machine(), 0, "ps_intc_w: Interrupt Mask = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_intc_w: Interrupt Mask = %08x & %08x\n", data, mem_mask );
m_intc_regs.enable &= ~data;
COMBINE_DATA(&m_intc_regs.mask);
//m_intc_regs.status &= m_intc_regs.enable;
//m_intc_regs.hold &= m_intc_regs.enable;
ps_intc_set_interrupt_line(machine(), 0, 0);
ps_intc_set_interrupt_line(0, 0);
break;
case 0x0010/4:
verboselog(machine(), 0, "ps_intc_w: Interrupt Acknowledge = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_intc_w: Interrupt Acknowledge = %08x & %08x\n", data, mem_mask );
m_intc_regs.hold &= ~data;
m_intc_regs.status &= ~data;
ps_intc_set_interrupt_line(machine(), 0, 0);
ps_intc_set_interrupt_line(0, 0);
//COMBINE_DATA(&m_intc_regs.acknowledge);
break;
default:
verboselog(machine(), 0, "ps_intc_w: Unknown Register %08x = %08x & %08x\n", 0x0a000000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_intc_w: Unknown Register %08x = %08x & %08x\n", 0x0a000000 + (offset << 2), data, mem_mask );
break;
}
}
TIMER_CALLBACK_MEMBER(pockstat_state::timer_tick)
{
ps_intc_set_interrupt_line(machine(), param == 2 ? PS_INT_TIMER2 : (param == 1 ? PS_INT_TIMER1 : PS_INT_TIMER0), 1);
ps_intc_set_interrupt_line(param == 2 ? PS_INT_TIMER2 : (param == 1 ? PS_INT_TIMER1 : PS_INT_TIMER0), 1);
//printf( "Timer %d is calling back\n", param );
m_timer_regs.timer[param].count = m_timer_regs.timer[param].period;
ps_timer_start(machine(), param);
ps_timer_start(param);
}
static void ps_timer_start(running_machine &machine, int index)
void pockstat_state::ps_timer_start(int index)
{
pockstat_state *state = machine.driver_data<pockstat_state>();
int divisor = 1;
attotime period;
switch(state->m_timer_regs.timer[index].control & 3)
switch(m_timer_regs.timer[index].control & 3)
{
case 0:
case 3:
@ -451,9 +426,9 @@ static void ps_timer_start(running_machine &machine, int index)
divisor = 256;
break;
}
period = attotime::from_hz(CPU_FREQ[state->m_clock_regs.mode & 0x0f] / 2) * divisor;
period = period * state->m_timer_regs.timer[index].count;
state->m_timer_regs.timer[index].timer->adjust(period, index);
period = attotime::from_hz(CPU_FREQ[m_clock_regs.mode & 0x0f] / 2) * divisor;
period = period * m_timer_regs.timer[index].count;
m_timer_regs.timer[index].timer->adjust(period, index);
}
READ32_MEMBER(pockstat_state::ps_timer_r)
@ -463,12 +438,12 @@ READ32_MEMBER(pockstat_state::ps_timer_r)
case 0x0000/4:
case 0x0010/4:
case 0x0020/4:
verboselog(machine(), 0, "ps_timer_r: Timer %d Period = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].period, mem_mask );
verboselog(0, "ps_timer_r: Timer %d Period = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].period, mem_mask );
return m_timer_regs.timer[offset / (0x10/4)].period;
case 0x0004/4:
case 0x0014/4:
case 0x0024/4:
verboselog(machine(), 0, "ps_timer_r: Timer %d Count = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].count, mem_mask );
verboselog(0, "ps_timer_r: Timer %d Count = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].count, mem_mask );
if(m_timer_regs.timer[offset / (0x10/4)].control & 4)
{
m_timer_regs.timer[offset / (0x10/4)].count--;
@ -482,10 +457,10 @@ READ32_MEMBER(pockstat_state::ps_timer_r)
case 0x0008/4:
case 0x0018/4:
case 0x0028/4:
verboselog(machine(), 0, "ps_timer_r: Timer %d Control = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].control, mem_mask );
verboselog(0, "ps_timer_r: Timer %d Control = %08x & %08x\n", offset / (0x10/4), m_timer_regs.timer[offset / (0x10/4)].control, mem_mask );
return m_timer_regs.timer[offset / (0x10/4)].control;
default:
verboselog(machine(), 0, "ps_timer_r: Unknown Register %08x & %08x\n", 0x0a800000 + (offset << 2), mem_mask );
verboselog(0, "ps_timer_r: Unknown Register %08x & %08x\n", 0x0a800000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -498,23 +473,23 @@ WRITE32_MEMBER(pockstat_state::ps_timer_w)
case 0x0000/4:
case 0x0010/4:
case 0x0020/4:
verboselog(machine(), 0, "ps_timer_w: Timer %d Period = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
verboselog(0, "ps_timer_w: Timer %d Period = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
COMBINE_DATA(&m_timer_regs.timer[offset / (0x10/4)].period);
break;
case 0x0004/4:
case 0x0014/4:
case 0x0024/4:
verboselog(machine(), 0, "ps_timer_w: Timer %d Count = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
verboselog(0, "ps_timer_w: Timer %d Count = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
COMBINE_DATA(&m_timer_regs.timer[offset / (0x10/4)].count);
break;
case 0x0008/4:
case 0x0018/4:
case 0x0028/4:
verboselog(machine(), 0, "ps_timer_w: Timer %d Control = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
verboselog(0, "ps_timer_w: Timer %d Control = %08x & %08x\n", offset / (0x10/4), data, mem_mask );
COMBINE_DATA(&m_timer_regs.timer[offset / (0x10/4)].control);
if(m_timer_regs.timer[offset / (0x10/4)].control & 4)
{
ps_timer_start(machine(), offset / (0x10/4));
ps_timer_start(offset / (0x10/4));
}
else
{
@ -522,7 +497,7 @@ WRITE32_MEMBER(pockstat_state::ps_timer_w)
}
break;
default:
verboselog(machine(), 0, "ps_timer_w: Unknown Register %08x = %08x & %08x\n", 0x0a800000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_timer_w: Unknown Register %08x = %08x & %08x\n", 0x0a800000 + (offset << 2), data, mem_mask );
break;
}
}
@ -532,13 +507,13 @@ READ32_MEMBER(pockstat_state::ps_clock_r)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_clock_r: Clock Mode = %08x & %08x\n", m_clock_regs.mode | 0x10, mem_mask );
verboselog(0, "ps_clock_r: Clock Mode = %08x & %08x\n", m_clock_regs.mode | 0x10, mem_mask );
return m_clock_regs.mode | PS_CLOCK_STEADY;
case 0x0004/4:
verboselog(machine(), 0, "ps_clock_r: Clock Control = %08x & %08x\n", m_clock_regs.control, mem_mask );
verboselog(0, "ps_clock_r: Clock Control = %08x & %08x\n", m_clock_regs.control, mem_mask );
return m_clock_regs.control;
default:
verboselog(machine(), 0, "ps_clock_r: Unknown Register %08x & %08x\n", 0x0b000000 + (offset << 2), mem_mask );
verboselog(0, "ps_clock_r: Unknown Register %08x & %08x\n", 0x0b000000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -549,16 +524,16 @@ WRITE32_MEMBER(pockstat_state::ps_clock_w)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_clock_w: Clock Mode = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_clock_w: Clock Mode = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_clock_regs.mode);
machine().device("maincpu")->set_unscaled_clock(CPU_FREQ[m_clock_regs.mode & 0x0f]);
break;
case 0x0004/4:
verboselog(machine(), 0, "ps_clock_w: Clock Control = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_clock_w: Clock Control = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_clock_regs.control);
break;
default:
verboselog(machine(), 0, "ps_clock_w: Unknown Register %08x = %08x & %08x\n", 0x0b000000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_clock_w: Unknown Register %08x = %08x & %08x\n", 0x0b000000 + (offset << 2), data, mem_mask );
break;
}
}
@ -566,7 +541,7 @@ WRITE32_MEMBER(pockstat_state::ps_clock_w)
TIMER_CALLBACK_MEMBER(pockstat_state::rtc_tick)
{
//printf( "RTC is calling back\n" );
ps_intc_set_interrupt_line(machine(), PS_INT_RTC, ps_intc_get_interrupt_line(machine(), PS_INT_RTC) ? 0 : 1);
ps_intc_set_interrupt_line(PS_INT_RTC, ps_intc_get_interrupt_line(PS_INT_RTC) ? 0 : 1);
if(!(m_rtc_regs.mode & 1))
{
m_rtc_regs.time++;
@ -614,19 +589,19 @@ READ32_MEMBER(pockstat_state::ps_rtc_r)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_rtc_r: RTC Mode = %08x & %08x\n", m_rtc_regs.mode, mem_mask );
verboselog(0, "ps_rtc_r: RTC Mode = %08x & %08x\n", m_rtc_regs.mode, mem_mask );
return m_rtc_regs.mode;
case 0x0004/4:
verboselog(machine(), 0, "ps_rtc_r: RTC Control = %08x & %08x\n", m_rtc_regs.control, mem_mask );
verboselog(0, "ps_rtc_r: RTC Control = %08x & %08x\n", m_rtc_regs.control, mem_mask );
return m_rtc_regs.control;
case 0x0008/4:
verboselog(machine(), 0, "ps_rtc_r: RTC Time = %08x & %08x\n", m_rtc_regs.time, mem_mask );
verboselog(0, "ps_rtc_r: RTC Time = %08x & %08x\n", m_rtc_regs.time, mem_mask );
return m_rtc_regs.time;
case 0x000c/4:
verboselog(machine(), 0, "ps_rtc_r: RTC Date = %08x & %08x\n", m_rtc_regs.date, mem_mask );
verboselog(0, "ps_rtc_r: RTC Date = %08x & %08x\n", m_rtc_regs.date, mem_mask );
return m_rtc_regs.date;
default:
verboselog(machine(), 0, "ps_rtc_r: Unknown Register %08x & %08x\n", 0x0b800000 + (offset << 2), mem_mask );
verboselog(0, "ps_rtc_r: Unknown Register %08x & %08x\n", 0x0b800000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -637,11 +612,11 @@ WRITE32_MEMBER(pockstat_state::ps_rtc_w)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_rtc_w: RTC Mode = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_rtc_w: RTC Mode = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_rtc_regs.mode);
break;
case 0x0004/4:
verboselog(machine(), 0, "ps_rtc_w: RTC Control = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_rtc_w: RTC Control = %08x & %08x\n", data, mem_mask );
if(m_rtc_regs.control == 1 && data == 1)
{
switch(m_rtc_regs.mode >> 1)
@ -738,7 +713,7 @@ WRITE32_MEMBER(pockstat_state::ps_rtc_w)
}
break;
default:
verboselog(machine(), 0, "ps_rtc_w: Unknown Register %08x = %08x & %08x\n", 0x0b800000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_rtc_w: Unknown Register %08x = %08x & %08x\n", 0x0b800000 + (offset << 2), data, mem_mask );
break;
}
}
@ -749,10 +724,10 @@ READ32_MEMBER(pockstat_state::ps_lcd_r)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_lcd_r: LCD Control = %08x & %08x\n", m_lcd_control | 0x100, mem_mask );
verboselog(0, "ps_lcd_r: LCD Control = %08x & %08x\n", m_lcd_control | 0x100, mem_mask );
return m_lcd_control;
default:
verboselog(machine(), 0, "ps_lcd_r: Unknown Register %08x & %08x\n", 0x0d000000 + (offset << 2), mem_mask );
verboselog(0, "ps_lcd_r: Unknown Register %08x & %08x\n", 0x0d000000 + (offset << 2), mem_mask );
break;
}
return 0;
@ -763,11 +738,11 @@ WRITE32_MEMBER(pockstat_state::ps_lcd_w)
switch(offset)
{
case 0x0000/4:
verboselog(machine(), 0, "ps_lcd_w: LCD Control = %08x & %08x\n", data, mem_mask );
verboselog(0, "ps_lcd_w: LCD Control = %08x & %08x\n", data, mem_mask );
COMBINE_DATA(&m_lcd_control);
break;
default:
verboselog(machine(), 0, "ps_lcd_w: Unknown Register %08x = %08x & %08x\n", 0x0d000000 + (offset << 2), data, mem_mask );
verboselog(0, "ps_lcd_w: Unknown Register %08x = %08x & %08x\n", 0x0d000000 + (offset << 2), data, mem_mask );
break;
}
}
@ -776,11 +751,11 @@ INPUT_CHANGED_MEMBER(pockstat_state::input_update)
{
UINT32 buttons = machine().root_device().ioport("BUTTONS")->read();
ps_intc_set_interrupt_line(machine(), PS_INT_BTN_ACTION, (buttons & 1) ? 1 : 0);
ps_intc_set_interrupt_line(machine(), PS_INT_BTN_RIGHT, (buttons & 2) ? 1 : 0);
ps_intc_set_interrupt_line(machine(), PS_INT_BTN_LEFT, (buttons & 4) ? 1 : 0);
ps_intc_set_interrupt_line(machine(), PS_INT_BTN_DOWN, (buttons & 8) ? 1 : 0);
ps_intc_set_interrupt_line(machine(), PS_INT_BTN_UP, (buttons & 16) ? 1 : 0);
ps_intc_set_interrupt_line(PS_INT_BTN_ACTION, (buttons & 1) ? 1 : 0);
ps_intc_set_interrupt_line(PS_INT_BTN_RIGHT, (buttons & 2) ? 1 : 0);
ps_intc_set_interrupt_line(PS_INT_BTN_LEFT, (buttons & 4) ? 1 : 0);
ps_intc_set_interrupt_line(PS_INT_BTN_DOWN, (buttons & 8) ? 1 : 0);
ps_intc_set_interrupt_line(PS_INT_BTN_UP, (buttons & 16) ? 1 : 0);
}
READ32_MEMBER(pockstat_state::ps_rombank_r)
@ -830,13 +805,13 @@ WRITE32_MEMBER(pockstat_state::ps_flash_w)
READ32_MEMBER(pockstat_state::ps_audio_r)
{
verboselog(machine(), 0, "ps_audio_r: Unknown Read: %08x = %08x & %08x\n", 0xd800000 + (offset << 2), 0x10, mem_mask);
verboselog(0, "ps_audio_r: Unknown Read: %08x = %08x & %08x\n", 0xd800000 + (offset << 2), 0x10, mem_mask);
return 0;
}
WRITE32_MEMBER(pockstat_state::ps_audio_w)
{
verboselog(machine(), 0, "ps_audio_w: Unknown Write: %08x = %08x & %08x\n", 0xd800000 + (offset << 2), data, mem_mask);
verboselog(0, "ps_audio_w: Unknown Write: %08x = %08x & %08x\n", 0xd800000 + (offset << 2), data, mem_mask);
}
WRITE32_MEMBER(pockstat_state::ps_dac_w)

18
src/mess/drivers/ptcsol.c
View File

@ -181,19 +181,19 @@ public:
DECLARE_DRIVER_INIT(sol20);
TIMER_CALLBACK_MEMBER(sol20_cassette_tc);
TIMER_CALLBACK_MEMBER(sol20_boot);
cassette_image_device *cassette_device_image();
};
/* timer to read cassette waveforms */
static cassette_image_device *cassette_device_image(running_machine &machine)
cassette_image_device *sol20_state::cassette_device_image()
{
sol20_state *state = machine.driver_data<sol20_state>();
if (state->m_sol20_fa & 0x40)
return machine.device<cassette_image_device>(CASSETTE2_TAG);
if (m_sol20_fa & 0x40)
return machine().device<cassette_image_device>(CASSETTE2_TAG);
else
return machine.device<cassette_image_device>(CASSETTE_TAG);
return machine().device<cassette_image_device>(CASSETTE_TAG);
}
@ -210,7 +210,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
m_cass_data.input.length++;
cass_ws = ((cassette_device_image(machine()))->input() > +0.02) ? 1 : 0;
cass_ws = ((cassette_device_image())->input() > +0.02) ? 1 : 0;
if (cass_ws != m_cass_data.input.level)
{
@ -239,7 +239,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
if (!((m_cass_data.output.bit == 0) && (m_cass_data.output.length & 4)))
{
m_cass_data.output.level ^= 1; // toggle output this, except on 2nd half of low bit
cassette_device_image(machine())->output(m_cass_data.output.level ? -1.0 : +1.0);
cassette_device_image()->output(m_cass_data.output.level ? -1.0 : +1.0);
}
}
return;
@ -248,7 +248,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
/* loading a tape */
m_cass_data.input.length++;
cass_ws = ((cassette_device_image(machine()))->input() > +0.02) ? 1 : 0;
cass_ws = ((cassette_device_image())->input() > +0.02) ? 1 : 0;
if (cass_ws != m_cass_data.input.level || m_cass_data.input.length == 10)
{
@ -279,7 +279,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
if (!((m_cass_data.output.bit == 0) && (m_cass_data.output.length & 8)))
{
m_cass_data.output.level ^= 1; // toggle output this, except on 2nd half of low bit
cassette_device_image(machine())->output(m_cass_data.output.level ? -1.0 : +1.0);
cassette_device_image()->output(m_cass_data.output.level ? -1.0 : +1.0);
}
}
return;

35
src/mess/drivers/scv.c
View File

@ -82,6 +82,11 @@ protected:
required_memory_region m_charrom;
void scv_set_banks();
inline void plot_sprite_part( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 pat, UINT8 col, UINT8 screen_sprite_start_line );
inline void draw_sprite( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 tile_idx, UINT8 col, UINT8 left, UINT8 right, UINT8 top, UINT8 bottom, UINT8 clip_y, UINT8 screen_sprite_start_line );
inline void draw_text( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 *char_data, UINT8 fg, UINT8 bg );
inline void draw_semi_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 data, UINT8 fg );
inline void draw_block_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 col );
};
@ -469,7 +474,7 @@ TIMER_CALLBACK_MEMBER(scv_state::scv_vb_callback)
}
INLINE void plot_sprite_part( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 pat, UINT8 col, UINT8 screen_sprite_start_line )
inline void scv_state::plot_sprite_part( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 pat, UINT8 col, UINT8 screen_sprite_start_line )
{
if ( x < 4 )
{
@ -500,17 +505,17 @@ INLINE void plot_sprite_part( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 pat,
}
INLINE void draw_sprite( scv_state *state, bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 tile_idx, UINT8 col, UINT8 left, UINT8 right, UINT8 top, UINT8 bottom, UINT8 clip_y, UINT8 screen_sprite_start_line )
inline void scv_state::draw_sprite( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 tile_idx, UINT8 col, UINT8 left, UINT8 right, UINT8 top, UINT8 bottom, UINT8 clip_y, UINT8 screen_sprite_start_line )
{
int j;
y += clip_y * 2;
for ( j = clip_y * 4; j < 32; j += 4 )
{
UINT8 pat0 = state->m_videoram[ tile_idx * 32 + j + 0 ];
UINT8 pat1 = state->m_videoram[ tile_idx * 32 + j + 1 ];
UINT8 pat2 = state->m_videoram[ tile_idx * 32 + j + 2 ];
UINT8 pat3 = state->m_videoram[ tile_idx * 32 + j + 3 ];
UINT8 pat0 = m_videoram[ tile_idx * 32 + j + 0 ];
UINT8 pat1 = m_videoram[ tile_idx * 32 + j + 1 ];
UINT8 pat2 = m_videoram[ tile_idx * 32 + j + 2 ];
UINT8 pat3 = m_videoram[ tile_idx * 32 + j + 3 ];
if ( ( top && j < 16 ) || ( bottom && j >= 16 ) )
{
@ -542,7 +547,7 @@ INLINE void draw_sprite( scv_state *state, bitmap_ind16 &bitmap, UINT8 x, UINT8
}
INLINE void draw_text( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 *char_data, UINT8 fg, UINT8 bg )
inline void scv_state::draw_text( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 *char_data, UINT8 fg, UINT8 bg )
{
int i;
@ -575,7 +580,7 @@ INLINE void draw_text( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 *char_data,
}
INLINE void draw_semi_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 data, UINT8 fg )
inline void scv_state::draw_semi_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 data, UINT8 fg )
{
int i;
@ -592,7 +597,7 @@ INLINE void draw_semi_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 data,
}
INLINE void draw_block_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 col )
inline void scv_state::draw_block_graph( bitmap_ind16 &bitmap, UINT8 x, UINT8 y, UINT8 col )
{
int i;
@ -750,31 +755,31 @@ UINT32 scv_state::screen_update_scv(screen_device &screen, bitmap_ind16 &bitmap,
if ( ( m_videoram[0x1400] & 0x20 ) && ( i & 0x20 ) )
{
/* 2 color sprite handling */
draw_sprite( this, bitmap, spr_x, spr_y, tile_idx, col, left, right, top, bottom, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x, spr_y, tile_idx, col, left, right, top, bottom, clip, screen_start_sprite_line );
if ( x_32 || y_32 )
{
static const UINT8 spr_2col_lut0[16] = { 0, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 1, 1 };
static const UINT8 spr_2col_lut1[16] = { 0, 1, 8, 11, 2, 3, 10, 9, 4, 5, 12, 13, 6, 7, 14, 15 };
draw_sprite( this, bitmap, spr_x, spr_y, tile_idx ^ ( 8 * x_32 + y_32 ), ( i & 0x40 ) ? spr_2col_lut1[col] : spr_2col_lut0[col], left, right, top, bottom, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x, spr_y, tile_idx ^ ( 8 * x_32 + y_32 ), ( i & 0x40 ) ? spr_2col_lut1[col] : spr_2col_lut0[col], left, right, top, bottom, clip, screen_start_sprite_line );
}
}
else
{
/* regular sprite handling */
draw_sprite( this, bitmap, spr_x, spr_y, tile_idx, col, left, right, top, bottom, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x, spr_y, tile_idx, col, left, right, top, bottom, clip, screen_start_sprite_line );
if ( x_32 )
{
draw_sprite( this, bitmap, spr_x + 16, spr_y, tile_idx | 8, col, 1, 1, top, bottom, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x + 16, spr_y, tile_idx | 8, col, 1, 1, top, bottom, clip, screen_start_sprite_line );
}
if ( y_32 )
{
clip = ( clip & 0x08 ) ? ( clip & 0x07 ) : 0;
draw_sprite( this, bitmap, spr_x, spr_y + 16, tile_idx | 1, col, left, right, 1, 1, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x, spr_y + 16, tile_idx | 1, col, left, right, 1, 1, clip, screen_start_sprite_line );
if ( x_32 )
{
draw_sprite( this, bitmap, spr_x + 16, spr_y + 16, tile_idx | 9, col, 1, 1, 1, 1, clip, screen_start_sprite_line );
draw_sprite( bitmap, spr_x + 16, spr_y + 16, tile_idx | 9, col, 1, 1, 1, 1, clip, screen_start_sprite_line );
}
}
}

59
src/mess/drivers/sgi_ip2.c
View File

@ -110,6 +110,7 @@ private:
UINT8 m_mbp;
virtual void machine_start();
virtual void machine_reset();
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
};
@ -118,7 +119,7 @@ private:
#define ENABLE_VERBOSE_LOG (0)
#if ENABLE_VERBOSE_LOG
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
inline void ATTR_PRINTF(3,4) sgi_ip2_state::verboselog( int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
@ -127,7 +128,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
logerror("%08x: %s", machine().device("maincpu")->safe_pc(), buf);
}
}
#else
@ -147,13 +148,13 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
READ8_MEMBER(sgi_ip2_state::sgi_ip2_m_but_r)
{
verboselog(machine(), 0, "sgi_ip2_m_but_r: %02x\n", m_mbut | BOARD_REV1);
verboselog(0, "sgi_ip2_m_but_r: %02x\n", m_mbut | BOARD_REV1);
return m_mbut | BOARD_REV1;
}
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_m_but_w)
{
verboselog(machine(), 0, "sgi_ip2_m_but_w: %02x\n", data);
verboselog(0, "sgi_ip2_m_but_w: %02x\n", data);
m_mbut = data;
}
@ -165,45 +166,45 @@ WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_m_but_w)
READ16_MEMBER(sgi_ip2_state::sgi_ip2_m_quad_r)
{
verboselog(machine(), 0, "sgi_ip2_m_quad_r: %04x\n", m_mquad);
verboselog(0, "sgi_ip2_m_quad_r: %04x\n", m_mquad);
return m_mquad;
}
WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_m_quad_w)
{
verboselog(machine(), 0, "sgi_ip2_m_quad_w = %04x & %04x\n", data, mem_mask);
verboselog(0, "sgi_ip2_m_quad_w = %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&m_mquad);
}
READ16_MEMBER(sgi_ip2_state::sgi_ip2_swtch_r)
{
verboselog(machine(), 0, "sgi_ip2_swtch_r: %04x\n", ioport("SWTCH")->read());
verboselog(0, "sgi_ip2_swtch_r: %04x\n", ioport("SWTCH")->read());
return ioport("SWTCH")->read();
}
READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_r)
{
UINT8 ret = m_rtc->read(space, 1);
verboselog(machine(), 1, "sgi_ip2_clock_ctl_r: %02x\n", ret);
verboselog(1, "sgi_ip2_clock_ctl_r: %02x\n", ret);
return ret;
}
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_w)
{
verboselog(machine(), 1, "sgi_ip2_clock_ctl_w: %02x\n", data);
verboselog(1, "sgi_ip2_clock_ctl_w: %02x\n", data);
m_rtc->write(space, 1, data);
}
READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_r)
{
UINT8 ret = m_rtc->read(space, 0);
verboselog(machine(), 1, "sgi_ip2_clock_data_r: %02x\n", ret);
verboselog(1, "sgi_ip2_clock_data_r: %02x\n", ret);
return ret;
}
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_w)
{
verboselog(machine(), 1, "sgi_ip2_clock_data_w: %02x\n", data);
verboselog(1, "sgi_ip2_clock_data_w: %02x\n", data);
m_rtc->write(space, 0, data);
}
@ -213,7 +214,7 @@ READ8_MEMBER(sgi_ip2_state::sgi_ip2_os_base_r)
switch(offset)
{
default:
verboselog(machine(), 0, "sgi_ip2_os_base_r: Unknown Register %08x\n", 0x36000000 + offset);
verboselog(0, "sgi_ip2_os_base_r: Unknown Register %08x\n", 0x36000000 + offset);
break;
}
return 0;
@ -224,7 +225,7 @@ WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_os_base_w)
switch(offset)
{
default:
verboselog(machine(), 0, "sgi_ip2_os_base_w: Unknown Register %08x = %02x\n", 0x36000000 + offset, data);
verboselog(0, "sgi_ip2_os_base_w: Unknown Register %08x = %02x\n", 0x36000000 + offset, data);
break;
}
}
@ -234,7 +235,7 @@ READ16_MEMBER(sgi_ip2_state::sgi_ip2_status_r)
switch(offset)
{
default:
verboselog(machine(), 0, "sgi_ip2_status_r: Unknown Register %08x & %04x\n", 0x38000000 + (offset << 1), mem_mask);
verboselog(0, "sgi_ip2_status_r: Unknown Register %08x & %04x\n", 0x38000000 + (offset << 1), mem_mask);
break;
}
return 0;
@ -245,7 +246,7 @@ WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_status_w)
switch(offset)
{
default:
verboselog(machine(), 0, "sgi_ip2_status_w: Unknown Register %08x = %04x & %04x\n", 0x38000000 + (offset << 1), data, mem_mask);
verboselog(0, "sgi_ip2_status_w: Unknown Register %08x = %04x & %04x\n", 0x38000000 + (offset << 1), data, mem_mask);
break;
}
}
@ -262,13 +263,13 @@ WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_status_w)
READ8_MEMBER(sgi_ip2_state::sgi_ip2_parctl_r)
{
verboselog(machine(), 0, "sgi_ip2_parctl_r: %02x\n", m_parctl);
verboselog(0, "sgi_ip2_parctl_r: %02x\n", m_parctl);
return m_parctl;
}
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_parctl_w)
{
verboselog(machine(), 0, "sgi_ip2_parctl_w: %02x\n", data);
verboselog(0, "sgi_ip2_parctl_w: %02x\n", data);
m_parctl = data;
}
@ -284,78 +285,78 @@ WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_parctl_w)
READ8_MEMBER(sgi_ip2_state::sgi_ip2_mbp_r)
{
verboselog(machine(), 0, "sgi_ip2_mbp_r: %02x\n", m_mbp);
verboselog(0, "sgi_ip2_mbp_r: %02x\n", m_mbp);
return m_mbp;
}
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_mbp_w)
{
verboselog(machine(), 0, "sgi_ip2_mbp_w: %02x\n", data);
verboselog(0, "sgi_ip2_mbp_w: %02x\n", data);
m_mbp = data;
}
READ32_MEMBER(sgi_ip2_state::sgi_ip2_ptmap_r)
{
verboselog(machine(), 0, "sgi_ip2_ptmap_r: %08x = %08x & %08x\n", 0x3b000000 + (offset << 2), m_ptmap[offset], mem_mask);
verboselog(0, "sgi_ip2_ptmap_r: %08x = %08x & %08x\n", 0x3b000000 + (offset << 2), m_ptmap[offset], mem_mask);
return m_ptmap[offset];
}
WRITE32_MEMBER(sgi_ip2_state::sgi_ip2_ptmap_w)
{
verboselog(machine(), 0, "sgi_ip2_ptmap_w: %08x = %08x & %08x\n", 0x3b000000 + (offset << 2), data, mem_mask);
verboselog(0, "sgi_ip2_ptmap_w: %08x = %08x & %08x\n", 0x3b000000 + (offset << 2), data, mem_mask);
COMBINE_DATA(&m_ptmap[offset]);
}
READ16_MEMBER(sgi_ip2_state::sgi_ip2_tdbase_r)
{
verboselog(machine(), 0, "sgi_ip2_tdbase_r: %04x\n", m_tdbase);
verboselog(0, "sgi_ip2_tdbase_r: %04x\n", m_tdbase);
return m_tdbase;
}
WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_tdbase_w)
{
verboselog(machine(), 0, "sgi_ip2_tdbase_w: %04x & %04x\n", data, mem_mask);
verboselog(0, "sgi_ip2_tdbase_w: %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&m_tdbase);
}
READ16_MEMBER(sgi_ip2_state::sgi_ip2_tdlmt_r)
{
verboselog(machine(), 0, "sgi_ip2_tdlmt_r: %04x\n", m_tdlmt);
verboselog(0, "sgi_ip2_tdlmt_r: %04x\n", m_tdlmt);
return m_tdlmt;
}
WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_tdlmt_w)
{
verboselog(machine(), 0, "sgi_ip2_tdlmt_w: %04x & %04x\n", data, mem_mask);
verboselog(0, "sgi_ip2_tdlmt_w: %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&m_tdlmt);
}
READ16_MEMBER(sgi_ip2_state::sgi_ip2_stkbase_r)
{
verboselog(machine(), 0, "sgi_ip2_stkbase_r: %04x\n", m_stkbase);
verboselog(0, "sgi_ip2_stkbase_r: %04x\n", m_stkbase);
return m_stkbase;
}
WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_stkbase_w)
{
verboselog(machine(), 0, "sgi_ip2_stkbase_w: %04x & %04x\n", data, mem_mask);
verboselog(0, "sgi_ip2_stkbase_w: %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&m_stkbase);
}
READ16_MEMBER(sgi_ip2_state::sgi_ip2_stklmt_r)
{
verboselog(machine(), 0, "sgi_ip2_stklmt_r: %04x\n", m_stklmt);
verboselog(0, "sgi_ip2_stklmt_r: %04x\n", m_stklmt);
return m_stklmt;
}
WRITE16_MEMBER(sgi_ip2_state::sgi_ip2_stklmt_w)
{
verboselog(machine(), 0, "sgi_ip2_stklmt_w: %04x & %04x\n", data, mem_mask);
verboselog(0, "sgi_ip2_stklmt_w: %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&m_stklmt);
}

35
src/mess/drivers/sgi_ip6.c
View File

@ -43,6 +43,7 @@ public:
virtual void video_start();
UINT32 screen_update_sgi_ip6(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(sgi_ip6_vbl);
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
};
@ -51,7 +52,7 @@ public:
#define ENABLE_VERBOSE_LOG (1)
#if ENABLE_VERBOSE_LOG
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
inline void ATTR_PRINTF(3,4) sgi_ip6_state::verboselog( int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
@ -60,7 +61,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
logerror("%08x: %s", machine().device("maincpu")->safe_pc(), buf);
}
}
#else
@ -93,16 +94,16 @@ READ32_MEMBER(sgi_ip6_state::ip6_unk1_r)
case 0x0000/4:
if(ACCESSING_BITS_16_31)
{
verboselog(machine(), 0, "ip6_unk1_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
verboselog(0, "ip6_unk1_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
}
if(ACCESSING_BITS_0_15)
{
verboselog(machine(), 0, "ip6_unk1_r: Unknown Halfword 0: %08x & %08x\n", m_ip6_regs.unknown_half_0, mem_mask );
verboselog(0, "ip6_unk1_r: Unknown Halfword 0: %08x & %08x\n", m_ip6_regs.unknown_half_0, mem_mask );
ret |= m_ip6_regs.unknown_half_0;
}
break;
default:
verboselog(machine(), 0, "ip6_unk1_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
verboselog(0, "ip6_unk1_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
break;
}
return ret;
@ -115,16 +116,16 @@ WRITE32_MEMBER(sgi_ip6_state::ip6_unk1_w)
case 0x0000/4:
if(ACCESSING_BITS_16_31)
{
verboselog(machine(), 0, "ip6_unk1_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
verboselog(0, "ip6_unk1_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
}
if(ACCESSING_BITS_0_15)
{
verboselog(machine(), 0, "ip6_unk1_w: Unknown Halfword 0 = %04x & %04x\n", data & 0x0000ffff, mem_mask & 0x0000ffff );
verboselog(0, "ip6_unk1_w: Unknown Halfword 0 = %04x & %04x\n", data & 0x0000ffff, mem_mask & 0x0000ffff );
m_ip6_regs.unknown_half_0 = data & 0x0000ffff;
}
break;
default:
verboselog(machine(), 0, "ip6_unk1_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
verboselog(0, "ip6_unk1_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
break;
}
}
@ -137,16 +138,16 @@ READ32_MEMBER(sgi_ip6_state::ip6_unk2_r)
case 0x0000/4:
if(!ACCESSING_BITS_24_31)
{
verboselog(machine(), 0, "ip6_unk2_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
verboselog(0, "ip6_unk2_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
}
if(ACCESSING_BITS_24_31)
{
verboselog(machine(), 0, "ip6_unk2_r: Unknown Byte 0 = %02x & %02x\n", m_ip6_regs.unknown_byte_0, mem_mask >> 24 );
verboselog(0, "ip6_unk2_r: Unknown Byte 0 = %02x & %02x\n", m_ip6_regs.unknown_byte_0, mem_mask >> 24 );
ret |= m_ip6_regs.unknown_byte_0 << 24;
}
break;
default:
verboselog(machine(), 0, "ip6_unk2_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
verboselog(0, "ip6_unk2_r: Unknown address: %08x & %08x\n", 0x1f880000 + (offset << 2), mem_mask );
break;
}
return ret;
@ -159,16 +160,16 @@ WRITE32_MEMBER(sgi_ip6_state::ip6_unk2_w)
case 0x0000/4:
if(!ACCESSING_BITS_24_31)
{
verboselog(machine(), 0, "ip6_unk2_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
verboselog(0, "ip6_unk2_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
}
if(ACCESSING_BITS_24_31)
{
verboselog(machine(), 0, "ip6_unk2_w: Unknown Byte 0 = %02x & %02x\n", data >> 24, mem_mask >> 24 );
verboselog(0, "ip6_unk2_w: Unknown Byte 0 = %02x & %02x\n", data >> 24, mem_mask >> 24 );
m_ip6_regs.unknown_byte_0 = (data & 0xff000000) >> 24;
}
break;
default:
verboselog(machine(), 0, "ip6_unk2_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
verboselog(0, "ip6_unk2_w: Unknown address: %08x = %08x & %08x\n", 0x1f880000 + (offset << 2), data, mem_mask );
break;
}
}
@ -178,19 +179,19 @@ READ32_MEMBER(sgi_ip6_state::ip6_unk3_r)
UINT32 ret = 0;
if(ACCESSING_BITS_16_23)
{
verboselog(machine(), 0, "ip6_unk3_r: Unknown Byte 1: %02x & %02x\n", m_ip6_regs.unknown_byte_1, (mem_mask >> 16) & 0x000000ff);
verboselog(0, "ip6_unk3_r: Unknown Byte 1: %02x & %02x\n", m_ip6_regs.unknown_byte_1, (mem_mask >> 16) & 0x000000ff);
ret |= m_ip6_regs.unknown_byte_1 << 16;
}
else
{
verboselog(machine(), 0, "ip6_unk3_r: Unknown address: %08x & %08x\n", 0x1fb00000 + (offset << 2), mem_mask );
verboselog(0, "ip6_unk3_r: Unknown address: %08x & %08x\n", 0x1fb00000 + (offset << 2), mem_mask );
}
return ret;
}
WRITE32_MEMBER(sgi_ip6_state::ip6_unk3_w)
{
verboselog(machine(), 0, "ip6_unk3_w: Unknown address: %08x = %08x & %08x\n", 0x1fb00000 + (offset << 2), data, mem_mask );
verboselog(0, "ip6_unk3_w: Unknown address: %08x = %08x & %08x\n", 0x1fb00000 + (offset << 2), data, mem_mask );
}
INTERRUPT_GEN_MEMBER(sgi_ip6_state::sgi_ip6_vbl)

13
src/mess/drivers/smc777.c
View File

@ -120,6 +120,7 @@ public:
TIMER_DEVICE_CALLBACK_MEMBER(keyboard_callback);
DECLARE_WRITE_LINE_MEMBER(smc777_fdc_intrq_w);
DECLARE_WRITE_LINE_MEMBER(smc777_fdc_drq_w);
void check_floppy_inserted();
};
@ -371,7 +372,7 @@ WRITE8_MEMBER(smc777_state::smc777_fbuf_w)
}
static void check_floppy_inserted(running_machine &machine)
void smc777_state::check_floppy_inserted()
{
int f_num;
floppy_image_legacy *floppy;
@ -380,15 +381,15 @@ static void check_floppy_inserted(running_machine &machine)
/* FIXME: floppy drive 1 doesn't work? */
for(f_num=0;f_num<2;f_num++)
{
floppy = flopimg_get_image(floppy_get_device(machine, f_num));
floppy_mon_w(floppy_get_device(machine, f_num), (floppy != NULL) ? 0 : 1);
floppy_drive_set_ready_state(floppy_get_device(machine, f_num), (floppy != NULL) ? 1 : 0,0);
floppy = flopimg_get_image(floppy_get_device(machine(), f_num));
floppy_mon_w(floppy_get_device(machine(), f_num), (floppy != NULL) ? 0 : 1);
floppy_drive_set_ready_state(floppy_get_device(machine(), f_num), (floppy != NULL) ? 1 : 0,0);
}
}
READ8_MEMBER(smc777_state::smc777_fdc1_r)
{
check_floppy_inserted(machine());
check_floppy_inserted();
switch(offset)
{
@ -411,7 +412,7 @@ READ8_MEMBER(smc777_state::smc777_fdc1_r)
WRITE8_MEMBER(smc777_state::smc777_fdc1_w)
{
check_floppy_inserted(machine());
check_floppy_inserted();
switch(offset)
{

73
src/mess/drivers/socrates.c
View File

@ -131,6 +131,11 @@ public:
INTERRUPT_GEN_MEMBER(assert_irq);
TIMER_CALLBACK_MEMBER(clear_speech_cb);
TIMER_CALLBACK_MEMBER(clear_irq_cb);
void socrates_set_rom_bank();
void socrates_set_ram_bank();
void socrates_update_kb();
void socrates_check_kb_latch();
rgb_t socrates_create_color(UINT8 color);
};
@ -140,51 +145,48 @@ public:
/* Devices */
static void socrates_set_rom_bank( running_machine &machine )
void socrates_state::socrates_set_rom_bank( )
{
socrates_state *state = machine.driver_data<socrates_state>();
state->membank( "bank1" )->set_base( state->memregion("maincpu")->base() + ( state->m_rom_bank * 0x4000 ));
membank( "bank1" )->set_base( memregion("maincpu")->base() + ( m_rom_bank * 0x4000 ));
}
static void socrates_set_ram_bank( running_machine &machine )
void socrates_state::socrates_set_ram_bank( )
{
socrates_state *state = machine.driver_data<socrates_state>();
state->membank( "bank2" )->set_base( machine.root_device().memregion("vram")->base() + ( (state->m_ram_bank&0x3) * 0x4000 )); // window 0
state->membank( "bank3" )->set_base( state->memregion("vram")->base() + ( ((state->m_ram_bank&0xC)>>2) * 0x4000 )); // window 1
membank( "bank2" )->set_base( machine().root_device().memregion("vram")->base() + ( (m_ram_bank&0x3) * 0x4000 )); // window 0
membank( "bank3" )->set_base( memregion("vram")->base() + ( ((m_ram_bank&0xC)>>2) * 0x4000 )); // window 1
}
static void socrates_update_kb( running_machine &machine )
void socrates_state::socrates_update_kb( )
{
socrates_state *state = machine.driver_data<socrates_state>();
static const char *const rownames[] = { "keyboard_40", "keyboard_41", "keyboard_42", "keyboard_43", "keyboard_44" };
int row, keyvalue, powerof2;
int shift = 0;
// first check that the kb latch[1] is clear; if it isn't, don't touch it!
if ((state->m_kb_latch_low[1] != 0) || (state->m_kb_latch_high[1] != 1)) return;
if ((m_kb_latch_low[1] != 0) || (m_kb_latch_high[1] != 1)) return;
// next check for joypad buttons
keyvalue = machine.root_device().ioport("keyboard_jp")->read();
keyvalue = machine().root_device().ioport("keyboard_jp")->read();
if (keyvalue != 0)
{
state->m_kb_latch_low[1] = (keyvalue & 0xFF0)>>4;
state->m_kb_latch_high[1] = 0x80 | (keyvalue & 0xF);
m_kb_latch_low[1] = (keyvalue & 0xFF0)>>4;
m_kb_latch_high[1] = 0x80 | (keyvalue & 0xF);
return; // get out of this function; due to the way key priorities work, we're done here.
}
// next check for mouse movement.
// this isn't written yet, so write me please!
// next check if shift is down
shift = machine.root_device().ioport("keyboard_50")->read();
shift = machine().root_device().ioport("keyboard_50")->read();
// find key low and high byte ok keyboard section
for (row = 4; row>=0; row--)
{
keyvalue = machine.root_device().ioport(rownames[row])->read();
keyvalue = machine().root_device().ioport(rownames[row])->read();
if (keyvalue != 0)
{
for (powerof2 = 9; powerof2 >= 0; powerof2--)
{
if ((keyvalue&(1<<powerof2)) == (1<<powerof2))
{
state->m_kb_latch_low[1] = (shift?0x50:0x40)+row;
state->m_kb_latch_high[1] = (0x80 | powerof2);
m_kb_latch_low[1] = (shift?0x50:0x40)+row;
m_kb_latch_high[1] = (0x80 | powerof2);
return; // get out of the for loop; due to the way key priorities work, we're done here.
}
}
@ -193,30 +195,29 @@ static void socrates_update_kb( running_machine &machine )
// no key was pressed... check if shift was hit then?
if (shift != 0)
{
state->m_kb_latch_low[1] = 0x50;
state->m_kb_latch_high[1] = 0x80;
m_kb_latch_low[1] = 0x50;
m_kb_latch_high[1] = 0x80;
}
}
static void socrates_check_kb_latch( running_machine &machine ) // if kb[1] is full and kb[0] is not, shift [1] to [0] and clear [1]
void socrates_state::socrates_check_kb_latch( ) // if kb[1] is full and kb[0] is not, shift [1] to [0] and clear [1]
{
socrates_state *state = machine.driver_data<socrates_state>();
if (((state->m_kb_latch_low[1] != 0) || (state->m_kb_latch_high[1] != 1)) &&
((state->m_kb_latch_low[0] == 0) && (state->m_kb_latch_high[0] == 1)))
if (((m_kb_latch_low[1] != 0) || (m_kb_latch_high[1] != 1)) &&
((m_kb_latch_low[0] == 0) && (m_kb_latch_high[0] == 1)))
{
state->m_kb_latch_low[0] = state->m_kb_latch_low[1];
state->m_kb_latch_low[1] = 0;
state->m_kb_latch_high[0] = state->m_kb_latch_high[1];
state->m_kb_latch_high[1] = 1;
m_kb_latch_low[0] = m_kb_latch_low[1];
m_kb_latch_low[1] = 0;
m_kb_latch_high[0] = m_kb_latch_high[1];
m_kb_latch_high[1] = 1;
}
}
void socrates_state::machine_reset()
{
m_rom_bank = 0xF3; // actually set semi-randomly on real console but we need to initialize it somewhere...
socrates_set_rom_bank( machine() );
socrates_set_rom_bank();
m_ram_bank = 0; // the actual console sets it semi randomly on power up, and the bios cleans it up.
socrates_set_ram_bank( machine() );
socrates_set_ram_bank();
m_kb_latch_low[0] = 0xFF;
m_kb_latch_high[0] = 0x8F;
m_kb_latch_low[1] = 0x00;
@ -253,7 +254,7 @@ READ8_MEMBER(socrates_state::socrates_rom_bank_r)
WRITE8_MEMBER(socrates_state::socrates_rom_bank_w)
{
m_rom_bank = data;
socrates_set_rom_bank(machine());
socrates_set_rom_bank();
}
READ8_MEMBER(socrates_state::socrates_ram_bank_r)
@ -264,7 +265,7 @@ READ8_MEMBER(socrates_state::socrates_ram_bank_r)
WRITE8_MEMBER(socrates_state::socrates_ram_bank_w)
{
m_ram_bank = data&0xF;
socrates_set_ram_bank(machine());
socrates_set_ram_bank();
}
READ8_MEMBER(socrates_state::read_f3)// used for read-only i/o ports as mame/mess doesn't have a way to set the unmapped area to read as 0xF3
@ -449,15 +450,15 @@ end hd38880 info.*/
READ8_MEMBER(socrates_state::socrates_keyboard_low_r)// keyboard code low
{
socrates_update_kb(machine());
socrates_check_kb_latch(machine());
socrates_update_kb();
socrates_check_kb_latch();
return m_kb_latch_low[0];
}
READ8_MEMBER(socrates_state::socrates_keyboard_high_r)// keyboard code high
{
socrates_update_kb(machine());
socrates_check_kb_latch(machine());
socrates_update_kb();
socrates_check_kb_latch();
return m_kb_latch_high[0];
}
@ -510,7 +511,7 @@ WRITE8_MEMBER(socrates_state::socrates_scroll_w)
// gamma: this needs to be messed with... may differ on different systems... attach to slider somehow?
#define GAMMA 1.5
static rgb_t socrates_create_color(UINT8 color)
rgb_t socrates_state::socrates_create_color(UINT8 color)
{
rgb_t composedcolor;
static const double lumatable[256] = {

21
src/mess/drivers/ssem.c
View File

@ -25,6 +25,9 @@ public:
UINT32 screen_update_ssem(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_INPUT_CHANGED_MEMBER(panel_check);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(ssem_store);
inline UINT32 reverse(UINT32 v);
void glyph_print(bitmap_rgb32 &bitmap, INT32 x, INT32 y, const char *msg, ...);
void strlower(char *buf);
};
@ -37,7 +40,7 @@ public:
// The de facto snapshot format for other SSEM simulators stores the data physically in that format as well.
// Therefore, in MESS, every 32-bit word has its bits reversed, too, and as a result the values must be
// un-reversed before being used.
INLINE UINT32 reverse(UINT32 v)
inline UINT32 ssem_state::reverse(UINT32 v)
{
// Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
// swap odd and even bits
@ -396,12 +399,12 @@ static const UINT8 char_glyphs[0x80][8] =
{ 0xff, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0xff },
};
static void glyph_print(running_machine &machine, bitmap_rgb32 &bitmap, INT32 x, INT32 y, const char *msg, ...)
void ssem_state::glyph_print(bitmap_rgb32 &bitmap, INT32 x, INT32 y, const char *msg, ...)
{
va_list arg_list;
char buf[32768];
INT32 index = 0;
screen_device *screen = machine.first_screen();
screen_device *screen = machine().first_screen();
const rectangle &visarea = screen->visible_area();
va_start( arg_list, msg );
@ -463,11 +466,11 @@ UINT32 ssem_state::screen_update_ssem(screen_device &screen, bitmap_rgb32 &bitma
{
if(word & (1 << (31 - bit)))
{
glyph_print(machine(), bitmap, bit << 3, line << 3, "%c", line == m_store_line ? 4 : 2);
glyph_print(bitmap, bit << 3, line << 3, "%c", line == m_store_line ? 4 : 2);
}
else
{
glyph_print(machine(), bitmap, bit << 3, line << 3, "%c", line == m_store_line ? 3 : 1);
glyph_print(bitmap, bit << 3, line << 3, "%c", line == m_store_line ? 3 : 1);
}
}
}
@ -476,11 +479,11 @@ UINT32 ssem_state::screen_update_ssem(screen_device &screen, bitmap_rgb32 &bitma
{
if(accum & (1 << bit))
{
glyph_print(machine(), bitmap, bit << 3, 264, "%c", 2);
glyph_print(bitmap, bit << 3, 264, "%c", 2);
}
else
{
glyph_print(machine(), bitmap, bit << 3, 264, "%c", 1);
glyph_print(bitmap, bit << 3, 264, "%c", 1);
}
}
@ -488,7 +491,7 @@ UINT32 ssem_state::screen_update_ssem(screen_device &screen, bitmap_rgb32 &bitma
(m_store[(m_store_line << 2) | 1] << 16) |
(m_store[(m_store_line << 2) | 2] << 8) |
(m_store[(m_store_line << 2) | 3] << 0));
glyph_print(machine(), bitmap, 0, 272, "LINE:%02d VALUE:%08x HALT:%d", m_store_line, word, ssem_cpu->state().state_int(SSEM_HALT));
glyph_print(bitmap, 0, 272, "LINE:%02d VALUE:%08x HALT:%d", m_store_line, word, ssem_cpu->state().state_int(SSEM_HALT));
return 0;
}
@ -496,7 +499,7 @@ UINT32 ssem_state::screen_update_ssem(screen_device &screen, bitmap_rgb32 &bitma
* Image helper functions *
\****************************************************/
static void strlower(char *buf)
void ssem_state::strlower(char *buf)
{
if(buf)
{

6
src/mess/drivers/supercon.c
View File

@ -117,6 +117,8 @@ protected:
required_ioport m_board_7;
required_ioport m_board_8;
void mouse_update();
int get_first_cleared_bit(UINT8 data);
int get_first_bit(UINT8 data);
};
@ -199,7 +201,7 @@ void supercon_state::clear_pieces()
}
}
static int get_first_cleared_bit(UINT8 data)
int supercon_state::get_first_cleared_bit(UINT8 data)
{
int i;
@ -210,7 +212,7 @@ static int get_first_cleared_bit(UINT8 data)
return NOT_VALID;
}
static int get_first_bit(UINT8 data)
int supercon_state::get_first_bit(UINT8 data)
{
int i;

264
src/mess/drivers/supracan.c
View File

@ -208,12 +208,20 @@ public:
TIMER_CALLBACK_MEMBER(supracan_line_off_callback);
TIMER_CALLBACK_MEMBER(supracan_video_callback);
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(supracan_cart);
inline void verboselog(const char *tag, int n_level, const char *s_fmt, ...);
int supracan_tilemap_get_region(int layer);
void supracan_tilemap_get_info_common(int layer, tile_data &tileinfo, int count);
void supracan_tilemap_get_info_roz(int layer, tile_data &tileinfo, int count);
int get_tilemap_dimensions(int &xsize, int &ysize, int layer);
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
void mark_active_tilemap_all_dirty(int layer);
void supracan_suprnova_draw_roz(bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *tmap, UINT32 startx, UINT32 starty, int incxx, int incxy, int incyx, int incyy, int wraparound/*, int columnscroll, UINT32* scrollram*/, int transmask);
};
#if ENABLE_VERBOSE_LOG
INLINE void verboselog(const char *tag, running_machine &machine, int n_level, const char *s_fmt, ...)
inline void supracan_state::verboselog(const char *tag, int n_level, const char *s_fmt, ...)
{
if( VERBOSE_LEVEL >= n_level )
{
@ -222,7 +230,7 @@ INLINE void verboselog(const char *tag, running_machine &machine, int n_level, c
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%06x: %s: %s", machine.device(tag)->safe_pc(), tag, buf );
logerror( "%06x: %s: %s", machine().device(tag)->safe_pc(), tag, buf );
}
}
@ -230,9 +238,8 @@ INLINE void verboselog(const char *tag, running_machine &machine, int n_level, c
#define verboselog(w,x,y,z,...)
#endif
static int supracan_tilemap_get_region(running_machine &machine, int layer)
int supracan_state::supracan_tilemap_get_region(int layer)
{
supracan_state *state = machine.driver_data<supracan_state>();
// HACK!!!
if (layer==2)
@ -245,7 +252,7 @@ static int supracan_tilemap_get_region(running_machine &machine, int layer)
{
// roz layer
int gfx_mode = (state->m_roz_mode & 3);
int gfx_mode = (m_roz_mode & 3);
switch(gfx_mode)
{
@ -259,7 +266,7 @@ static int supracan_tilemap_get_region(running_machine &machine, int layer)
else
{
// normal layers
int gfx_mode = (state->m_tilemap_mode[layer] & 0x7000) >> 12;
int gfx_mode = (m_tilemap_mode[layer] & 0x7000) >> 12;
switch(gfx_mode)
{
@ -274,15 +281,14 @@ static int supracan_tilemap_get_region(running_machine &machine, int layer)
}
static void supracan_tilemap_get_info_common(running_machine &machine, int layer, tile_data &tileinfo, int count)
void supracan_state::supracan_tilemap_get_info_common(int layer, tile_data &tileinfo, int count)
{
supracan_state *state = machine.driver_data<supracan_state>();
UINT16* supracan_vram = state->m_vram;
UINT16* supracan_vram = m_vram;
UINT32 base = (state->m_tilemap_base_addr[layer]);
int gfx_mode = (state->m_tilemap_mode[layer] & 0x7000) >> 12;
int region = supracan_tilemap_get_region(machine, layer);
UINT32 base = (m_tilemap_base_addr[layer]);
int gfx_mode = (m_tilemap_mode[layer] & 0x7000) >> 12;
int region = supracan_tilemap_get_region(layer);
count += base;
@ -311,7 +317,7 @@ static void supracan_tilemap_get_info_common(running_machine &machine, int layer
break;
default:
verboselog("maincpu", machine, 0, "Unsupported tilemap mode: %d\n", (state->m_tilemap_mode[layer] & 0x7000) >> 12);
verboselog("maincpu", 0, "Unsupported tilemap mode: %d\n", (m_tilemap_mode[layer] & 0x7000) >> 12);
break;
}
@ -325,26 +331,25 @@ static void supracan_tilemap_get_info_common(running_machine &machine, int layer
int flipxy = (supracan_vram[count] & 0x0c00)>>10;
int palette = ((supracan_vram[count] & 0xf000) >> 12) + palette_bank;
SET_TILE_INFO(region, tile, palette, TILE_FLIPXY(flipxy));
SET_TILE_INFO_MEMBER(region, tile, palette, TILE_FLIPXY(flipxy));
}
// I wonder how different this really is.. my guess, not at all.
static void supracan_tilemap_get_info_roz(running_machine &machine, int layer, tile_data &tileinfo, int count)
void supracan_state::supracan_tilemap_get_info_roz(int layer, tile_data &tileinfo, int count)
{
supracan_state *state = machine.driver_data<supracan_state>();
UINT16* supracan_vram = state->m_vram;
UINT16* supracan_vram = m_vram;
UINT32 base = state->m_roz_base_addr;
UINT32 base = m_roz_base_addr;
int region = 1;
UINT16 tile_bank = 0;
UINT16 palette_bank = 0;
region = supracan_tilemap_get_region(machine, layer);
region = supracan_tilemap_get_region(layer);
switch(state->m_roz_mode & 3) //FIXME: fix gfx bpp order
switch(m_roz_mode & 3) //FIXME: fix gfx bpp order
{
case 0:
// hack: case for startup logo
@ -356,21 +361,21 @@ static void supracan_tilemap_get_info_roz(running_machine &machine, int layer, t
if (count & 0x20) tile ^= 1;
tile |= (count & 0xc0)>>2;
SET_TILE_INFO(region, tile, 0, 0);
SET_TILE_INFO_MEMBER(region, tile, 0, 0);
return;
}
case 1:
tile_bank = (state->m_roz_tile_bank & 0xf000) >> 3;
tile_bank = (m_roz_tile_bank & 0xf000) >> 3;
break;
case 2:
tile_bank = (state->m_roz_tile_bank & 0xf000) >> 3;
tile_bank = (m_roz_tile_bank & 0xf000) >> 3;
break;
case 3:
tile_bank = (state->m_roz_tile_bank & 0xf000) >> 3;
tile_bank = (m_roz_tile_bank & 0xf000) >> 3;
break;
}
@ -380,29 +385,29 @@ static void supracan_tilemap_get_info_roz(running_machine &machine, int layer, t
int flipxy = (supracan_vram[count] & 0x0c00)>>10;
int palette = ((supracan_vram[count] & 0xf000) >> 12) + palette_bank;
SET_TILE_INFO(region, tile, palette, TILE_FLIPXY(flipxy));
SET_TILE_INFO_MEMBER(region, tile, palette, TILE_FLIPXY(flipxy));
}
TILE_GET_INFO_MEMBER(supracan_state::get_supracan_tilemap0_tile_info)
{
supracan_tilemap_get_info_common(machine(), 0, tileinfo, tile_index);
supracan_tilemap_get_info_common(0, tileinfo, tile_index);
}
TILE_GET_INFO_MEMBER(supracan_state::get_supracan_tilemap1_tile_info)
{
supracan_tilemap_get_info_common(machine(), 1, tileinfo, tile_index);
supracan_tilemap_get_info_common(1, tileinfo, tile_index);
}
TILE_GET_INFO_MEMBER(supracan_state::get_supracan_tilemap2_tile_info)
{
supracan_tilemap_get_info_common(machine(), 2, tileinfo, tile_index);
supracan_tilemap_get_info_common(2, tileinfo, tile_index);
}
TILE_GET_INFO_MEMBER(supracan_state::get_supracan_roz_tile_info)
{
supracan_tilemap_get_info_roz(machine(), 3, tileinfo, tile_index);
supracan_tilemap_get_info_roz(3, tileinfo, tile_index);
}
@ -435,16 +440,15 @@ void supracan_state::video_start()
m_tilemap_sizes[3][3] = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(supracan_state::get_supracan_roz_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64);
}
static int get_tilemap_dimensions(running_machine &machine, int &xsize, int &ysize, int layer)
int supracan_state::get_tilemap_dimensions(int &xsize, int &ysize, int layer)
{
supracan_state *state = (supracan_state *)machine.driver_data<supracan_state>();
int select;
xsize = 32;
ysize = 32;
if (layer==3) select = (state->m_roz_mode & 0x0f00);
else select = state->m_tilemap_flags[layer] & 0x0f00;
if (layer==3) select = (m_roz_mode & 0x0f00);
else select = m_tilemap_flags[layer] & 0x0f00;
switch(select)
{
@ -464,7 +468,7 @@ static int get_tilemap_dimensions(running_machine &machine, int &xsize, int &ysi
return 3;
default:
verboselog("maincpu", machine, 0, "Unsupported tilemap size for layer %d: %04x\n", layer, select);
verboselog("maincpu", 0, "Unsupported tilemap size for layer %d: %04x\n", layer, select);
return 0;
}
}
@ -472,10 +476,9 @@ static int get_tilemap_dimensions(running_machine &machine, int &xsize, int &ysi
static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
void supracan_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
{
supracan_state *state = machine.driver_data<supracan_state>();
UINT16 *supracan_vram = state->m_vram;
UINT16 *supracan_vram = m_vram;
// [0]
// -e-- ---- ---- ---- sprite enable?
@ -495,9 +498,9 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
// -ooo oooo oooo oooo Sprite address
UINT32 skip_count = 0;
UINT32 start_word = (state->m_sprite_base_addr >> 1) + skip_count * 4;
UINT32 end_word = start_word + (state->m_sprite_count - skip_count) * 4;
int region = (state->m_sprite_flags & 1) ? 0 : 1; //8bpp : 4bpp
UINT32 start_word = (m_sprite_base_addr >> 1) + skip_count * 4;
UINT32 end_word = start_word + (m_sprite_count - skip_count) * 4;
int region = (m_sprite_flags & 1) ? 0 : 1; //8bpp : 4bpp
// printf("frame\n");
#define VRAM_MASK (0xffff)
@ -514,7 +517,7 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
int sprite_xflip = (supracan_vram[i+1] & 0x0800) >> 11;
int sprite_yflip = (supracan_vram[i+1] & 0x0400) >> 10;
//int xscale = (supracan_vram[i+2] & 0xf000) >> 12;
gfx_element *gfx = machine.gfx[region];
gfx_element *gfx = machine().gfx[region];
@ -626,24 +629,23 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
static void mark_active_tilemap_all_dirty(running_machine &machine, int layer)
void supracan_state::mark_active_tilemap_all_dirty(int layer)
{
supracan_state *state = (supracan_state *)machine.driver_data<supracan_state>();
int xsize = 0;
int ysize = 0;
int which_tilemap_size;
which_tilemap_size = get_tilemap_dimensions(machine, xsize, ysize, layer);
which_tilemap_size = get_tilemap_dimensions(xsize, ysize, layer);
// for (int i=0;i<4;i++)
// tilemap_mark_all_tiles_dirty(state->m_tilemap_sizes[layer][i]);
state->m_tilemap_sizes[layer][which_tilemap_size]->mark_all_dirty();
// tilemap_mark_all_tiles_dirty(m_tilemap_sizes[layer][i]);
m_tilemap_sizes[layer][which_tilemap_size]->mark_all_dirty();
}
/* draws ROZ with linescroll OR columnscroll to 16-bit indexed bitmap */
static void supracan_suprnova_draw_roz(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *tmap, UINT32 startx, UINT32 starty, int incxx, int incxy, int incyx, int incyy, int wraparound/*, int columnscroll, UINT32* scrollram*/, int transmask)
void supracan_state::supracan_suprnova_draw_roz(bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *tmap, UINT32 startx, UINT32 starty, int incxx, int incxy, int incyx, int incyy, int wraparound/*, int columnscroll, UINT32* scrollram*/, int transmask)
{
//bitmap_ind16 *destbitmap = bitmap;
bitmap_ind16 &srcbitmap = tmap->pixmap();
@ -779,7 +781,7 @@ UINT32 supracan_state::screen_update_supracan(screen_device &screen, bitmap_ind1
m_sprite_final_bitmap.fill(0x00, visarea);
bitmap.fill(0x80, visarea);
draw_sprites(machine(), m_sprite_final_bitmap, visarea);
draw_sprites( m_sprite_final_bitmap, visarea);
}
}
else
@ -787,7 +789,7 @@ UINT32 supracan_state::screen_update_supracan(screen_device &screen, bitmap_ind1
m_sprite_final_bitmap.fill(0x00, cliprect);
bitmap.fill(0x80, cliprect);
draw_sprites(machine(), m_sprite_final_bitmap, cliprect);
draw_sprites(m_sprite_final_bitmap, cliprect);
}
@ -826,9 +828,9 @@ UINT32 supracan_state::screen_update_supracan(screen_device &screen, bitmap_ind1
if (priority==pri)
{
// tilemap_num = layer;
which_tilemap_size = get_tilemap_dimensions(machine(), xsize, ysize, layer);
which_tilemap_size = get_tilemap_dimensions(xsize, ysize, layer);
bitmap_ind16 &src_bitmap = m_tilemap_sizes[layer][which_tilemap_size]->pixmap();
int gfx_region = supracan_tilemap_get_region(machine(), layer);
int gfx_region = supracan_tilemap_get_region(layer);
int transmask = 0xff;
switch (gfx_region)
@ -949,12 +951,12 @@ UINT32 supracan_state::screen_update_supracan(screen_device &screen, bitmap_ind1
if (m_vram[m_roz_unk_base0/2 + y]) // incxx = 0, no draw?
supracan_suprnova_draw_roz(machine(), bitmap, clip, m_tilemap_sizes[layer][which_tilemap_size], scrollx<<8, scrolly<<8, incxx<<8, incxy<<8, incyx<<8, incyy<<8, wrap, transmask);
supracan_suprnova_draw_roz(bitmap, clip, m_tilemap_sizes[layer][which_tilemap_size], scrollx<<8, scrolly<<8, incxx<<8, incxy<<8, incyx<<8, incyy<<8, wrap, transmask);
}
}
else
{
supracan_suprnova_draw_roz(machine(), bitmap, cliprect, m_tilemap_sizes[layer][which_tilemap_size], scrollx<<8, scrolly<<8, incxx<<8, incxy<<8, incyx<<8, incyy<<8, wrap, transmask);
supracan_suprnova_draw_roz(bitmap, cliprect, m_tilemap_sizes[layer][which_tilemap_size], scrollx<<8, scrolly<<8, incxx<<8, incxy<<8, incyx<<8, incyy<<8, wrap, transmask);
}
}
}
@ -993,36 +995,36 @@ WRITE16_MEMBER( supracan_state::supracan_dma_w )
{
case 0x00/2: // Source address MSW
case 0x10/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: source msw %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: source msw %d: %04x\n", ch, data);
acan_dma_regs->source[ch] &= 0x0000ffff;
acan_dma_regs->source[ch] |= data << 16;
break;
case 0x02/2: // Source address LSW
case 0x12/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: source lsw %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: source lsw %d: %04x\n", ch, data);
acan_dma_regs->source[ch] &= 0xffff0000;
acan_dma_regs->source[ch] |= data;
break;
case 0x04/2: // Destination address MSW
case 0x14/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: dest msw %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: dest msw %d: %04x\n", ch, data);
acan_dma_regs->dest[ch] &= 0x0000ffff;
acan_dma_regs->dest[ch] |= data << 16;
break;
case 0x06/2: // Destination address LSW
case 0x16/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: dest lsw %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: dest lsw %d: %04x\n", ch, data);
acan_dma_regs->dest[ch] &= 0xffff0000;
acan_dma_regs->dest[ch] |= data;
break;
case 0x08/2: // Byte count
case 0x18/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: count %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: count %d: %04x\n", ch, data);
acan_dma_regs->count[ch] = data;
break;
case 0x0a/2: // Control
case 0x1a/2:
verboselog("maincpu", machine(), 0, "supracan_dma_w: control %d: %04x\n", ch, data);
verboselog("maincpu", 0, "supracan_dma_w: control %d: %04x\n", ch, data);
if(data & 0x8800)
{
// if(data & 0x2000)
@ -1050,12 +1052,12 @@ WRITE16_MEMBER( supracan_state::supracan_dma_w )
}
else if(data != 0x0000) // fake DMA, used by C.U.G.
{
verboselog("maincpu", machine(), 0, "supracan_dma_w: Unknown DMA kickoff value of %04x (other regs %08x, %08x, %d)\n", data, acan_dma_regs->source[ch], acan_dma_regs->dest[ch], acan_dma_regs->count[ch] + 1);
verboselog("maincpu", 0, "supracan_dma_w: Unknown DMA kickoff value of %04x (other regs %08x, %08x, %d)\n", data, acan_dma_regs->source[ch], acan_dma_regs->dest[ch], acan_dma_regs->count[ch] + 1);
fatalerror("supracan_dma_w: Unknown DMA kickoff value of %04x (other regs %08x, %08x, %d)\n",data, acan_dma_regs->source[ch], acan_dma_regs->dest[ch], acan_dma_regs->count[ch] + 1);
}
break;
default:
verboselog("maincpu", machine(), 0, "supracan_dma_w: Unknown register: %08x = %04x & %04x\n", 0xe90020 + (offset << 1), data, mem_mask);
verboselog("maincpu", 0, "supracan_dma_w: Unknown register: %08x = %04x & %04x\n", 0xe90020 + (offset << 1), data, mem_mask);
break;
}
}
@ -1134,7 +1136,7 @@ READ8_MEMBER( supracan_state::supracan_6502_soundmem_r )
case 0x410: // Sound IRQ enable
data = m_sound_irq_enable_reg;
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_r: IRQ enable: %04x\n", data);
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_r: IRQ enable: %04x\n", data);
if(!mem.debugger_access())
{
if(m_sound_irq_enable_reg & m_sound_irq_source_reg)
@ -1150,17 +1152,17 @@ READ8_MEMBER( supracan_state::supracan_6502_soundmem_r )
case 0x411: // Sound IRQ source
data = m_sound_irq_source_reg;
m_sound_irq_source_reg = 0;
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 3, "supracan_soundreg_r: IRQ source: %04x\n", data);
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_r: IRQ source: %04x\n", data);
if(!mem.debugger_access())
{
machine().device("soundcpu")->execute().set_input_line(0, CLEAR_LINE);
}
break;
case 0x420:
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 3, "supracan_soundreg_r: Sound hardware status? (not yet implemented): %02x\n", 0);
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_r: Sound hardware status? (not yet implemented): %02x\n", 0);
break;
case 0x422:
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 3, "supracan_soundreg_r: Sound hardware data? (not yet implemented): %02x\n", 0);
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_r: Sound hardware data? (not yet implemented): %02x\n", 0);
break;
case 0x404:
case 0x405:
@ -1171,7 +1173,7 @@ READ8_MEMBER( supracan_state::supracan_6502_soundmem_r )
default:
if(offset >= 0x300 && offset < 0x500)
{
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_r: Unknown register %04x\n", offset);
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_r: Unknown register %04x\n", offset);
}
break;
}
@ -1186,29 +1188,29 @@ WRITE8_MEMBER( supracan_state::supracan_6502_soundmem_w )
case 0x407:
if(m_sound_cpu_68k_irq_reg &~ data)
{
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_w: sound_cpu_68k_irq_reg: %04x: Triggering M68k IRQ\n", data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_w: sound_cpu_68k_irq_reg: %04x: Triggering M68k IRQ\n", data);
m_maincpu->set_input_line(7, HOLD_LINE);
}
else
{
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_w: sound_cpu_68k_irq_reg: %04x\n", data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_w: sound_cpu_68k_irq_reg: %04x\n", data);
}
m_sound_cpu_68k_irq_reg = data;
break;
case 0x410:
m_sound_irq_enable_reg = data;
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_w: IRQ enable: %02x\n", data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_w: IRQ enable: %02x\n", data);
break;
case 0x420:
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 3, "supracan_soundreg_w: Sound hardware reg data? (not yet implemented): %02x\n", data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_w: Sound hardware reg data? (not yet implemented): %02x\n", data);
break;
case 0x422:
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 3, "supracan_soundreg_w: Sound hardware reg addr? (not yet implemented): %02x\n", data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_w: Sound hardware reg addr? (not yet implemented): %02x\n", data);
break;
default:
if(offset >= 0x300 && offset < 0x500)
{
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", machine(), 0, "supracan_soundreg_w: Unknown register %04x = %02x\n", offset, data);
verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 0, "supracan_soundreg_w: Unknown register %04x = %02x\n", offset, data);
}
m_soundram[offset] = data;
break;
@ -1405,7 +1407,7 @@ READ16_MEMBER( supracan_state::supracan_sound_r )
switch( offset )
{
default:
verboselog("maincpu", machine(), 0, "supracan_sound_r: Unknown register: (%08x) & %04x\n", 0xe90000 + (offset << 1), mem_mask);
verboselog("maincpu", 0, "supracan_sound_r: Unknown register: (%08x) & %04x\n", 0xe90000 + (offset << 1), mem_mask);
break;
}
@ -1437,10 +1439,10 @@ WRITE16_MEMBER( supracan_state::supracan_sound_w )
/* Halt the sound cpu */
machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
verboselog("maincpu", machine(), 0, "sound cpu ctrl: %04x\n", data);
verboselog("maincpu", 0, "sound cpu ctrl: %04x\n", data);
break;
default:
verboselog("maincpu", machine(), 0, "supracan_sound_w: Unknown register: %08x = %04x & %04x\n", 0xe90000 + (offset << 1), data, mem_mask);
verboselog("maincpu", 0, "supracan_sound_w: Unknown register: %08x = %04x & %04x\n", 0xe90000 + (offset << 1), data, mem_mask);
break;
}
}
@ -1456,7 +1458,7 @@ READ16_MEMBER( supracan_state::supracan_video_r )
case 0x00/2: // Video IRQ flags
if(!mem.debugger_access())
{
//verboselog("maincpu", machine(), 0, "read video IRQ flags (%04x)\n", data);
//verboselog("maincpu", 0, "read video IRQ flags (%04x)\n", data);
m_maincpu->set_input_line(7, CLEAR_LINE);
}
break;
@ -1466,16 +1468,16 @@ READ16_MEMBER( supracan_state::supracan_video_r )
data = 0;
break;
case 0x100/2:
if(!mem.debugger_access()) verboselog("maincpu", machine(), 0, "read tilemap_flags[0] (%04x)\n", data);
if(!mem.debugger_access()) verboselog("maincpu", 0, "read tilemap_flags[0] (%04x)\n", data);
break;
case 0x106/2:
if(!mem.debugger_access()) verboselog("maincpu", machine(), 0, "read tilemap_scrolly[0] (%04x)\n", data);
if(!mem.debugger_access()) verboselog("maincpu", 0, "read tilemap_scrolly[0] (%04x)\n", data);
break;
case 0x120/2:
if(!mem.debugger_access()) verboselog("maincpu", machine(), 0, "read tilemap_flags[1] (%04x)\n", data);
if(!mem.debugger_access()) verboselog("maincpu", 0, "read tilemap_flags[1] (%04x)\n", data);
break;
default:
if(!mem.debugger_access()) verboselog("maincpu", machine(), 0, "supracan_video_r: Unknown register: %08x (%04x & %04x)\n", 0xf00000 + (offset << 1), data, mem_mask);
if(!mem.debugger_access()) verboselog("maincpu", 0, "supracan_video_r: Unknown register: %08x (%04x & %04x)\n", 0xf00000 + (offset << 1), data, mem_mask);
break;
}
@ -1515,10 +1517,10 @@ TIMER_CALLBACK_MEMBER(supracan_state::supracan_video_callback)
m_video_regs[0] &= 0x7fff;
// we really need better management of this
mark_active_tilemap_all_dirty(machine(), 0);
mark_active_tilemap_all_dirty(machine(), 1);
mark_active_tilemap_all_dirty(machine(), 2);
mark_active_tilemap_all_dirty(machine(), 3);
mark_active_tilemap_all_dirty(0);
mark_active_tilemap_all_dirty(1);
mark_active_tilemap_all_dirty(2);
mark_active_tilemap_all_dirty(3);
break;
@ -1530,7 +1532,7 @@ TIMER_CALLBACK_MEMBER(supracan_state::supracan_video_callback)
case 240:
if(m_irq_mask & 1)
{
verboselog("maincpu", machine(), 0, "Triggering VBL IRQ\n\n");
verboselog("maincpu", 0, "Triggering VBL IRQ\n\n");
m_maincpu->set_input_line(7, HOLD_LINE);
}
break;
@ -1554,35 +1556,35 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
switch(offset)
{
case 0x10/2: // Byte count
verboselog("maincpu", machine(), 0, "sprite dma word count: %04x\n", data);
verboselog("maincpu", 0, "sprite dma word count: %04x\n", data);
acan_sprdma_regs->count = data;
break;
case 0x12/2: // Destination address MSW
acan_sprdma_regs->dst &= 0x0000ffff;
acan_sprdma_regs->dst |= data << 16;
verboselog("maincpu", machine(), 0, "sprite dma dest msw: %04x\n", data);
verboselog("maincpu", 0, "sprite dma dest msw: %04x\n", data);
break;
case 0x14/2: // Destination address LSW
acan_sprdma_regs->dst &= 0xffff0000;
acan_sprdma_regs->dst |= data;
verboselog("maincpu", machine(), 0, "sprite dma dest lsw: %04x\n", data);
verboselog("maincpu", 0, "sprite dma dest lsw: %04x\n", data);
break;
case 0x16/2: // Source word increment
verboselog("maincpu", machine(), 0, "sprite dma dest word inc: %04x\n", data);
verboselog("maincpu", 0, "sprite dma dest word inc: %04x\n", data);
acan_sprdma_regs->dst_inc = data;
break;
case 0x18/2: // Source address MSW
acan_sprdma_regs->src &= 0x0000ffff;
acan_sprdma_regs->src |= data << 16;
verboselog("maincpu", machine(), 0, "sprite dma src msw: %04x\n", data);
verboselog("maincpu", 0, "sprite dma src msw: %04x\n", data);
break;
case 0x1a/2: // Source address LSW
verboselog("maincpu", machine(), 0, "sprite dma src lsw: %04x\n", data);
verboselog("maincpu", 0, "sprite dma src lsw: %04x\n", data);
acan_sprdma_regs->src &= 0xffff0000;
acan_sprdma_regs->src |= data;
break;
case 0x1c/2: // Source word increment
verboselog("maincpu", machine(), 0, "sprite dma src word inc: %04x\n", data);
verboselog("maincpu", 0, "sprite dma src word inc: %04x\n", data);
acan_sprdma_regs->src_inc = data;
break;
case 0x1e/2:
@ -1619,12 +1621,12 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
}
else
{
verboselog("maincpu", machine(), 0, "supracan_dma_w: Attempting to kick off a DMA without bit 15 set! (%04x)\n", data);
verboselog("maincpu", 0, "supracan_dma_w: Attempting to kick off a DMA without bit 15 set! (%04x)\n", data);
}
break;
case 0x08/2:
{
verboselog("maincpu", machine(), 3, "video_flags = %04x\n", data);
verboselog("maincpu", 3, "video_flags = %04x\n", data);
m_video_flags = data;
rectangle visarea = machine().primary_screen->visible_area();
@ -1636,7 +1638,7 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
case 0x0a/2:
{
// raster interrupt
verboselog("maincpu", machine(), 0, "IRQ Trigger? = %04x\n", data);
verboselog("maincpu", 0, "IRQ Trigger? = %04x\n", data);
if(data & 0x8000)
{
m_line_on_timer->adjust(machine().primary_screen->time_until_pos((data & 0x00ff), 0));
@ -1650,7 +1652,7 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
case 0x0c/2:
{
verboselog("maincpu", machine(), 0, "IRQ De-Trigger? = %04x\n", data);
verboselog("maincpu", 0, "IRQ De-Trigger? = %04x\n", data);
if(data & 0x8000)
{
m_line_off_timer->adjust(machine().primary_screen->time_until_pos(data & 0x00ff, 0));
@ -1663,48 +1665,48 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
break;
/* Sprites */
case 0x20/2: m_sprite_base_addr = data << 2; verboselog("maincpu", machine(), 0, "sprite_base_addr = %04x\n", data); break;
case 0x22/2: m_sprite_count = data+1; verboselog("maincpu", machine(), 0, "sprite_count = %d\n", data+1); break;
case 0x26/2: m_sprite_flags = data; verboselog("maincpu", machine(), 0, "sprite_flags = %04x\n", data); break;
case 0x20/2: m_sprite_base_addr = data << 2; verboselog("maincpu", 0, "sprite_base_addr = %04x\n", data); break;
case 0x22/2: m_sprite_count = data+1; verboselog("maincpu", 0, "sprite_count = %d\n", data+1); break;
case 0x26/2: m_sprite_flags = data; verboselog("maincpu", 0, "sprite_flags = %04x\n", data); break;
/* Tilemap 0 */
case 0x100/2: m_tilemap_flags[0] = data; verboselog("maincpu", machine(), 3, "tilemap_flags[0] = %04x\n", data); break;
case 0x104/2: m_tilemap_scrollx[0] = data; verboselog("maincpu", machine(), 3, "tilemap_scrollx[0] = %04x\n", data); break;
case 0x106/2: m_tilemap_scrolly[0] = data; verboselog("maincpu", machine(), 3, "tilemap_scrolly[0] = %04x\n", data); break;
case 0x108/2: m_tilemap_base_addr[0] = (data) << 1; verboselog("maincpu", machine(), 3, "tilemap_base_addr[0] = %05x\n", data << 2); break;
case 0x10a/2: m_tilemap_mode[0] = data; verboselog("maincpu", machine(), 3, "tilemap_mode[0] = %04x\n", data); break;
case 0x100/2: m_tilemap_flags[0] = data; verboselog("maincpu", 3, "tilemap_flags[0] = %04x\n", data); break;
case 0x104/2: m_tilemap_scrollx[0] = data; verboselog("maincpu", 3, "tilemap_scrollx[0] = %04x\n", data); break;
case 0x106/2: m_tilemap_scrolly[0] = data; verboselog("maincpu", 3, "tilemap_scrolly[0] = %04x\n", data); break;
case 0x108/2: m_tilemap_base_addr[0] = (data) << 1; verboselog("maincpu", 3, "tilemap_base_addr[0] = %05x\n", data << 2); break;
case 0x10a/2: m_tilemap_mode[0] = data; verboselog("maincpu", 3, "tilemap_mode[0] = %04x\n", data); break;
/* Tilemap 1 */
case 0x120/2: m_tilemap_flags[1] = data; verboselog("maincpu", machine(), 3, "tilemap_flags[1] = %04x\n", data); break;
case 0x124/2: m_tilemap_scrollx[1] = data; verboselog("maincpu", machine(), 3, "tilemap_scrollx[1] = %04x\n", data); break;
case 0x126/2: m_tilemap_scrolly[1] = data; verboselog("maincpu", machine(), 3, "tilemap_scrolly[1] = %04x\n", data); break;
case 0x128/2: m_tilemap_base_addr[1] = (data) << 1; verboselog("maincpu", machine(), 3, "tilemap_base_addr[1] = %05x\n", data << 2); break;
case 0x12a/2: m_tilemap_mode[1] = data; verboselog("maincpu", machine(), 3, "tilemap_mode[1] = %04x\n", data); break;
case 0x120/2: m_tilemap_flags[1] = data; verboselog("maincpu", 3, "tilemap_flags[1] = %04x\n", data); break;
case 0x124/2: m_tilemap_scrollx[1] = data; verboselog("maincpu", 3, "tilemap_scrollx[1] = %04x\n", data); break;
case 0x126/2: m_tilemap_scrolly[1] = data; verboselog("maincpu", 3, "tilemap_scrolly[1] = %04x\n", data); break;
case 0x128/2: m_tilemap_base_addr[1] = (data) << 1; verboselog("maincpu", 3, "tilemap_base_addr[1] = %05x\n", data << 2); break;
case 0x12a/2: m_tilemap_mode[1] = data; verboselog("maincpu", 3, "tilemap_mode[1] = %04x\n", data); break;
/* Tilemap 2? */
case 0x140/2: m_tilemap_flags[2] = data; verboselog("maincpu", machine(), 0, "tilemap_flags[2] = %04x\n", data); break;
case 0x144/2: m_tilemap_scrollx[2] = data; verboselog("maincpu", machine(), 0, "tilemap_scrollx[2] = %04x\n", data); break;
case 0x146/2: m_tilemap_scrolly[2] = data; verboselog("maincpu", machine(), 0, "tilemap_scrolly[2] = %04x\n", data); break;
case 0x148/2: m_tilemap_base_addr[2] = (data) << 1; verboselog("maincpu", machine(), 0, "tilemap_base_addr[2] = %05x\n", data << 2); break;
case 0x14a/2: m_tilemap_mode[2] = data; verboselog("maincpu", machine(), 0, "tilemap_mode[2] = %04x\n", data); break;
case 0x140/2: m_tilemap_flags[2] = data; verboselog("maincpu", 0, "tilemap_flags[2] = %04x\n", data); break;
case 0x144/2: m_tilemap_scrollx[2] = data; verboselog("maincpu", 0, "tilemap_scrollx[2] = %04x\n", data); break;
case 0x146/2: m_tilemap_scrolly[2] = data; verboselog("maincpu", 0, "tilemap_scrolly[2] = %04x\n", data); break;
case 0x148/2: m_tilemap_base_addr[2] = (data) << 1; verboselog("maincpu", 0, "tilemap_base_addr[2] = %05x\n", data << 2); break;
case 0x14a/2: m_tilemap_mode[2] = data; verboselog("maincpu", 0, "tilemap_mode[2] = %04x\n", data); break;
/* ROZ */
case 0x180/2: m_roz_mode = data; verboselog("maincpu", machine(), 3, "roz_mode = %04x\n", data); break;
case 0x184/2: m_roz_scrollx = (data << 16) | (m_roz_scrollx & 0xffff); m_roz_changed |= 1; verboselog("maincpu", machine(), 3, "roz_scrollx = %08x\n", m_roz_scrollx); break;
case 0x186/2: m_roz_scrollx = (data) | (m_roz_scrollx & 0xffff0000); m_roz_changed |= 1; verboselog("maincpu", machine(), 3, "roz_scrollx = %08x\n", m_roz_scrollx); break;
case 0x188/2: m_roz_scrolly = (data << 16) | (m_roz_scrolly & 0xffff); m_roz_changed |= 2; verboselog("maincpu", machine(), 3, "roz_scrolly = %08x\n", m_roz_scrolly); break;
case 0x18a/2: m_roz_scrolly = (data) | (m_roz_scrolly & 0xffff0000); m_roz_changed |= 2; verboselog("maincpu", machine(), 3, "roz_scrolly = %08x\n", m_roz_scrolly); break;
case 0x18c/2: m_roz_coeffa = data; verboselog("maincpu", machine(), 3, "roz_coeffa = %04x\n", data); break;
case 0x18e/2: m_roz_coeffb = data; verboselog("maincpu", machine(), 3, "roz_coeffb = %04x\n", data); break;
case 0x190/2: m_roz_coeffc = data; verboselog("maincpu", machine(), 3, "roz_coeffc = %04x\n", data); break;
case 0x192/2: m_roz_coeffd = data; verboselog("maincpu", machine(), 3, "roz_coeffd = %04x\n", data); break;
case 0x194/2: m_roz_base_addr = (data) << 1; verboselog("maincpu", machine(), 3, "roz_base_addr = %05x\n", data << 2); break;
case 0x196/2: m_roz_tile_bank = data; verboselog("maincpu", machine(), 3, "roz_tile_bank = %04x\n", data); break; //tile bank
case 0x198/2: m_roz_unk_base0 = data << 2; verboselog("maincpu", machine(), 3, "roz_unk_base0 = %05x\n", data << 2); break;
case 0x19a/2: m_roz_unk_base1 = data << 2; verboselog("maincpu", machine(), 3, "roz_unk_base1 = %05x\n", data << 2); break;
case 0x19e/2: m_roz_unk_base2 = data << 2; verboselog("maincpu", machine(), 3, "roz_unk_base2 = %05x\n", data << 2); break;
case 0x180/2: m_roz_mode = data; verboselog("maincpu", 3, "roz_mode = %04x\n", data); break;
case 0x184/2: m_roz_scrollx = (data << 16) | (m_roz_scrollx & 0xffff); m_roz_changed |= 1; verboselog("maincpu", 3, "roz_scrollx = %08x\n", m_roz_scrollx); break;
case 0x186/2: m_roz_scrollx = (data) | (m_roz_scrollx & 0xffff0000); m_roz_changed |= 1; verboselog("maincpu", 3, "roz_scrollx = %08x\n", m_roz_scrollx); break;
case 0x188/2: m_roz_scrolly = (data << 16) | (m_roz_scrolly & 0xffff); m_roz_changed |= 2; verboselog("maincpu", 3, "roz_scrolly = %08x\n", m_roz_scrolly); break;
case 0x18a/2: m_roz_scrolly = (data) | (m_roz_scrolly & 0xffff0000); m_roz_changed |= 2; verboselog("maincpu", 3, "roz_scrolly = %08x\n", m_roz_scrolly); break;
case 0x18c/2: m_roz_coeffa = data; verboselog("maincpu", 3, "roz_coeffa = %04x\n", data); break;
case 0x18e/2: m_roz_coeffb = data; verboselog("maincpu", 3, "roz_coeffb = %04x\n", data); break;
case 0x190/2: m_roz_coeffc = data; verboselog("maincpu", 3, "roz_coeffc = %04x\n", data); break;
case 0x192/2: m_roz_coeffd = data; verboselog("maincpu", 3, "roz_coeffd = %04x\n", data); break;
case 0x194/2: m_roz_base_addr = (data) << 1; verboselog("maincpu", 3, "roz_base_addr = %05x\n", data << 2); break;
case 0x196/2: m_roz_tile_bank = data; verboselog("maincpu", 3, "roz_tile_bank = %04x\n", data); break; //tile bank
case 0x198/2: m_roz_unk_base0 = data << 2; verboselog("maincpu", 3, "roz_unk_base0 = %05x\n", data << 2); break;
case 0x19a/2: m_roz_unk_base1 = data << 2; verboselog("maincpu", 3, "roz_unk_base1 = %05x\n", data << 2); break;
case 0x19e/2: m_roz_unk_base2 = data << 2; verboselog("maincpu", 3, "roz_unk_base2 = %05x\n", data << 2); break;
case 0x1d0/2: m_unk_1d0 = data; verboselog("maincpu", machine(), 3, "unk_1d0 = %04x\n", data); break;
case 0x1d0/2: m_unk_1d0 = data; verboselog("maincpu", 3, "unk_1d0 = %04x\n", data); break;
@ -1717,10 +1719,10 @@ WRITE16_MEMBER( supracan_state::supracan_video_w )
m_maincpu->set_input_line(7, CLEAR_LINE);
}
#endif
verboselog("maincpu", machine(), 3, "irq_mask = %04x\n", data);
verboselog("maincpu", 3, "irq_mask = %04x\n", data);
break;
default:
verboselog("maincpu", machine(), 0, "supracan_video_w: Unknown register: %08x = %04x & %04x\n", 0xf00000 + (offset << 1), data, mem_mask);
verboselog("maincpu", 0, "supracan_video_w: Unknown register: %08x = %04x & %04x\n", 0xf00000 + (offset << 1), data, mem_mask);
break;
}
m_video_regs[offset] = data;

3
src/mess/drivers/ti990_10.c
View File

@ -90,6 +90,7 @@ public:
virtual void video_start();
UINT32 screen_update_ti990_10(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(ti990_10_line_interrupt);
void idle_callback(int state);
};
@ -115,7 +116,7 @@ INTERRUPT_GEN_MEMBER(ti990_10_state::ti990_10_line_interrupt)
}
#ifdef UNUSED_FUNCTION
static void idle_callback(int state)
void ti990_10_state::idle_callback(int state)
{
}
#endif

3
src/mess/drivers/ti990_4.c
View File

@ -63,6 +63,7 @@ public:
virtual void video_start();
UINT32 screen_update_ti990_4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(ti990_4_line_interrupt);
void idle_callback(int state);
};
@ -88,7 +89,7 @@ INTERRUPT_GEN_MEMBER(ti990_4_state::ti990_4_line_interrupt)
}
#ifdef UNUSED_FUNCTION
static void idle_callback(int state)
void ti990_4_state::idle_callback(int state)
{
}
#endif

140
src/mess/drivers/vii.c
View File

@ -157,6 +157,11 @@ protected:
void vii_blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, UINT32 bitmap_addr, UINT16 *regs);
void vii_blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, UINT32 base_addr);
void vii_blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth);
inline void verboselog(int n_level, const char *s_fmt, ...);
inline UINT8 expand_rgb5_to_rgb8(UINT8 val);
inline UINT8 vii_mix_channel(UINT8 a, UINT8 b);
void vii_mix_pixel(UINT32 offset, UINT16 rgb);
void vii_set_pixel(UINT32 offset, UINT16 rgb);
};
enum
@ -179,7 +184,7 @@ enum
#define ENABLE_VERBOSE_LOG (1)
#if ENABLE_VERBOSE_LOG
INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt, ...)
inline void vii_state::verboselog(int n_level, const char *s_fmt, ...)
{
if( VERBOSE_LEVEL >= n_level )
{
@ -188,7 +193,6 @@ INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%04x: %s", machine.driver_data<vii_state>()->m_maincpu->pc(), buf );
}
}
#else
@ -203,31 +207,31 @@ void vii_state::video_start()
{
}
INLINE UINT8 expand_rgb5_to_rgb8(UINT8 val)
inline UINT8 vii_state::expand_rgb5_to_rgb8(UINT8 val)
{
UINT8 temp = val & 0x1f;
return (temp << 3) | (temp >> 2);
}
// Perform a lerp between a and b
INLINE UINT8 vii_mix_channel(vii_state *state, UINT8 a, UINT8 b)
inline UINT8 vii_state::vii_mix_channel(UINT8 a, UINT8 b)
{
UINT8 alpha = state->m_video_regs[0x1c] & 0x00ff;
UINT8 alpha = m_video_regs[0x1c] & 0x00ff;
return ((64 - alpha) * a + alpha * b) / 64;
}
static void vii_mix_pixel(vii_state *state, UINT32 offset, UINT16 rgb)
void vii_state::vii_mix_pixel(UINT32 offset, UINT16 rgb)
{
state->m_screen[offset].r = vii_mix_channel(state, state->m_screen[offset].r, expand_rgb5_to_rgb8(rgb >> 10));
state->m_screen[offset].g = vii_mix_channel(state, state->m_screen[offset].g, expand_rgb5_to_rgb8(rgb >> 5));
state->m_screen[offset].b = vii_mix_channel(state, state->m_screen[offset].b, expand_rgb5_to_rgb8(rgb));
m_screen[offset].r = vii_mix_channel(m_screen[offset].r, expand_rgb5_to_rgb8(rgb >> 10));
m_screen[offset].g = vii_mix_channel(m_screen[offset].g, expand_rgb5_to_rgb8(rgb >> 5));
m_screen[offset].b = vii_mix_channel(m_screen[offset].b, expand_rgb5_to_rgb8(rgb));
}
static void vii_set_pixel(vii_state *state, UINT32 offset, UINT16 rgb)
void vii_state::vii_set_pixel(UINT32 offset, UINT16 rgb)
{
state->m_screen[offset].r = expand_rgb5_to_rgb8(rgb >> 10);
state->m_screen[offset].g = expand_rgb5_to_rgb8(rgb >> 5);
state->m_screen[offset].b = expand_rgb5_to_rgb8(rgb);
m_screen[offset].r = expand_rgb5_to_rgb8(rgb >> 10);
m_screen[offset].g = expand_rgb5_to_rgb8(rgb >> 5);
m_screen[offset].b = expand_rgb5_to_rgb8(rgb);
}
void vii_state::vii_blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT32 xoff, UINT32 yoff, UINT32 attr, UINT32 ctrl, UINT32 bitmap_addr, UINT16 tile)
@ -286,11 +290,11 @@ void vii_state::vii_blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT32
{
if (attr & 0x4000)
{
vii_mix_pixel(this, xx + 320*yy, rgb);
vii_mix_pixel(xx + 320*yy, rgb);
}
else
{
vii_set_pixel(this, xx + 320*yy, rgb);
vii_set_pixel(xx + 320*yy, rgb);
}
}
}
@ -477,15 +481,15 @@ READ16_MEMBER( vii_state::vii_video_r )
switch(offset)
{
case 0x62: // Video IRQ Enable
verboselog(machine(), 0, "vii_video_r: Video IRQ Enable: %04x\n", VII_VIDEO_IRQ_ENABLE);
verboselog(0, "vii_video_r: Video IRQ Enable: %04x\n", VII_VIDEO_IRQ_ENABLE);
return VII_VIDEO_IRQ_ENABLE;
case 0x63: // Video IRQ Status
verboselog(machine(), 0, "vii_video_r: Video IRQ Status: %04x\n", VII_VIDEO_IRQ_STATUS);
verboselog(0, "vii_video_r: Video IRQ Status: %04x\n", VII_VIDEO_IRQ_STATUS);
return VII_VIDEO_IRQ_STATUS;
default:
verboselog(machine(), 0, "vii_video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]);
verboselog(0, "vii_video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]);
break;
}
return m_video_regs[offset];
@ -510,12 +514,12 @@ WRITE16_MEMBER( vii_state::vii_video_w )
COMBINE_DATA(&m_video_regs[offset]);
break;
case 0x62: // Video IRQ Enable
verboselog(machine(), 0, "vii_video_w: Video IRQ Enable = %04x (%04x)\n", data, mem_mask);
verboselog(0, "vii_video_w: Video IRQ Enable = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&VII_VIDEO_IRQ_ENABLE);
break;
case 0x63: // Video IRQ Acknowledge
verboselog(machine(), 0, "vii_video_w: Video IRQ Acknowledge = %04x (%04x)\n", data, mem_mask);
verboselog(0, "vii_video_w: Video IRQ Acknowledge = %04x (%04x)\n", data, mem_mask);
VII_VIDEO_IRQ_STATUS &= ~data;
if(!VII_VIDEO_IRQ_STATUS)
{
@ -524,22 +528,22 @@ WRITE16_MEMBER( vii_state::vii_video_w )
break;
case 0x70: // Video DMA Source
verboselog(machine(), 0, "vii_video_w: Video DMA Source = %04x (%04x)\n", data, mem_mask);
verboselog(0, "vii_video_w: Video DMA Source = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_video_regs[offset]);
break;
case 0x71: // Video DMA Dest
verboselog(machine(), 0, "vii_video_w: Video DMA Dest = %04x (%04x)\n", data, mem_mask);
verboselog(0, "vii_video_w: Video DMA Dest = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_video_regs[offset]);
break;
case 0x72: // Video DMA Length
verboselog(machine(), 0, "vii_video_w: Video DMA Length = %04x (%04x)\n", data, mem_mask);
verboselog(0, "vii_video_w: Video DMA Length = %04x (%04x)\n", data, mem_mask);
vii_do_dma(data);
break;
default:
verboselog(machine(), 0, "vii_video_w: Unknown register %04x = %04x (%04x)\n", 0x2800 + offset, data, mem_mask);
verboselog(0, "vii_video_w: Unknown register %04x = %04x (%04x)\n", 0x2800 + offset, data, mem_mask);
COMBINE_DATA(&m_video_regs[offset]);
break;
}
@ -550,7 +554,7 @@ READ16_MEMBER( vii_state::vii_audio_r )
switch(offset)
{
default:
verboselog(machine(), 4, "vii_audio_r: Unknown register %04x\n", 0x3000 + offset);
verboselog(4, "vii_audio_r: Unknown register %04x\n", 0x3000 + offset);
break;
}
return 0;
@ -561,7 +565,7 @@ WRITE16_MEMBER( vii_state::vii_audio_w )
switch(offset)
{
default:
verboselog(machine(), 4, "vii_audio_w: Unknown register %04x = %04x (%04x)\n", 0x3000 + offset, data, mem_mask);
verboselog(4, "vii_audio_w: Unknown register %04x = %04x (%04x)\n", 0x3000 + offset, data, mem_mask);
break;
}
}
@ -654,60 +658,60 @@ READ16_MEMBER( vii_state::vii_io_r )
{
case 0x01: case 0x06: case 0x0b: // GPIO Data Port A/B/C
vii_do_gpio(offset);
verboselog(machine(), 3, "vii_io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask);
verboselog(3, "vii_io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask);
val = m_io_regs[offset];
break;
case 0x02: case 0x03: case 0x04: case 0x05:
case 0x07: case 0x08: case 0x09: case 0x0a:
case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Other GPIO regs
verboselog(machine(), 3, "vii_io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask);
verboselog(3, "vii_io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask);
break;
case 0x1c: // Random
val = machine().rand() & 0x00ff;
verboselog(machine(), 3, "vii_io_r: Random = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: Random = %04x (%04x)\n", val, mem_mask);
break;
case 0x21: // IRQ Control
verboselog(machine(), 3, "vii_io_r: Controller IRQ Control = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: Controller IRQ Control = %04x (%04x)\n", val, mem_mask);
break;
case 0x22: // IRQ Status
verboselog(machine(), 3, "vii_io_r: Controller IRQ Status = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: Controller IRQ Status = %04x (%04x)\n", val, mem_mask);
break;
case 0x2c: case 0x2d: // Timers?
val = machine().rand() & 0x0000ffff;
verboselog(machine(), 3, "vii_io_r: Unknown Timer %d Register = %04x (%04x)\n", offset - 0x2c, val, mem_mask);
verboselog(3, "vii_io_r: Unknown Timer %d Register = %04x (%04x)\n", offset - 0x2c, val, mem_mask);
break;
case 0x2f: // Data Segment
val = machine().device("maincpu")->state().state_int(UNSP_SR) >> 10;
verboselog(machine(), 3, "vii_io_r: Data Segment = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: Data Segment = %04x (%04x)\n", val, mem_mask);
break;
case 0x31: // Unknown, UART Status?
verboselog(machine(), 3, "vii_io_r: Unknown (UART Status?) = %04x (%04x)\n", 3, mem_mask);
verboselog(3, "vii_io_r: Unknown (UART Status?) = %04x (%04x)\n", 3, mem_mask);
val = 3;
break;
case 0x36: // UART RX Data
val = m_controller_input[m_uart_rx_count];
m_uart_rx_count = (m_uart_rx_count + 1) % 8;
verboselog(machine(), 3, "vii_io_r: UART RX Data = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: UART RX Data = %04x (%04x)\n", val, mem_mask);
break;
case 0x59: // I2C Status
verboselog(machine(), 3, "vii_io_r: I2C Status = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: I2C Status = %04x (%04x)\n", val, mem_mask);
break;
case 0x5e: // I2C Data In
verboselog(machine(), 3, "vii_io_r: I2C Data In = %04x (%04x)\n", val, mem_mask);
verboselog(3, "vii_io_r: I2C Data In = %04x (%04x)\n", val, mem_mask);
break;
default:
verboselog(machine(), 3, "vii_io_r: Unknown register %04x\n", 0x3d00 + offset);
verboselog(3, "vii_io_r: Unknown register %04x\n", 0x3d00 + offset);
break;
}
@ -726,7 +730,7 @@ WRITE16_MEMBER( vii_state::vii_io_w )
switch(offset)
{
case 0x00: // GPIO special function select
verboselog(machine(), 3, "vii_io_w: GPIO Function Select = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: GPIO Function Select = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
@ -737,7 +741,7 @@ WRITE16_MEMBER( vii_state::vii_io_w )
case 0x02: case 0x03: case 0x04: case 0x05: // Port A
case 0x07: case 0x08: case 0x09: case 0x0a: // Port B
case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Port C
verboselog(machine(), 3, "vii_io_w: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data, mem_mask);
verboselog(3, "vii_io_w: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
vii_do_gpio(offset);
break;
@ -745,18 +749,18 @@ WRITE16_MEMBER( vii_state::vii_io_w )
case 0x10: // timebase control
if ((m_io_regs[offset] & 0x0003) != (data & 0x0003)) {
UINT16 hz = 8 << (data & 0x0003);
verboselog(machine(), 3, "*** TMB1 FREQ set to %dHz\n", hz);
verboselog(3, "*** TMB1 FREQ set to %dHz\n", hz);
m_tmb1->adjust(attotime::zero, 0, attotime::from_hz( hz ));
}
if ((m_io_regs[offset] & 0x000c) != (data & 0x000c)) {
UINT16 hz = 128 << ((data & 0x000c) >> 2);
verboselog(machine(), 3, "*** TMB2 FREQ set to %dHz\n", hz);
verboselog(3, "*** TMB2 FREQ set to %dHz\n", hz);
m_tmb2->adjust(attotime::zero, 0, attotime::from_hz( hz ));
}
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x21: // IRQ Enable
verboselog(machine(), 3, "vii_io_w: Controller IRQ Control = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: Controller IRQ Control = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&VII_CTLR_IRQ_ENABLE);
if(!VII_CTLR_IRQ_ENABLE)
{
@ -765,7 +769,7 @@ WRITE16_MEMBER( vii_state::vii_io_w )
break;
case 0x22: // IRQ Acknowledge
verboselog(machine(), 3, "vii_io_w: Controller IRQ Acknowledge = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: Controller IRQ Acknowledge = %04x (%04x)\n", data, mem_mask);
m_io_regs[0x22] &= ~data;
if(!m_io_regs[0x22])
{
@ -776,66 +780,66 @@ WRITE16_MEMBER( vii_state::vii_io_w )
case 0x2f: // Data Segment
temp = machine().device("maincpu")->state().state_int(UNSP_SR);
machine().device("maincpu")->state().set_state_int(UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10));
verboselog(machine(), 3, "vii_io_w: Data Segment = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: Data Segment = %04x (%04x)\n", data, mem_mask);
break;
case 0x31: // Unknown UART
verboselog(machine(), 3, "vii_io_w: Unknown UART = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: Unknown UART = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x32: // UART Reset
verboselog(machine(), 3, "vii_io_r: UART Reset\n");
verboselog(3, "vii_io_r: UART Reset\n");
break;
case 0x33: // UART Baud Rate
verboselog(machine(), 3, "vii_io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (m_io_regs[0x34] << 8) - data));
verboselog(3, "vii_io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (m_io_regs[0x34] << 8) - data));
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x35: // UART TX Data
verboselog(machine(), 3, "vii_io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (data << 8) - m_io_regs[0x33]));
verboselog(3, "vii_io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (data << 8) - m_io_regs[0x33]));
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5a: // I2C Access Mode
verboselog(machine(), 3, "vii_io_w: I2C Access Mode = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Access Mode = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5b: // I2C Device Address
verboselog(machine(), 3, "vii_io_w: I2C Device Address = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Device Address = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5c: // I2C Sub-Address
verboselog(machine(), 3, "vii_io_w: I2C Sub-Address = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Sub-Address = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5d: // I2C Data Out
verboselog(machine(), 3, "vii_io_w: I2C Data Out = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Data Out = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5e: // I2C Data In
verboselog(machine(), 3, "vii_io_w: I2C Data In = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Data In = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x5f: // I2C Controller Mode
verboselog(machine(), 3, "vii_io_w: I2C Controller Mode = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Controller Mode = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
case 0x58: // I2C Command
verboselog(machine(), 3, "vii_io_w: I2C Command = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Command = %04x (%04x)\n", data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
vii_do_i2c();
break;
case 0x59: // I2C Status / IRQ Acknowledge(?)
verboselog(machine(), 3, "vii_io_w: I2C Status / Ack = %04x (%04x)\n", data, mem_mask);
verboselog(3, "vii_io_w: I2C Status / Ack = %04x (%04x)\n", data, mem_mask);
m_io_regs[offset] &= ~data;
break;
@ -850,7 +854,7 @@ WRITE16_MEMBER( vii_state::vii_io_w )
break;
default:
verboselog(machine(), 3, "vii_io_w: Unknown register %04x = %04x (%04x)\n", 0x3d00 + offset, data, mem_mask);
verboselog(3, "vii_io_w: Unknown register %04x = %04x (%04x)\n", 0x3d00 + offset, data, mem_mask);
COMBINE_DATA(&m_io_regs[offset]);
break;
}
@ -862,7 +866,7 @@ WRITE16_MEMBER( vii_state::vii_rowscroll_w )
switch(offset)
{
default:
verboselog(machine(), 0, "vii_rowscroll_w: %04x = %04x (%04x)\n", 0x2900 + offset, data, mem_mask);
verboselog(0, "vii_rowscroll_w: %04x = %04x (%04x)\n", 0x2900 + offset, data, mem_mask);
break;
}
}
@ -872,7 +876,7 @@ WRITE16_MEMBER( vii_state::vii_spriteram_w )
switch(offset)
{
default:
verboselog(machine(), 0, "vii_spriteram_w: %04x = %04x (%04x)\n", 0x2c00 + offset, data, mem_mask);
verboselog(0, "vii_spriteram_w: %04x = %04x (%04x)\n", 0x2c00 + offset, data, mem_mask);
break;
}
}
@ -1054,17 +1058,17 @@ INTERRUPT_GEN_MEMBER(vii_state::vii_vblank)
VII_VIDEO_IRQ_STATUS = VII_VIDEO_IRQ_ENABLE & 1;
if(VII_VIDEO_IRQ_STATUS)
{
verboselog(machine(), 0, "Video IRQ\n");
verboselog(0, "Video IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ0_LINE, ASSERT_LINE);
}
// {
// verboselog(machine(), 0, "audio 1 IRQ\n");
// verboselog(0, "audio 1 IRQ\n");
// machine().device("maincpu")->execute().set_input_line(UNSP_IRQ1_LINE, ASSERT_LINE);
// }
if(m_io_regs[0x22] & m_io_regs[0x21] & 0x0c00)
{
verboselog(machine(), 0, "timerA, timer B IRQ\n");
verboselog(0, "timerA, timer B IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ2_LINE, ASSERT_LINE);
}
@ -1072,27 +1076,27 @@ INTERRUPT_GEN_MEMBER(vii_state::vii_vblank)
// For now trigger always if any enabled
if(VII_CTLR_IRQ_ENABLE)
{
verboselog(machine(), 0, "UART, ADC IRQ\n");
verboselog(0, "UART, ADC IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ3_LINE, ASSERT_LINE);
}
// {
// verboselog(machine(), 0, "audio 4 IRQ\n");
// verboselog(0, "audio 4 IRQ\n");
// machine().device("maincpu")->execute().set_input_line(UNSP_IRQ4_LINE, ASSERT_LINE);
// }
if(m_io_regs[0x22] & m_io_regs[0x21] & 0x1200)
{
verboselog(machine(), 0, "External IRQ\n");
verboselog(0, "External IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ5_LINE, ASSERT_LINE);
}
if(m_io_regs[0x22] & m_io_regs[0x21] & 0x0070)
{
verboselog(machine(), 0, "1024Hz, 2048HZ, 4096HZ IRQ\n");
verboselog(0, "1024Hz, 2048HZ, 4096HZ IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ6_LINE, ASSERT_LINE);
}
if(m_io_regs[0x22] & m_io_regs[0x21] & 0x008b)
{
verboselog(machine(), 0, "TMB1, TMB2, 4Hz, key change IRQ\n");
verboselog(0, "TMB1, TMB2, 4Hz, key change IRQ\n");
machine().device("maincpu")->execute().set_input_line(UNSP_IRQ7_LINE, ASSERT_LINE);
}

34
src/mess/drivers/vk100.c
View File

@ -204,6 +204,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(i8251_rxrdy_int);
DECLARE_WRITE_LINE_MEMBER(i8251_txrdy_int);
DECLARE_WRITE_LINE_MEMBER(i8251_rts);
UINT8 vram_read();
void vram_write(UINT8 data);
};
// vram access functions:
@ -228,43 +230,41 @@ public:
*/
// returns one nybble from vram array based on X and Y regs
static UINT8 vram_read(running_machine &machine)
UINT8 vk100_state::vram_read()
{
vk100_state *state = machine.driver_data<vk100_state>();
// XFinal is (X'&0x3FC)|(X&0x3)
UINT16 XFinal = state->m_trans[(state->m_vgX&0x3FC)>>2]<<2|(state->m_vgX&0x3); // appears correct
UINT16 XFinal = m_trans[(m_vgX&0x3FC)>>2]<<2|(m_vgX&0x3); // appears correct
// EA is the effective ram address for a 16-bit block
UINT16 EA = ((state->m_vgY&0x1FE)<<5)|(XFinal>>4); // appears correct
UINT16 EA = ((m_vgY&0x1FE)<<5)|(XFinal>>4); // appears correct
// block is the 16 bit block directly (note EA has to be <<1 to correctly index a byte)
UINT16 block = state->m_vram[(EA<<1)+1] | (state->m_vram[(EA<<1)]<<8);
UINT16 block = m_vram[(EA<<1)+1] | (m_vram[(EA<<1)]<<8);
// nybbleNum is which of the four nybbles within the block to address. should NEVER be 3!
UINT8 nybbleNum = (XFinal&0xC)>>2;
return (block>>(4*nybbleNum))&0xF;
}
static void vram_write(running_machine &machine, UINT8 data)
void vk100_state::vram_write(UINT8 data)
{
vk100_state *state = machine.driver_data<vk100_state>();
// XFinal is (X'&0x3FC)|(X&0x3)
UINT16 XFinal = state->m_trans[(state->m_vgX&0x3FC)>>2]<<2|(state->m_vgX&0x3); // appears correct
UINT16 XFinal = m_trans[(m_vgX&0x3FC)>>2]<<2|(m_vgX&0x3); // appears correct
// EA is the effective ram address for a 16-bit block
UINT16 EA = ((state->m_vgY&0x1FE)<<5)|(XFinal>>4); // appears correct
UINT16 EA = ((m_vgY&0x1FE)<<5)|(XFinal>>4); // appears correct
// block is the 16 bit block directly (note EA has to be <<1 to correctly index a byte)
UINT16 block = state->m_vram[(EA<<1)+1] | (state->m_vram[(EA<<1)]<<8);
UINT16 block = m_vram[(EA<<1)+1] | (m_vram[(EA<<1)]<<8);
// nybbleNum is which of the four nybbles within the block to address. should NEVER be 3!
UINT8 nybbleNum = (XFinal&0xC)>>2;
block &= ~((UINT16)0xF<<(nybbleNum*4)); // mask out the part we want to replace
block |= data<<(nybbleNum*4); // write the new part
// NOTE: this next part may have to be made conditional on VG_MODE
// check if the attribute nybble is supposed to be modified, and if so do so
if (state->VG_WOPS&0x08) block = (block&0x0FFF)|(((UINT16)state->VG_WOPS&0xF0)<<8);
state->m_vram[(EA<<1)+1] = block&0xFF; // write block back to vram
state->m_vram[(EA<<1)] = (block&0xFF00)>>8; // ''
if (VG_WOPS&0x08) block = (block&0x0FFF)|(((UINT16)VG_WOPS&0xF0)<<8);
m_vram[(EA<<1)+1] = block&0xFF; // write block back to vram
m_vram[(EA<<1)] = (block&0xFF00)>>8; // ''
}
TIMER_CALLBACK_MEMBER(vk100_state::execute_vg)
{
UINT8 thisNyb = vram_read(machine()); // read in the nybble
UINT8 thisNyb = vram_read(); // read in the nybble
// pattern rom addressing is a complex mess. see the pattern rom def later in this file.
UINT8 newNyb = m_pattern[((m_vgPAT&m_vgPAT_Mask)?0x200:0)|((VG_WOPS&7)<<6)|((m_vgX&3)<<4)|thisNyb]; // calculate new nybble based on pattern rom
// finally write the block back to ram depending on the VG_MODE (sort of a hack until we get the vector and synd and dir roms all hooked up)
@ -275,11 +275,11 @@ TIMER_CALLBACK_MEMBER(vk100_state::execute_vg)
case 1: // dot: only write the LAST pixel in the chain? TODO: some fallthrough magic here?
if ((m_vgDownCount) == 0x00)
{
vram_write(machine(), newNyb); // write out the modified nybble
vram_write(newNyb); // write out the modified nybble
}
break;
case 2: // vec: draw the vector
vram_write(machine(), newNyb); // write out the modified nybble
vram_write(newNyb); // write out the modified nybble
break;
case 3: // er: erase: special case here: wipe the entire screen (except for color/attrib?) and then set done.
for (int i = 0; i < 0x8000; i++)
@ -576,7 +576,7 @@ READ8_MEMBER(vk100_state::SYSTAT_A)
#ifdef SYSTAT_A_VERBOSE
if (m_maincpu->pc() != 0x31D) logerror("0x%04X: SYSTAT_A Read!\n", m_maincpu->pc());
#endif
return ((m_vgGO?0:1)<<7)|(vram_read(machine())<<3)|(((m_dipsw->read()>>dipswitchLUT[offset])&1)?0x4:0)|(m_vsync?0x2:0);
return ((m_vgGO?0:1)<<7)|(vram_read()<<3)|(((m_dipsw->read()>>dipswitchLUT[offset])&1)?0x4:0)|(m_vsync?0x2:0);
}
/* port 0x48: "SYSTAT B"; NOT documented in the tech manual at all.

3
src/mess/drivers/vt100.c
View File

@ -63,6 +63,7 @@ public:
INTERRUPT_GEN_MEMBER(vt100_vertical_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(keyboard_callback);
IRQ_CALLBACK_MEMBER(vt100_irq_callback);
UINT8 bit_sel(UINT8 data);
};
@ -107,7 +108,7 @@ READ8_MEMBER( vt100_state::vt100_flags_r )
return ret;
}
static UINT8 bit_sel(UINT8 data)
UINT8 vt100_state::bit_sel(UINT8 data)
{
if (!BIT(data,7)) return 0x70;
if (!BIT(data,6)) return 0x60;

40
src/mess/drivers/vtech1.c
View File

@ -199,6 +199,8 @@ public:
DECLARE_READ8_MEMBER(vtech1_printer_r);
DECLARE_WRITE8_MEMBER(vtech1_strobe_w);
DECLARE_READ8_MEMBER(vtech1_mc6847_videoram_r);
void vtech1_get_track();
void vtech1_put_track();
};
@ -283,41 +285,39 @@ static void vtech1_load_proc(device_image_interface &image)
vtech1->m_fdc_wrprot[id] = 0x80;
}
static void vtech1_get_track(running_machine &machine)
void vtech1_state::vtech1_get_track()
{
vtech1_state *vtech1 = machine.driver_data<vtech1_state>();
device_image_interface *image = dynamic_cast<device_image_interface *>(floppy_get_device(machine,vtech1->m_drive));
device_image_interface *image = dynamic_cast<device_image_interface *>(floppy_get_device(machine(),m_drive));
/* drive selected or and image file ok? */
if (vtech1->m_drive >= 0 && image->exists())
if (m_drive >= 0 && image->exists())
{
int size, offs;
size = TRKSIZE_VZ;
offs = TRKSIZE_VZ * vtech1->m_fdc_track_x2[vtech1->m_drive]/2;
offs = TRKSIZE_VZ * m_fdc_track_x2[m_drive]/2;
image->fseek(offs, SEEK_SET);
size = image->fread(vtech1->m_fdc_data, size);
size = image->fread(m_fdc_data, size);
if (LOG_VTECH1_FDC)
logerror("get track @$%05x $%04x bytes\n", offs, size);
}
vtech1->m_fdc_offs = 0;
vtech1->m_fdc_write = 0;
m_fdc_offs = 0;
m_fdc_write = 0;
}
static void vtech1_put_track(running_machine &machine)
void vtech1_state::vtech1_put_track()
{
vtech1_state *vtech1 = machine.driver_data<vtech1_state>();
/* drive selected and image file ok? */
if (vtech1->m_drive >= 0 && floppy_get_device(machine,vtech1->m_drive) != NULL)
if (m_drive >= 0 && floppy_get_device(machine(),m_drive) != NULL)
{
int size, offs;
device_image_interface *image = dynamic_cast<device_image_interface *>(floppy_get_device(machine,vtech1->m_drive));
offs = TRKSIZE_VZ * vtech1->m_fdc_track_x2[vtech1->m_drive]/2;
image->fseek(offs + vtech1->m_fdc_start, SEEK_SET);
size = image->fwrite(&vtech1->m_fdc_data[vtech1->m_fdc_start], vtech1->m_fdc_write);
device_image_interface *image = dynamic_cast<device_image_interface *>(floppy_get_device(machine(),m_drive));
offs = TRKSIZE_VZ * m_fdc_track_x2[m_drive]/2;
image->fseek(offs + m_fdc_start, SEEK_SET);
size = image->fwrite(&m_fdc_data[m_fdc_start], m_fdc_write);
if (LOG_VTECH1_FDC)
logerror("put track @$%05X+$%X $%04X/$%04X bytes\n", offs, vtech1->m_fdc_start, size, vtech1->m_fdc_write);
logerror("put track @$%05X+$%X $%04X/$%04X bytes\n", offs, m_fdc_start, size, m_fdc_write);
}
}
@ -380,7 +380,7 @@ WRITE8_MEMBER(vtech1_state::vtech1_fdc_w)
{
m_drive = drive;
if (m_drive >= 0)
vtech1_get_track(machine());
vtech1_get_track();
}
if (m_drive >= 0)
{
@ -394,7 +394,7 @@ WRITE8_MEMBER(vtech1_state::vtech1_fdc_w)
if (LOG_VTECH1_FDC)
logerror("vtech1_fdc_w(%d) $%02X drive %d: stepout track #%2d.%d\n", offset, data, m_drive, m_fdc_track_x2[m_drive]/2,5*(m_fdc_track_x2[m_drive]&1));
if ((m_fdc_track_x2[m_drive] & 1) == 0)
vtech1_get_track(machine());
vtech1_get_track();
}
else
if ((PHI0(data) && !(PHI1(data) || PHI2(data) || PHI3(data)) && PHI3(m_fdc_latch)) ||
@ -407,7 +407,7 @@ WRITE8_MEMBER(vtech1_state::vtech1_fdc_w)
if (LOG_VTECH1_FDC)
logerror("vtech1_fdc_w(%d) $%02X drive %d: stepin track #%2d.%d\n", offset, data, m_drive, m_fdc_track_x2[m_drive]/2,5*(m_fdc_track_x2[m_drive]&1));
if ((m_fdc_track_x2[m_drive] & 1) == 0)
vtech1_get_track(machine());
vtech1_get_track();
}
if ((data & 0x40) == 0)
{
@ -452,7 +452,7 @@ WRITE8_MEMBER(vtech1_state::vtech1_fdc_w)
{
/* data written to track before? */
if (m_fdc_write)
vtech1_put_track(machine());
vtech1_put_track();
}
m_fdc_bits = 8;
m_fdc_write = 0;