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https://github.com/holub/mame
synced 2025-06-03 19:36:26 +03:00
cpu/xa: CPU core work for fearless/superkds - adds sound, promotes to working (#12617)
* This adds basic execution to XA core. It emulates enough of the XA to give fearless and superkds working sound. * only the exact forms of the opcodes used so far have been implemented * no optimizations have been done, use of const, inline use, templates etc. are planned for a future update; code is still primed for debugging and development * overall structure, code style are not 100% final (see above) and will be adjusted as the CPU is better understood * peripherals, interrupts etc. are not yet fully implemented, nor is anything outside of the page zero mode used here due to lack of test cases Machines Promoted to WORKING ---------------------------------- Super Kids (S019CN) [David Haywood, XingXing] Fearless Pinocchio (V101US) [David Haywood, XingXing, Peter Wilhelmsen, rtw] --------- Co-authored-by: David Haywood <hazemamewip@hotmail.com>
This commit is contained in:
mamehaze
GitHub
parent
5b75406475
commit
a1b2974ec9
@ -1209,6 +1209,7 @@ end
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if CPUS["XA"] then
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files {
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MAME_DIR .. "src/devices/cpu/xa/xa.cpp",
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MAME_DIR .. "src/devices/cpu/xa/xa_ops.cpp",
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MAME_DIR .. "src/devices/cpu/xa/xa.h",
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}
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end
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File diff suppressed because it is too large
Load Diff
@ -6,13 +6,54 @@
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#pragma once
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class xa_cpu_device : public cpu_device
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enum {
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XA_EXT_IRQ0,
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XA_EXT_IRQ1,
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XA_EXT_IRQ2,
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XA_EXT_IRQ3,
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};
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enum {
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XA_BANK0_R0,
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XA_BANK0_R1,
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XA_BANK0_R2,
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XA_BANK0_R3,
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XA_BANK1_R0,
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XA_BANK1_R1,
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XA_BANK1_R2,
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XA_BANK1_R3,
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XA_BANK2_R0,
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XA_BANK2_R1,
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XA_BANK2_R2,
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XA_BANK2_R3,
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XA_BANK3_R0,
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XA_BANK3_R1,
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XA_BANK3_R2,
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XA_BANK3_R3,
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XA_R4,
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XA_R5,
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XA_R6,
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XA_R7,
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XA_USP,
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XA_SSP,
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};
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class xa_cpu : public cpu_device
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{
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public:
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xa_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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xa_cpu(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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template <unsigned N> auto port_in_cb() { return m_port_in_cb[N].bind(); }
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template <unsigned N> auto port_out_cb() { return m_port_out_cb[N].bind(); }
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protected:
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xa_cpu_device(const machine_config& mconfig, device_type type, const char* tag, device_t* owner, uint32_t clock, address_map_constructor prg_map);
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xa_cpu(const machine_config& mconfig, device_type type, const char* tag, device_t* owner, uint32_t clock, address_map_constructor prg_map, address_map_constructor dat_map);
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virtual void device_start() override;
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virtual void device_reset() override;
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@ -21,6 +62,7 @@ protected:
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virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
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virtual uint32_t execute_input_lines() const noexcept override { return 0; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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virtual space_config_vector memory_space_config() const override;
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@ -28,26 +70,900 @@ protected:
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private:
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void internal_map(address_map &map);
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void internal_data_map(address_map &map);
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void data_map(address_map &map);
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void sfr_map(address_map &map);
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address_space_config m_program_config;
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address_space_config m_data_config;
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address_space_config m_sfr_config;
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struct mem_info {
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int addr;
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const char *name;
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};
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static const mem_info default_names[];
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void add_names(const mem_info *info);
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std::string get_data_address(u16 arg) const;
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typedef void (xa_cpu::*op_func) (u8 op);
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static const op_func s_instruction[256];
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const char* m_regnames16[16] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal" };
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const char* m_regnames8[16] = { "R0L", "R0H", "R1L", "R1H", "R2L", "R2H", "R3L", "R3H", "R4L", "R4H", "R5L", "R5H", "R6L", "R6H", "R7L", "R7H"};
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std::string get_bittext(int bit);
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std::string get_directtext(int bit);
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std::string show_expanded_data4(u16 data4, int size);
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std::string get_word_reglist(u8 op2);
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std::string get_byte_reglist(u8 op2, int h);
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void check_external_irq_level(int level);
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void check_interrupts();
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u16 expand_rel16(u16 rel16);
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u16 expand_rel8(u8 rel8);
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void cy(u8 cycles)
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{
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m_icount -= cycles;
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}
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void do_nz_flags_16(u16 data);
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void do_nz_flags_8(u8 data);
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u8 get_n_flag() { return m_nflag; }
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void set_n_flag() { m_nflag = 1; }
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void clear_n_flag() { m_nflag = 0; }
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u8 get_z_flag() { return m_zflag; }
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void set_z_flag() { m_zflag = 1; }
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void clear_z_flag() { m_zflag = 0; }
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u8 get_c_flag() { return m_cflag; }
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void set_c_flag() { m_cflag = 1; }
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void clear_c_flag() { m_cflag = 0; }
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u8 get_v_flag() { return m_vflag; }
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void set_v_flag() { m_vflag = 1; }
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void clear_v_flag() { m_vflag = 0; }
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u8 get_ac_flag() { return m_acflag; }
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void set_ac_flag() { m_acflag = 1; }
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void clear_ac_flag() { m_acflag = 0; }
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u8 gr8(int reg);
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void sr8(int reg, u8 data);
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u16 gr16(int reg);
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void sr16(int reg, u16 data);
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u32 gr32(int reg);
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void sr32(int reg, u32 data);
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void set_pc_in_current_page(u16 addr);
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void push_word_reglist(u8 op2, int h, bool force_user);
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void pull_word_reglist(u8 op2, int h, bool force_user);
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void push_byte_reglist(u8 op2, int h, bool force_user);
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void pull_byte_reglist(u8 op2, int h, bool force_user);
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void push_word_to_user_stack(u16 data);
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void push_word_to_system_stack(u16 data);
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void push_word_to_stack(u16 data);
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u16 pull_word_from_user_stack();
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u16 pull_word_from_system_stack();
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u16 pull_word_from_stack();
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void push_byte_to_user_stack(u8 data);
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void push_byte_to_system_stack(u8 data);
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void push_byte_to_stack(u16 data);
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u8 pull_byte_from_user_stack();
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u8 pull_byte_from_system_stack();
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u8 pull_byte_from_stack();
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void wdat8(int address, u8 data);
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void wdat16(int address, u16 data);
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u8 rdat8(int address);
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u16 rdat16(int address);
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u8 sfr_WDCON_r();
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u8 sfr_PSWL_r();
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void sfr_PSWL_w(u8 data);
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u8 sfr_PSWH_r();
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void sfr_PSWH_w(u8 data);
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void sfr_PSW51_w(u8 data);
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void sfr_SCR_w(u8 data);
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void sfr_WFEED1_w(u8 data);
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void sfr_WFEED2_w(u8 data);
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u8 sfr_IEL_r();
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void sfr_IEL_w(u8 data);
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u8 sfr_port_r(offs_t offset);
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void sfr_port_w(offs_t offset, u8 data);
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u8 sfr_PxCFGA_r(offs_t offset);
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void sfr_PxCFGA_w(offs_t offset, u8 data);
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u8 sfr_PxCFGB_r(offs_t offset);
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void sfr_PxCFGB_w(offs_t offset, u8 data);
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void set_bit_8_helper(u16 bit, u8 val);
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u32 asl32_helper(u32 fullreg, u8 amount);
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u32 lsr32_helper(u32 fullreg, u8 amount);
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u16 lsr16_helper(u16 fullreg, u8 amount);
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u8 read_direct8(u16 addr);
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u16 read_direct16(u16 addr);
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void write_direct8(u16 addr, u8 data);
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void write_direct16(u16 addr, u16 data);
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u16 do_subb_16(u16 val1, u16 val2);
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u16 do_sub_16(u16 val1, u16 val2);
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u16 do_sub_16_helper(u16 val1, u16 val2, u8 c);
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u16 do_addc_16(u16 val1, u16 val2);
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u16 do_add_16(u16 val1, u16 val2);
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u16 do_add_16_helper(u16 val1, u16 val2, u8 c);
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u16 do_xor_16(u16 val1, u16 val2);
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u16 do_or_16(u16 val1, u16 val2);
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u16 do_and_16(u16 val1, u16 val2);
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u8 do_sub_8(u8 val1, u8 val2);
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u8 do_subb_8(u8 val1, u8 val2);
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u8 do_sub_8_helper(u8 val1, u8 val2, u8 c);
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u8 do_add_8(u8 val1, u8 val2);
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u8 do_addc_8(u8 val1, u8 val2);
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u8 do_add_8_helper(u8 val1, u8 val2, u8 c);
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u8 do_xor_8(u8 val1, u8 val2);
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u8 do_or_8(u8 val1, u8 val2);
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u8 do_and_8(u8 val1, u8 val2);
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u8 do_cjne_8_helper(u8 val1, u8 val2);
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void handle_alu_type0(u8 op, int alu_op);
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void handle_alu_type1(u8 op, u8 op2);
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void handle_push_rlist(u8 op);
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void handle_pushu_rlist(u8 op);
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void handle_pop_rlist(u8 op);
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void handle_popu_rlist(u8 op);
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void handle_adds_movs(u8 op, int which);
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void handle_shift(u8 op, int shift_type);
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void e_illegal(u8 op);
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void e_nop(u8 op);
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void e_bitgroup(u8 op);
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void e_add(u8 op);
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void e_push_rlist(u8 op);
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void e_addc(u8 op);
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void e_pushu_rlist(u8 op);
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void e_sub(u8 op);
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void e_pop_rlist(u8 op);
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void e_subb(u8 op);
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void e_popu_rlist(u8 op);
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void e_lea_offset8(u8 op);
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void e_lea_offset16(u8 op);
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void e_cmp(u8 op);
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void e_xch_type1(u8 op);
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void e_and(u8 op);
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void e_xch_type2(u8 op);
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void e_or(u8 op);
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void e_xor(u8 op);
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void e_movc_rd_rsinc(u8 op);
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void e_mov(u8 op);
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void e_pushpop_djnz_subgroup(u8 op);
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void e_g9_subgroup(u8 op);
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void e_alu(u8 op);
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void e_jb_mov_subgroup(u8 op);
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void e_movdir(u8 op);
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void e_adds(u8 op);
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void e_movx_subgroup(u8 op);
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void e_rr(u8 op);
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void e_movs(u8 op);
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void e_rrc(u8 op);
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void e_lsr_fc(u8 op);
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void e_asl_c(u8 op);
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void e_asr_c(u8 op);
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void e_norm(u8 op);
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void e_lsr_fj(u8 op);
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void e_asl_j(u8 op);
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void e_asr_j(u8 op);
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void e_rl(u8 op);
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void e_rlc(u8 op);
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void e_djnz_cjne(u8 op);
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void e_mulu_b(u8 op);
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void e_divu_b(u8 op);
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void e_mulu_w(u8 op);
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void e_divu_w(u8 op);
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void e_mul_w(u8 op);
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void e_div_w(u8 op);
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void e_div_data8(u8 op);
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void e_div_d16(u8 op);
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void e_divu_d(u8 op);
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void e_div_d(u8 op);
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void e_cjne_d8(u8 op);
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void e_cjne_d16(u8 op);
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void e_jz_rel8(u8 op);
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void e_jnz_rel8(u8 op);
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void e_branch(u8 op);
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void e_bkpt(u8 op);
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void do_nop();
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void add_byte_rd_data8(u8 rd, u8 data8);
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void addc_byte_rd_data8(u8 rd, u8 data8);
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void sub_byte_rd_data8(u8 rd, u8 data8);
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void subb_byte_rd_data8(u8 rd, u8 data8);
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void cmp_byte_rd_data8(u8 rd, u8 data8);
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void and_byte_rd_data8(u8 rd, u8 data8);
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void or_byte_rd_data8(u8 rd, u8 data8);
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void xor_byte_rd_data8(u8 rd, u8 data8);
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void mov_byte_rd_data8(u8 rd, u8 data8);
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void add_byte_indrd_data8(u8 rd, u8 data8);
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void addc_byte_indrd_data8(u8 rd, u8 data8);
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void sub_byte_indrd_data8(u8 rd, u8 data8);
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void subb_byte_indrd_data8(u8 rd, u8 data8);
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void cmp_byte_indrd_data8(u8 rd, u8 data8);
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void and_byte_indrd_data8(u8 rd, u8 data8);
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void or_byte_indrd_data8(u8 rd, u8 data8);
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void xor_byte_indrd_data8(u8 rd, u8 data8);
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void mov_byte_indrd_data8(u8 rd, u8 data8);
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void add_byte_indrdinc_data8(u8 rd, u8 data8);
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void addc_byte_indrdinc_data8(u8 rd, u8 data8);
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void sub_byte_indrdinc_data8(u8 rd, u8 data8);
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void subb_byte_indrdinc_data8(u8 rd, u8 data8);
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void cmp_byte_indrdinc_data8(u8 rd, u8 data8);
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void and_byte_indrdinc_data8(u8 rd, u8 data8);
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void or_byte_indrdinc_data8(u8 rd, u8 data8);
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void xor_byte_indrdinc_data8(u8 rd, u8 data8);
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void mov_byte_indrdinc_data8(u8 rd, u8 data8);
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void add_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void addc_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void sub_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void subb_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void cmp_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void and_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void or_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void xor_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void mov_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
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void add_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void addc_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void sub_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void subb_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void cmp_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void and_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void or_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void xor_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void mov_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
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void add_byte_direct_data8(u16 direct, u8 data8);
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void addc_byte_direct_data8(u16 direct, u8 data8);
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void sub_byte_direct_data8(u16 direct, u8 data8);
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void subb_byte_direct_data8(u16 direct, u8 data8);
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void cmp_byte_direct_data8(u16 direct, u8 data8);
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void and_byte_direct_data8(u16 direct, u8 data8);
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void or_byte_direct_data8(u16 direct, u8 data8);
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void xor_byte_direct_data8(u16 direct, u8 data8);
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void mov_byte_direct_data8(u16 direct, u8 data8);
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void add_word_rd_data16(u8 rd, u16 data16);
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void addc_word_rd_data16(u8 rd, u16 data16);
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void sub_word_rd_data16(u8 rd, u16 data16);
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void subb_word_rd_data16(u8 rd, u16 data16);
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void cmp_word_rd_data16(u8 rd, u16 data16);
|
||||
void and_word_rd_data16(u8 rd, u16 data16);
|
||||
void or_word_rd_data16(u8 rd, u16 data16);
|
||||
void xor_word_rd_data16(u8 rd, u16 data16);
|
||||
void mov_word_rd_data16(u8 rd, u16 data16);
|
||||
|
||||
void add_word_indrd_data16(u8 rd, u16 data16);
|
||||
void addc_word_indrd_data16(u8 rd, u16 data16);
|
||||
void sub_word_indrd_data16(u8 rd, u16 data16);
|
||||
void subb_word_indrd_data16(u8 rd, u16 data16);
|
||||
void cmp_word_indrd_data16(u8 rd, u16 data16);
|
||||
void and_word_indrd_data16(u8 rd, u16 data16);
|
||||
void or_word_indrd_data16(u8 rd, u16 data16);
|
||||
void xor_word_indrd_data16(u8 rd, u16 data16);
|
||||
void mov_word_indrd_data16(u8 rd, u16 data16);
|
||||
|
||||
void add_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void addc_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void sub_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void subb_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void cmp_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void and_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void or_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void xor_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
void mov_word_indrdinc_data16(u8 rd, u16 data16);
|
||||
|
||||
void add_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void addc_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void sub_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void subb_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void cmp_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void and_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void or_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void xor_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
void mov_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
|
||||
|
||||
void add_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void addc_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void sub_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void subb_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void cmp_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void and_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void or_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void xor_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
void mov_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
|
||||
|
||||
void add_word_direct_data16(u16 direct, u16 data16);
|
||||
void addc_word_direct_data16(u16 direct, u16 data16);
|
||||
void sub_word_direct_data16(u16 direct, u16 data16);
|
||||
void subb_word_direct_data16(u16 direct, u16 data16);
|
||||
void cmp_word_direct_data16(u16 direct, u16 data16);
|
||||
void and_word_direct_data16(u16 direct, u16 data16);
|
||||
void or_word_direct_data16(u16 direct, u16 data16);
|
||||
void xor_word_direct_data16(u16 direct, u16 data16);
|
||||
void mov_word_direct_data16(u16 direct, u16 data16);
|
||||
|
||||
void aluop_word_rd_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_byte_rd_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_word_rd_indrs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_byte_rd_indrs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_word_indrd_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_byte_indrd_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_word_rd_indrsinc(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_byte_rd_indrsinc(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_word_indrdinc_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_byte_indrdinc_rs(int alu_op, u8 rd, u8 rs);
|
||||
void aluop_word_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8);
|
||||
void aluop_byte_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8);
|
||||
void aluop_word_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs);
|
||||
void aluop_byte_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs);
|
||||
void aluop_word_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16);
|
||||
void aluop_byte_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16);
|
||||
void aluop_word_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs);
|
||||
void aluop_byte_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs);
|
||||
void aluop_word_rd_direct(int alu_op, u8 rd, u16 direct);
|
||||
void aluop_byte_rd_direct(int alu_op, u8 rd, u16 direct);
|
||||
void aluop_word_direct_rs(int alu_op, u16 direct, u8 rs);
|
||||
void aluop_byte_direct_rs(int alu_op, u16 direct, u8 rs);
|
||||
|
||||
void aluop_byte_rd_data8(int alu_op, u8 rd, u8 data8);
|
||||
void aluop_byte_indrd_data8(int alu_op, u8 rd, u8 data8);
|
||||
void aluop_byte_indrdinc_data8(int alu_op, u8 rd, u8 data8);
|
||||
void aluop_byte_rdoff8_data8(int alu_op, u8 rd, u8 offset8, u8 data8);
|
||||
void aluop_byte_rdoff16_data8(int alu_op, u8 rd, u16 offset16, u8 data8);
|
||||
void aluop_byte_direct_data8(int alu_op, u16 direct, u8 data8);
|
||||
void aluop_byte_rd_data16(int alu_op, u8 rd, u16 data16);
|
||||
void aluop_byte_indrd_data16(int alu_op, u8 rd, u16 data16);
|
||||
void aluop_byte_indrdinc_data16(int alu_op, u8 rd, u16 data16);
|
||||
void aluop_byte_rdoff8_data16(int alu_op, u8 rd, u8 offset8, u16 data16);
|
||||
void aluop_byte_rdoff16_data16(int alu_op, u8 rd, u16 offset16, u16 data16);
|
||||
void aluop_byte_direct_data16(int alu_op, u16 direct, u16 data16);
|
||||
|
||||
void add_word_rd_rs(u8 rd, u8 rs);
|
||||
void addc_word_rd_rs(u8 rd, u8 rs);
|
||||
void sub_word_rd_rs(u8 rd, u8 rs);
|
||||
void subb_word_rd_rs(u8 rd, u8 rs);
|
||||
void cmp_word_rd_rs(u8 rd, u8 rs);
|
||||
void and_word_rd_rs(u8 rd, u8 rs);
|
||||
void or_word_rd_rs(u8 rd, u8 rs);
|
||||
void xor_word_rd_rs(u8 rd, u8 rs);
|
||||
void mov_word_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_byte_rd_rs(u8 rd, u8 rs);
|
||||
void addc_byte_rd_rs(u8 rd, u8 rs);
|
||||
void sub_byte_rd_rs(u8 rd, u8 rs);
|
||||
void subb_byte_rd_rs(u8 rd, u8 rs);
|
||||
void cmp_byte_rd_rs(u8 rd, u8 rs);
|
||||
void and_byte_rd_rs(u8 rd, u8 rs);
|
||||
void or_byte_rd_rs(u8 rd, u8 rs);
|
||||
void xor_byte_rd_rs(u8 rd, u8 rs);
|
||||
void mov_byte_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_word_rd_indrs(u8 rd, u8 rs);
|
||||
void addc_word_rd_indrs(u8 rd, u8 rs);
|
||||
void sub_word_rd_indrs(u8 rd, u8 rs);
|
||||
void subb_word_rd_indrs(u8 rd, u8 rs);
|
||||
void cmp_word_rd_indrs(u8 rd, u8 rs);
|
||||
void and_word_rd_indrs(u8 rd, u8 rs);
|
||||
void or_word_rd_indrs(u8 rd, u8 rs);
|
||||
void xor_word_rd_indrs(u8 rd, u8 rs);
|
||||
void mov_word_rd_indrs(u8 rd, u8 rs);
|
||||
|
||||
void add_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void addc_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void sub_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void subb_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void cmp_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void and_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void or_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void xor_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void mov_byte_rd_indrs(u8 rd, u8 rs);
|
||||
|
||||
void add_word_indrd_rs(u8 rd, u8 rs);
|
||||
void addc_word_indrd_rs(u8 rd, u8 rs);
|
||||
void sub_word_indrd_rs(u8 rd, u8 rs);
|
||||
void subb_word_indrd_rs(u8 rd, u8 rs);
|
||||
void cmp_word_indrd_rs(u8 rd, u8 rs);
|
||||
void and_word_indrd_rs(u8 rd, u8 rs);
|
||||
void or_word_indrd_rs(u8 rd, u8 rs);
|
||||
void xor_word_indrd_rs(u8 rd, u8 rs);
|
||||
void mov_word_indrd_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void addc_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void sub_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void subb_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void cmp_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void and_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void or_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void xor_byte_indrd_rs(u8 rd, u8 rs);
|
||||
void mov_byte_indrd_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void addc_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void sub_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void subb_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void cmp_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void and_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void or_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void xor_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void mov_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
|
||||
void add_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void addc_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void sub_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void subb_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void cmp_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void and_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void or_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void xor_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
void mov_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
|
||||
void add_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void addc_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void sub_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void subb_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void cmp_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void and_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void or_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void xor_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
void mov_word_indrdinc_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void addc_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void sub_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void subb_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void cmp_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void and_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void or_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void xor_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
void mov_byte_indrdinc_rs(u8 rd, u8 rs);
|
||||
|
||||
void add_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void addc_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void sub_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void subb_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void cmp_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void and_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void or_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void xor_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void mov_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
|
||||
void add_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void addc_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void sub_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void subb_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void cmp_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void and_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void or_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void xor_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
void mov_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
|
||||
|
||||
void add_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void addc_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void sub_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void subb_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void cmp_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void and_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void or_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void xor_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void mov_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
|
||||
void add_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void addc_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void sub_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void subb_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void cmp_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void and_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void or_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void xor_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
void mov_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
|
||||
|
||||
void add_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void addc_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void sub_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void subb_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void cmp_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void and_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void or_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void xor_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void mov_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
|
||||
void add_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void addc_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void sub_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void subb_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void cmp_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void and_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void or_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void xor_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
void mov_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
|
||||
|
||||
void add_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void addc_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void sub_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void subb_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void cmp_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void and_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void or_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void xor_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void mov_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
|
||||
void add_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void addc_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void sub_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void subb_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void cmp_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void and_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void or_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void xor_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
void mov_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
|
||||
|
||||
void add_word_rd_direct(u8 rd, u16 direct);
|
||||
void addc_word_rd_direct(u8 rd, u16 direct);
|
||||
void sub_word_rd_direct(u8 rd, u16 direct);
|
||||
void subb_word_rd_direct(u8 rd, u16 direct);
|
||||
void cmp_word_rd_direct(u8 rd, u16 direct);
|
||||
void and_word_rd_direct(u8 rd, u16 direct);
|
||||
void or_word_rd_direct(u8 rd, u16 direct);
|
||||
void xor_word_rd_direct(u8 rd, u16 direct);
|
||||
void mov_word_rd_direct(u8 rd, u16 direct);
|
||||
|
||||
void add_byte_rd_direct(u8 rd, u16 direct);
|
||||
void addc_byte_rd_direct(u8 rd, u16 direct);
|
||||
void sub_byte_rd_direct(u8 rd, u16 direct);
|
||||
void subb_byte_rd_direct(u8 rd, u16 direct);
|
||||
void cmp_byte_rd_direct(u8 rd, u16 direct);
|
||||
void and_byte_rd_direct(u8 rd, u16 direct);
|
||||
void or_byte_rd_direct(u8 rd, u16 direct);
|
||||
void xor_byte_rd_direct(u8 rd, u16 direct);
|
||||
void mov_byte_rd_direct(u8 rd, u16 direct);
|
||||
|
||||
void add_word_direct_rs(u16 direct, u8 rs);
|
||||
void addc_word_direct_rs(u16 direct, u8 rs);
|
||||
void sub_word_direct_rs(u16 direct, u8 rs);
|
||||
void subb_word_direct_rs(u16 direct, u8 rs);
|
||||
void cmp_word_direct_rs(u16 direct, u8 rs);
|
||||
void and_word_direct_rs(u16 direct, u8 rs);
|
||||
void or_word_direct_rs(u16 direct, u8 rs);
|
||||
void xor_word_direct_rs(u16 direct, u8 rs);
|
||||
void mov_word_direct_rs(u16 direct, u8 rs);
|
||||
|
||||
void add_byte_direct_rs(u16 direct, u8 rs);
|
||||
void addc_byte_direct_rs(u16 direct, u8 rs);
|
||||
void sub_byte_direct_rs(u16 direct, u8 rs);
|
||||
void subb_byte_direct_rs(u16 direct, u8 rs);
|
||||
void cmp_byte_direct_rs(u16 direct, u8 rs);
|
||||
void and_byte_direct_rs(u16 direct, u8 rs);
|
||||
void or_byte_direct_rs(u16 direct, u8 rs);
|
||||
void xor_byte_direct_rs(u16 direct, u8 rs);
|
||||
void mov_byte_direct_rs(u16 direct, u8 rs);
|
||||
|
||||
void movs_word_rd_data4(u8 rd, u8 data4);
|
||||
void movs_byte_rd_data4(u8 rd, u8 data4);
|
||||
void adds_word_rd_data4(u8 rd, u8 data4);
|
||||
void adds_byte_rd_data4(u8 rd, u8 data4);
|
||||
|
||||
void movs_word_indrd_data4(u8 rd, u8 data4);
|
||||
void movs_byte_indrd_data4(u8 rd, u8 data4);
|
||||
void adds_word_indrd_data4(u8 rd, u8 data4);
|
||||
void adds_byte_indrd_data4(u8 rd, u8 data4);
|
||||
|
||||
void movs_word_indrdinc_data4(u8 rd, u8 data4);
|
||||
void movs_byte_indrdinc_data4(u8 rd, u8 data4);
|
||||
void adds_word_indrdinc_data4(u8 rd, u8 data4);
|
||||
void adds_byte_indrdinc_data4(u8 rd, u8 data4);
|
||||
|
||||
void movs_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
|
||||
void movs_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
|
||||
void adds_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
|
||||
void adds_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
|
||||
|
||||
void movs_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
|
||||
void movs_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
|
||||
void adds_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
|
||||
void adds_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
|
||||
|
||||
void movs_word_direct_data4(u16 direct, u8 data4);
|
||||
void movs_byte_direct_data4(u16 direct, u8 data4);
|
||||
void adds_word_direct_data4(u16 direct, u8 data4);
|
||||
void adds_byte_direct_data4(u16 direct, u8 data4);
|
||||
|
||||
void call_rel16(u16 rel16);
|
||||
|
||||
void bcc_rel8(u8 rel8);
|
||||
void bcs_rel8(u8 rel8);
|
||||
void bne_rel8(u8 rel8);
|
||||
void beq_rel8(u8 rel8);
|
||||
void bnv_rel8(u8 rel8);
|
||||
void bov_rel8(u8 rel8);
|
||||
void bpl_rel8(u8 rel8);
|
||||
void bmi_rel8(u8 rel8);
|
||||
void bg_rel8(u8 rel8);
|
||||
void bl_rel8(u8 rel8);
|
||||
void bge_rel8(u8 rel8);
|
||||
void blt_rel8(u8 rel8);
|
||||
void bgt_rel8(u8 rel8);
|
||||
void ble_rel8(u8 rel8);
|
||||
void br_rel8(u8 rel8);
|
||||
|
||||
void asl_byte_rd_imm4(u8 rd, u8 amount);
|
||||
void asl_word_rd_imm4(u8 rd, u8 amount);
|
||||
void asl_dword_rd_imm5(u8 rd, u8 amount);
|
||||
|
||||
void asr_byte_rd_imm4(u8 rd, u8 amount);
|
||||
void asr_word_rd_imm4(u8 rd, u8 amount);
|
||||
void asr_dword_rd_imm5(u8 rd, u8 amount);
|
||||
|
||||
void lsr_byte_rd_imm4(u8 rd, u8 amount);
|
||||
void lsr_word_rd_imm4(u8 rd, u8 amount);
|
||||
void lsr_dword_rd_imm5(u8 rd, u8 amount);
|
||||
|
||||
void asl_byte_rd_rs(u8 rd, u8 rs);
|
||||
void asl_word_rd_rs(u8 rd, u8 rs);
|
||||
void asl_dword_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void asr_byte_rd_rs(u8 rd, u8 rs);
|
||||
void asr_word_rd_rs(u8 rd, u8 rs);
|
||||
void asr_dword_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void lsr_byte_rd_rs(u8 rd, u8 rs);
|
||||
void lsr_word_rd_rs(u8 rd, u8 rs);
|
||||
void lsr_dword_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void norm_byte_rd_rs(u8 rd, u8 rs);
|
||||
void norm_word_rd_rs(u8 rd, u8 rs);
|
||||
void norm_dword_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void mulu_byte_rd_rs(u8 rd, u8 rs);
|
||||
void divu_byte_rd_rs(u8 rd, u8 rs);
|
||||
void mulu_word_rd_rs(u8 rd, u8 rs);
|
||||
void divu_word_rd_rs(u8 rd, u8 rs);
|
||||
void mul_word_rd_rs(u8 rd, u8 rs);
|
||||
void div_word_rd_rs(u8 rd, u8 rs);
|
||||
void div_word_rd_data8(u8 rd, u8 data8);
|
||||
void divu_byte_rd_data8(u8 rd, u8 data8);
|
||||
void divu_word_rd_data8(u8 rd, u8 data8);
|
||||
void mulu_byte_rd_data8(u8 rd, u8 data8);
|
||||
void mulu_word_rd_data16(u8 rd, u16 data16);
|
||||
void mul_word_rd_data16(u8 rd, u16 data16);
|
||||
void divu_dword_rd_data16(u8 rd, u16 data16);
|
||||
void div_dword_rd_data16(u8 rd, u16 data16);
|
||||
void divu_dword_rd_rs(u8 rd, u8 rs);
|
||||
void div_dword_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void clr_bit(u16 bit);
|
||||
void setb_bit(u16 bit);
|
||||
void mov_c_bit(u16 bit);
|
||||
void mov_bit_c(u16 bit);
|
||||
void anl_c_bit(u16 bit);
|
||||
void anl_c_notbit(u16 bit);
|
||||
void orl_c_bit(u16 bit);
|
||||
void orl_c_notbit(u16 bit);
|
||||
|
||||
void lea_word_rd_rs_off8(u8 rd, u8 rs, u8 offs8);
|
||||
void lea_word_rd_rs_off16(u8 rd, u8 rs, u16 offs16);
|
||||
|
||||
void xch_word_rd_indrs(u8 rd, u8 rs);
|
||||
void xch_byte_rd_indrs(u8 rd, u8 rs);
|
||||
void xch_word_rd_rs(u8 rd, u8 rs);
|
||||
void xch_byte_rd_rs(u8 rd, u8 rs);
|
||||
|
||||
void movc_word_rd_indrsinc(u8 rd, u8 rs);
|
||||
void movc_byte_rd_indrsinc(u8 rd, u8 rs);
|
||||
|
||||
void djnz_word_rd_rel8(u8 rd, u8 rel8);
|
||||
void djnz_byte_rd_rel8(u8 rd, u8 rel8);
|
||||
|
||||
void popu_word_direct(u16 direct);
|
||||
void popu_byte_direct(u16 direct);
|
||||
void pop_word_direct(u16 direct);
|
||||
void pop_byte_direct(u16 direct);
|
||||
void pushu_word_direct(u16 direct);
|
||||
void pushu_byte_direct(u16 direct);
|
||||
void push_word_direct(u16 direct);
|
||||
void push_byte_direct(u16 direct);
|
||||
|
||||
void mov_word_indrdinc_indrsinc(u8 rd, u8 rs);
|
||||
void mov_byte_indrdinc_indrsinc(u8 rd, u8 rs);
|
||||
|
||||
void da_rd(u8 rd);
|
||||
void sext_word_rd(u8 rd);
|
||||
void sext_byte_rd(u8 rd);
|
||||
void cpl_word_rd(u8 rd);
|
||||
void cpl_byte_rd(u8 rd);
|
||||
void neg_word_rd(u8 rd);
|
||||
void neg_byte_rd(u8 rd);
|
||||
void movc_a_apc();
|
||||
void movc_a_adptr();
|
||||
void mov_rd_usp(u8 rd);
|
||||
void mov_usp_rs(u8 rs);
|
||||
|
||||
void jb_bit_rel8(u16 bit, u8 rel8);
|
||||
void jnb_bit_rel8(u16 bit, u8 rel8);
|
||||
void jbc_bit_rel8(u16 bit, u8 rel8);
|
||||
|
||||
void mov_word_direct_direct(u16 direct1, u16 direct2);
|
||||
void mov_byte_direct_direct(u16 direct1, u16 direct2);
|
||||
|
||||
void xch_word_rd_direct(u8 rd, u16 direct);
|
||||
void xch_byte_rd_direct(u8 rd, u16 direct);
|
||||
|
||||
void mov_word_direct_indrs(u16 direct, u8 rs);
|
||||
void mov_byte_direct_indrs(u16 direct, u8 rs);
|
||||
|
||||
void mov_word_indrd_direct(u8 rd, u16 direct);
|
||||
void mov_byte_indrd_direct(u8 rd, u16 direct);
|
||||
|
||||
void movx_word_indrd_rs(u8 rd, u8 rs);
|
||||
void movx_byte_indrd_rs(u8 rd, u8 rs);
|
||||
|
||||
void movx_word_rd_indrs(u8 rd, u8 rs);
|
||||
void movx_byte_rd_indrs(u8 rd, u8 rs);
|
||||
|
||||
void rr_word_rd_data4(u8 rd, u8 data4);
|
||||
void rr_byte_rd_data4(u8 rd, u8 data4);
|
||||
|
||||
void rrc_word_rd_data4(u8 rd, u8 data4);
|
||||
void rrc_byte_rd_data4(u8 rd, u8 data4);
|
||||
|
||||
void rl_word_rd_data4(u8 rd, u8 data4);
|
||||
void rl_byte_rd_data4(u8 rd, u8 data4);
|
||||
|
||||
void rlc_word_rd_data4(u8 rd, u8 data4);
|
||||
void rlc_byte_rd_data4(u8 rd, u8 data4);
|
||||
|
||||
void fcall_addr24(u32 addr24);
|
||||
void call_indrs(u8 rs);
|
||||
void fjmp_addr24(u32 addr24);
|
||||
void jmp_rel16(u16 rel16);
|
||||
|
||||
void djnz_word_direct_rel8(u16 direct, u8 rel8);
|
||||
void djnz_byte_direct_rel8(u16 direct, u8 rel8);
|
||||
|
||||
void cjne_word_rd_direct_rel8(u8 rd, u16 direct, u8 rel8);
|
||||
void cjne_byte_rd_direct_rel8(u8 rd, u16 direct, u8 rel8);
|
||||
|
||||
void cjne_indrd_data8_rel8(u8 rd, u8 data8, u8 rel8);
|
||||
void cjne_rd_data8_rel8(u8 rd, u8 data8, u8 rel8);
|
||||
|
||||
void cjne_indrd_data16_rel8(u8 rd, u16 data16, u8 rel8);
|
||||
void cjne_rd_data16_rel8(u8 rd, u16 data16, u8 rel8);
|
||||
|
||||
void reset();
|
||||
void trap_data4(u8 data4);
|
||||
void jmp_ind_adptr();
|
||||
void jmp_dblindrs(u8 rs);
|
||||
void jmp_indrs(u8 rs);
|
||||
void ret();
|
||||
void reti();
|
||||
|
||||
void jz_rel8(u8 rel8);
|
||||
void jnz_rel8(u8 rel8);
|
||||
|
||||
void push_word_rlist(u8 bitfield, int h);
|
||||
void push_byte_rlist(u8 bitfield, int h);
|
||||
|
||||
void pushu_word_rlist(u8 bitfield, int h);
|
||||
void pushu_byte_rlist(u8 bitfield, int h);
|
||||
|
||||
void pop_word_rlist(u8 bitfield, int h);
|
||||
void pop_byte_rlist(u8 bitfield, int h);
|
||||
|
||||
void popu_word_rlist(u8 bitfield, int h);
|
||||
void popu_byte_rlist(u8 bitfield, int h);
|
||||
|
||||
std::unordered_map<offs_t, const char *> m_names;
|
||||
|
||||
u8 m_im;
|
||||
u8 m_rs;
|
||||
u8 m_zflag;
|
||||
u8 m_nflag;
|
||||
u8 m_vflag;
|
||||
u8 m_cflag;
|
||||
u8 m_acflag;
|
||||
u8 m_sm_flag;
|
||||
u8 m_tm_flag;
|
||||
u8 m_p_flag;
|
||||
u8 m_f0_flag;
|
||||
u8 m_f1_flag;
|
||||
|
||||
uint32_t m_pc;
|
||||
|
||||
bool m_usermode;
|
||||
u8 m_pagezeromode;
|
||||
|
||||
u16 m_USP; // user stack pointer
|
||||
u16 m_SSP; // system stack pointer
|
||||
|
||||
u8 m_WDCON;
|
||||
u8 m_SCR;
|
||||
u8 m_IEL;
|
||||
u8 m_PSWL;
|
||||
u8 m_PSWH;
|
||||
|
||||
u8 m_regbank;
|
||||
|
||||
u8 m_PxCFGA[4];
|
||||
u8 m_PxCFGB[4];
|
||||
|
||||
// hacks for IRQ testing
|
||||
u8 m_in_interrupt;
|
||||
u8 m_irq_pending;
|
||||
|
||||
|
||||
// 16-bit regs R0-R3 can have 4 selectable banks, R4-R7 are global
|
||||
// for 8-bit use each register can be seen as High and Low parts
|
||||
// R4 when split is R4H and R4L, R4L acts as ACC from i8051 for compatibility, R4H acts as B
|
||||
// R6H is DPH, R6L is DPL
|
||||
u16 m_regs[(4 * 4) + 4];
|
||||
|
||||
address_space *m_program;
|
||||
address_space *m_data;
|
||||
address_space *m_sfr;
|
||||
int m_icount;
|
||||
|
||||
devcb_read8::array<4> m_port_in_cb;
|
||||
devcb_write8::array<4> m_port_out_cb;
|
||||
};
|
||||
|
||||
class mx10exa_cpu_device : public xa_cpu_device
|
||||
class mx10exa_cpu_device : public xa_cpu
|
||||
{
|
||||
public:
|
||||
mx10exa_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
private:
|
||||
void mx10exa_internal_map(address_map &map);
|
||||
void mx10exa_internal_data_map(address_map &map);
|
||||
|
||||
};
|
||||
|
||||
|
||||
DECLARE_DEVICE_TYPE(XA, xa_cpu_device)
|
||||
DECLARE_DEVICE_TYPE(XA, xa_cpu)
|
||||
DECLARE_DEVICE_TYPE(MX10EXA, mx10exa_cpu_device)
|
||||
|
||||
#endif // MAME_CPU_XA_XA_H
|
||||
|
||||
1893
src/devices/cpu/xa/xa_ops.cpp
Normal file
1893
src/devices/cpu/xa/xa_ops.cpp
Normal file
File diff suppressed because it is too large
Load Diff
@ -6,54 +6,54 @@
|
||||
|
||||
const xa_dasm::op_func xa_dasm::s_instruction[256] =
|
||||
{
|
||||
// group 0
|
||||
&xa_dasm::d_nop, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
|
||||
&xa_dasm::d_bitgroup, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
|
||||
// group 0
|
||||
&xa_dasm::d_nop, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
|
||||
&xa_dasm::d_bitgroup, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
|
||||
// group 1
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
|
||||
// group 2
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
|
||||
// group 3
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
|
||||
// group 4
|
||||
&xa_dasm::d_lea_offset8, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
|
||||
&xa_dasm::d_lea_offset16, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
|
||||
&xa_dasm::d_lea_offset8, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
|
||||
&xa_dasm::d_lea_offset16, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
|
||||
// group 5
|
||||
&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
|
||||
&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
|
||||
// group 6
|
||||
&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
|
||||
&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
|
||||
// group 7
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
|
||||
&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
|
||||
// group 8
|
||||
&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
|
||||
&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
|
||||
&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
|
||||
&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
|
||||
// group 9
|
||||
&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
|
||||
&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
|
||||
&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
|
||||
&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
|
||||
// group a
|
||||
&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
|
||||
&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
|
||||
&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
|
||||
&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
|
||||
// group b
|
||||
&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
|
||||
&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
|
||||
&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
|
||||
&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
|
||||
// group c
|
||||
&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
|
||||
&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
|
||||
&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
|
||||
&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
|
||||
// group d
|
||||
&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
|
||||
&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
|
||||
&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
|
||||
&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
|
||||
// group e
|
||||
&xa_dasm::d_mulu_b, &xa_dasm::d_divu_b, &xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d8, &xa_dasm::d_mulu_w, &xa_dasm::d_divu_w, &xa_dasm::d_mul_w, &xa_dasm::d_div_w,
|
||||
&xa_dasm::d_div_data8, &xa_dasm::d_div_d16,&xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d16, &xa_dasm::d_jz_rel8,&xa_dasm::d_divu_d, &xa_dasm::d_jnz_rel8, &xa_dasm::d_div_d,
|
||||
&xa_dasm::d_mulu_b, &xa_dasm::d_divu_b, &xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d8, &xa_dasm::d_mulu_w, &xa_dasm::d_divu_w, &xa_dasm::d_mul_w, &xa_dasm::d_div_w,
|
||||
&xa_dasm::d_div_data8, &xa_dasm::d_div_d16,&xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d16, &xa_dasm::d_jz_rel8,&xa_dasm::d_divu_d, &xa_dasm::d_jnz_rel8, &xa_dasm::d_div_d,
|
||||
// group f
|
||||
&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch,
|
||||
&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_bkpt,
|
||||
&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch,
|
||||
&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_bkpt,
|
||||
};
|
||||
|
||||
// SFR names
|
||||
@ -68,13 +68,13 @@ const xa_dasm::mem_info xa_dasm::default_names[] = {
|
||||
{ 0x411, "TSTAT" },
|
||||
{ 0x418, "T2CON" },
|
||||
{ 0x419, "T2MOD" },
|
||||
{ 0x41F, "WDCON" },
|
||||
{ 0x420, "S0CON" },
|
||||
{ 0x421, "S0STAT" },
|
||||
{ 0x41F, "WDCON" },
|
||||
{ 0x420, "S0CON" },
|
||||
{ 0x421, "S0STAT" },
|
||||
{ 0x424, "S1CON" },
|
||||
{ 0x425, "S1STAT" },
|
||||
{ 0x425, "S1STAT" },
|
||||
{ 0x426, "IEL" },
|
||||
{ 0x427, "IEH" },
|
||||
{ 0x427, "IEH" },
|
||||
{ 0x42A, "SWR" },
|
||||
{ 0x430, "P0" },
|
||||
{ 0x431, "P1" },
|
||||
@ -105,22 +105,22 @@ const xa_dasm::mem_info xa_dasm::default_names[] = {
|
||||
{ 0x462, "S0ADEN" },
|
||||
{ 0x464, "S1BUF" },
|
||||
{ 0x465, "S1ADDR" },
|
||||
{ 0x466, "S1ADEN" },
|
||||
{ 0x466, "S1ADEN" },
|
||||
{ 0x468, "BTRL" },
|
||||
{ 0x469, "BTRH" },
|
||||
{ 0x46A, "BCR" },
|
||||
{ 0x470, "P0CFGA" },
|
||||
{ 0x471, "P1CFGA" },
|
||||
{ 0x472, "P2CFGA" },
|
||||
{ 0x473, "P3CFGA" },
|
||||
{ 0x473, "P3CFGA" },
|
||||
{ 0x47A, "SWE" },
|
||||
{ 0x4A0, "IPA0" },
|
||||
{ 0x4A1, "IPA1" },
|
||||
{ 0x4A2, "IPA2" },
|
||||
{ 0x4A2, "IPA2" },
|
||||
{ 0x4A3, "IPA3" },
|
||||
{ 0x4A4, "IPA4" },
|
||||
{ 0x4A5, "IPA5" },
|
||||
{ 0x4F0, "P0CFGB" },
|
||||
{ 0x4A5, "IPA5" },
|
||||
{ 0x4F0, "P0CFGB" },
|
||||
{ 0x4F1, "P1CFGB" },
|
||||
{ 0x4F2, "P2CFGB" },
|
||||
{ 0x4F3, "P3CFGB" },
|
||||
@ -183,10 +183,10 @@ int xa_dasm::d_illegal(XA_DASM_PARAMS)
|
||||
|
||||
int xa_dasm::handle_shift(XA_DASM_PARAMS, int shift_type)
|
||||
{
|
||||
int size = op & 0x0c;
|
||||
int size = (op & 0x0c) >> 2;
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
u8 data, rd;
|
||||
if (size == 0x0c)
|
||||
if (size == 0x03)
|
||||
{
|
||||
data = op2 & 0x1f;
|
||||
rd = (op2 & 0xe0) >> 4;
|
||||
@ -199,11 +199,11 @@ int xa_dasm::handle_shift(XA_DASM_PARAMS, int shift_type)
|
||||
|
||||
if (size == 0x00)
|
||||
{
|
||||
util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size >> 2], m_regnames8[rd], data);
|
||||
util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size], m_regnames8[rd], data);
|
||||
}
|
||||
else
|
||||
{
|
||||
util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size >> 2], m_regnames16[rd], data);
|
||||
util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size], m_regnames16[rd], data);
|
||||
}
|
||||
|
||||
return 2;
|
||||
@ -327,7 +327,7 @@ int xa_dasm::handle_alu_type0(XA_DASM_PARAMS, int alu_op)
|
||||
|
||||
|
||||
|
||||
int xa_dasm::handle_alu_type1(XA_DASM_PARAMS, uint8_t op2)
|
||||
int xa_dasm::handle_alu_type1(XA_DASM_PARAMS, u8 op2)
|
||||
{
|
||||
int alu_op = op2 & 0x0f;
|
||||
switch (op & 0x0f)
|
||||
@ -563,7 +563,7 @@ int xa_dasm::handle_pushpop_rlist(XA_DASM_PARAMS, int type)
|
||||
|
||||
if (bit)
|
||||
{
|
||||
util::stream_format(stream, "%s%s", firstbit ? "" : ",", m_regnames8[i + h ? 8 : 0]);
|
||||
util::stream_format(stream, "%s%s", firstbit ? "" : ",", m_regnames8[i + (h ? 8 : 0)]);
|
||||
firstbit = false;
|
||||
}
|
||||
}
|
||||
@ -605,15 +605,15 @@ int xa_dasm::d_bitgroup(XA_DASM_PARAMS)
|
||||
|
||||
switch (op2 & 0xf0)
|
||||
{
|
||||
case 0x00: util::stream_format(stream, "CLR %s", get_bittext(bit) ); break;
|
||||
case 0x00: util::stream_format(stream, "CLR %s", get_bittext(bit) ); break;
|
||||
case 0x10: util::stream_format(stream, "SETB %s", get_bittext(bit) ); break;
|
||||
case 0x20: util::stream_format(stream, "MOV C, %s", get_bittext(bit) ); break;
|
||||
case 0x20: util::stream_format(stream, "MOV C, %s", get_bittext(bit) ); break;
|
||||
case 0x30: util::stream_format(stream, "MOV %s, C", get_bittext(bit) ); break;
|
||||
case 0x40: util::stream_format(stream, "ANL C, %s", get_bittext(bit) ); break;
|
||||
case 0x50: util::stream_format(stream, "ANL C, /%s", get_bittext(bit) ); break;
|
||||
case 0x60: util::stream_format(stream, "ORL C, %s", get_bittext(bit) ); break;
|
||||
case 0x70: util::stream_format(stream, "ORL C, /%s", get_bittext(bit) ); break;
|
||||
default: util::stream_format(stream, "illegal bit op %s", get_bittext(bit) ); break;
|
||||
default: util::stream_format(stream, "illegal bit op %s", get_bittext(bit) ); break;
|
||||
}
|
||||
return 3;
|
||||
}
|
||||
@ -793,7 +793,7 @@ int xa_dasm::d_xch_type1(XA_DASM_PARAMS)
|
||||
const char** regnames = size ? m_regnames16 : m_regnames8;
|
||||
const u8 rd = (op2 & 0xf0) >> 4;
|
||||
const u8 rs = (op2 & 0x07);
|
||||
util::stream_format(stream, "XCH %s, [%s]", regnames[rd], m_regnames16[rs]);
|
||||
util::stream_format(stream, "XCH%s %s, [%s]", size ? ".w" : ".b", regnames[rd], m_regnames16[rs]);
|
||||
return 2;
|
||||
}
|
||||
|
||||
@ -809,7 +809,7 @@ AND Rd, [Rs+] Logical AND reg-ind w/ autoinc to reg
|
||||
AND [Rd+], Rs Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 ssss 1ddd
|
||||
AND direct, Rs Logical AND reg to mem 3 4 0101 S110 ssss 1DDD DDDD DDDD
|
||||
AND Rd, direct Logical AND mem to reg 3 4 0101 S110 dddd 0DDD DDDD DDDD
|
||||
*/
|
||||
*/
|
||||
int xa_dasm::d_and(XA_DASM_PARAMS)
|
||||
{
|
||||
return handle_alu_type0(XA_CALL_PARAMS, 5);
|
||||
@ -828,7 +828,7 @@ int xa_dasm::d_xch_type2(XA_DASM_PARAMS)
|
||||
const u8 rd = (op2 & 0xf0) >> 4;
|
||||
const u8 rs = (op2 & 0x0f);
|
||||
|
||||
util::stream_format(stream, "XCH %s, %s", regnames[rd], regnames[rs]);
|
||||
util::stream_format(stream, "XCH%s %s, %s", size ? ".w" : ".b", regnames[rd], regnames[rs]);
|
||||
return 2;
|
||||
}
|
||||
|
||||
@ -1029,12 +1029,12 @@ int xa_dasm::d_g9_subgroup(XA_DASM_PARAMS)
|
||||
if (!size)
|
||||
{
|
||||
int rd = (op2 & 0xf0) >> 4;
|
||||
util::stream_format(stream, "MOV %s, USP", m_regnames16[rd]);
|
||||
util::stream_format(stream, "MOV %s, USP", m_regnames16[rd]);
|
||||
}
|
||||
else
|
||||
{
|
||||
int rs = (op2 & 0xf0) >> 4;
|
||||
util::stream_format(stream, "MOV USP, %s", m_regnames16[rs]);
|
||||
util::stream_format(stream, "MOV USP, %s", m_regnames16[rs]);
|
||||
}
|
||||
return 2;
|
||||
}
|
||||
@ -1204,7 +1204,9 @@ int xa_dasm::d_jb_mov_subgroup(XA_DASM_PARAMS)
|
||||
{
|
||||
int direct_dst = ((op2 & 0x70) << 4) | op3;
|
||||
int direct_src = ((op2 & 0x07) << 8) | op4;
|
||||
util::stream_format(stream, "MOV %s, %s", get_directtext(direct_dst), get_directtext(direct_src));
|
||||
int size = op & 0x08;
|
||||
|
||||
util::stream_format(stream, "MOV%s %s, %s", size ? ".w" : ".b", get_directtext(direct_dst), get_directtext(direct_src));
|
||||
}
|
||||
|
||||
return 4;
|
||||
@ -1244,7 +1246,7 @@ int xa_dasm::d_movdir(XA_DASM_PARAMS)
|
||||
{
|
||||
const u8 rd = op2 & (0x70) >> 4;
|
||||
util::stream_format(stream, "MOV%s [%s], %s", size ? ".w" : ".b", m_regnames16[rd], get_directtext(direct));
|
||||
return 3;
|
||||
return 3;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1293,7 +1295,7 @@ int xa_dasm::d_movx_subgroup(XA_DASM_PARAMS)
|
||||
|
||||
/*
|
||||
RR Rd, #data4 Rotate right reg by the 4-bit imm value 2 a* 1011 S000 dddd iiii
|
||||
*/
|
||||
*/
|
||||
int xa_dasm::d_rr(XA_DASM_PARAMS)
|
||||
{
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
@ -1374,8 +1376,8 @@ CALL rel16 Relative call (range +/- 64K)
|
||||
*/
|
||||
int xa_dasm::d_asl_c(XA_DASM_PARAMS)
|
||||
{
|
||||
int size = op & 0x0c;
|
||||
if (size == 0x04)
|
||||
int size = (op & 0x0c) >> 2;
|
||||
if (size == 0x01)
|
||||
{
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
const u8 op3 = opcodes.r8(pc++);
|
||||
@ -1391,7 +1393,7 @@ int xa_dasm::d_asl_c(XA_DASM_PARAMS)
|
||||
const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
|
||||
const u8 rd = (op2 & 0xf0) >> 4;
|
||||
const u8 rs = (op2 & 0x0f);
|
||||
util::stream_format(stream, "ASL %s, %s", regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param? (check 03D4 in superkds)
|
||||
util::stream_format(stream, "ASL%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param? (check 03D4 in superkds)
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
@ -1400,11 +1402,11 @@ int xa_dasm::d_asl_c(XA_DASM_PARAMS)
|
||||
/*
|
||||
ASR Rd, Rs Arithmetic shift right dest reg by the count in the src 2 a* 1100 SS10 dddd ssss
|
||||
CALL [Rs] Subroutine call ind w/ a reg 2 8/5(PZ) 1100 0110 0000 0sss
|
||||
*/
|
||||
*/
|
||||
int xa_dasm::d_asr_c(XA_DASM_PARAMS)
|
||||
{
|
||||
int size = op & 0x0c;
|
||||
if (size == 0x04)
|
||||
int size = (op & 0x0c) >> 2;
|
||||
if (size == 0x01)
|
||||
{
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
const u8 rs = op2 & 0x07;
|
||||
@ -1417,7 +1419,7 @@ int xa_dasm::d_asr_c(XA_DASM_PARAMS)
|
||||
const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
|
||||
const u8 rd = (op2 & 0xf0) >> 4;
|
||||
const u8 rs = (op2 & 0x0f);
|
||||
util::stream_format(stream, "ASR %s, %s", regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
|
||||
util::stream_format(stream, "ASR%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
@ -1428,8 +1430,8 @@ NORM Rd, Rs Logical shift left dest reg by the value in the src
|
||||
*/
|
||||
int xa_dasm::d_norm(XA_DASM_PARAMS)
|
||||
{
|
||||
int size = op & 0x0c;
|
||||
if (size == 0x04)
|
||||
int size = (op & 0x0c) >> 2;
|
||||
if (size == 0x01)
|
||||
{
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
util::stream_format(stream, "illegal %02x", op2);
|
||||
@ -1441,8 +1443,7 @@ int xa_dasm::d_norm(XA_DASM_PARAMS)
|
||||
int rd = (op2 & 0xf0) >> 4;
|
||||
int rs = (op2 & 0x0f);
|
||||
const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
|
||||
// doesn't have a #data5 mode like the other shifts?
|
||||
util::stream_format(stream, "NORM%s %s, %s", m_dwparamsizes[size >> 2], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
|
||||
util::stream_format(stream, "NORM%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
|
||||
return 2;
|
||||
}
|
||||
return 2;
|
||||
@ -1457,8 +1458,8 @@ FJMP addr24 Far jump (full 24-bit address space)
|
||||
*/
|
||||
int xa_dasm::d_lsr_fj(XA_DASM_PARAMS)
|
||||
{
|
||||
int size = op & 0x0c;
|
||||
if (size == 0x04)
|
||||
int size = (op & 0x0c) >> 2;
|
||||
if (size == 0x01)
|
||||
{
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
const u8 op3 = opcodes.r8(pc++);
|
||||
@ -1574,17 +1575,20 @@ int xa_dasm::d_djnz_cjne(XA_DASM_PARAMS)
|
||||
const u8 op2 = opcodes.r8(pc++);
|
||||
const u8 op3 = opcodes.r8(pc++);
|
||||
const u8 op4 = opcodes.r8(pc++);
|
||||
int size = op & 0x08;
|
||||
|
||||
int address = pc + ((s8)op4)*2;
|
||||
address &= ~1; // must be word aligned
|
||||
const u16 direct = ((op2 & 0x07) << 8) | op3;
|
||||
if (op2 & 0x08)
|
||||
{
|
||||
util::stream_format(stream, "DJNZ %s, $%04x", get_directtext(direct), address);
|
||||
util::stream_format(stream, "DJNZ%s %s, $%04x", size ? ".w" : ".b", get_directtext(direct), address);
|
||||
}
|
||||
else
|
||||
{
|
||||
int rd = (op2 & 0xf0) >> 4;
|
||||
util::stream_format(stream, "CJNE %s, %s, $%04x", m_regnames16[rd], get_directtext(direct), address);
|
||||
const char** regnames = size ? m_regnames16 : m_regnames8;
|
||||
util::stream_format(stream, "CJNE%s %s, %s, $%04x", size ? ".w" : ".b", regnames[rd], get_directtext(direct), address);
|
||||
}
|
||||
return 4;
|
||||
}
|
||||
@ -1662,10 +1666,10 @@ int xa_dasm::d_div_w(XA_DASM_PARAMS)
|
||||
}
|
||||
|
||||
/*
|
||||
DIV.w Rd, #data8 16x8 signed divide reg w/ imm word 3 14 1110 1000 dddd 1011 iiii iiii
|
||||
MULU.b Rd, #data8 8X8 unsigned multiply of 8-bit imm data w/ reg 3 12 1110 1000 dddd 0000 iiii iiii
|
||||
DIVU.b Rd, #data8 8X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0001 iiii iiii
|
||||
DIVU.w Rd, #data8 16X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0011 iiii iiii
|
||||
MULU.b Rd, #data8 8X8 unsigned multiply of 8-bit imm data w/ reg 3 12 1110 1000 dddd 0000 iiii iiii
|
||||
DIV.w Rd, #data8 16x8 signed divide reg w/ imm word 3 14 1110 1000 dddd 1011 iiii iiii
|
||||
*/
|
||||
int xa_dasm::d_div_data8(XA_DASM_PARAMS)
|
||||
{
|
||||
@ -1706,8 +1710,8 @@ int xa_dasm::d_div_data8(XA_DASM_PARAMS)
|
||||
|
||||
/*
|
||||
MULU.w Rd, #data16 16X16 unsigned multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 0000 iiii iiii iiii iiii
|
||||
MUL.w Rd, #data16 16X16 signed multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 1000 iiii iiii iiii iiii
|
||||
DIVU.d Rd, #data16 32X16 unsigned double reg divide w/ imm word 4 22 1110 1001 ddd0 0001 iiii iiii iiii iiii
|
||||
MUL.w Rd, #data16 16X16 signed multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 1000 iiii iiii iiii iiii
|
||||
DIV.d Rd, #data16 32x16 signed double reg divide w/ imm word 4 24 1110 1001 ddd0 1001 iiii iiii iiii iiii
|
||||
*/
|
||||
int xa_dasm::d_div_d16(XA_DASM_PARAMS)
|
||||
@ -1790,12 +1794,12 @@ int xa_dasm::d_cjne_d8(XA_DASM_PARAMS)
|
||||
if (op2 & 0x08)
|
||||
{
|
||||
const u8 rd = (op2 & 0x70) >> 4;
|
||||
util::stream_format(stream, "CJNE [%d], #$%02x, $%04x", m_regnames16[rd], op4, address);
|
||||
util::stream_format(stream, "CJNE [%s], #$%02x, $%04x", m_regnames16[rd], op4, address);
|
||||
}
|
||||
else
|
||||
{
|
||||
const u8 rd = (op2 & 0xf0) >> 4;
|
||||
util::stream_format(stream, "CJNE %d, #$%02x, $%04x", m_regnames8[rd], op4, address);
|
||||
util::stream_format(stream, "CJNE %s, #$%02x, $%04x", m_regnames8[rd], op4, address);
|
||||
}
|
||||
return 4;
|
||||
}
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#define XA_DASM_PARAMS uint8_t op, std::ostream& stream, offs_t pc, const data_buffer& opcodes, const data_buffer& params
|
||||
#define XA_DASM_PARAMS u8 op, std::ostream& stream, offs_t pc, const data_buffer& opcodes, const data_buffer& params
|
||||
#define XA_CALL_PARAMS op, stream, pc, opcodes, params
|
||||
|
||||
class xa_dasm : public util::disasm_interface
|
||||
@ -39,7 +39,7 @@ private:
|
||||
|
||||
const char* m_regnames16[16] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal" };
|
||||
const char* m_regnames8[16] = { "R0L", "R0H", "R1L", "R1H", "R2L", "R2H", "R3L", "R3H", "R4L", "R4H", "R5L", "R5H", "R6L", "R6H", "R7L", "R7H"};
|
||||
const char* m_aluops[16] = { "ADD", "ADDC", "SUB", "SUBC", "CMP", "AND", "OR", "XOR", "MOV", "illegal ALU 0x09", "illegal ALU 0x0a", "illegal ALU 0x0b", "illegal ALU 0x0c", "illegal ALU 0x0d", "illegal ALU 0x0e", "illegal ALU 0x0f"};
|
||||
const char* m_aluops[16] = { "ADD", "ADDC", "SUB", "SUBB", "CMP", "AND", "OR", "XOR", "MOV", "illegal ALU 0x09", "illegal ALU 0x0a", "illegal ALU 0x0b", "illegal ALU 0x0c", "illegal ALU 0x0d", "illegal ALU 0x0e", "illegal ALU 0x0f"};
|
||||
const char* m_branches[15] = { "BCC", "BCS", "BNE", "BEQ", "BNV", "BOV", "BPL", "BMI", "BG", "BL", "BGE", "BLT", "BGT", "BLE", "BR" };
|
||||
const char* m_addsmovs[2] = { "ADDS", "MOVS" };
|
||||
const char* m_pushpull[4] = { "PUSH", "PUSHU", "POP", "POPU" };
|
||||
@ -51,7 +51,7 @@ private:
|
||||
std::string show_expanded_data4(u16 data4, int size);
|
||||
|
||||
int handle_alu_type0(XA_DASM_PARAMS, int alu_op);
|
||||
int handle_alu_type1(XA_DASM_PARAMS, uint8_t op2);
|
||||
int handle_alu_type1(XA_DASM_PARAMS, u8 op2);
|
||||
int handle_pushpop_rlist(XA_DASM_PARAMS, int type);
|
||||
int handle_adds_movs(XA_DASM_PARAMS, int which);
|
||||
int handle_shift(XA_DASM_PARAMS, int shift_type);
|
||||
|
||||
@ -533,6 +533,14 @@ u16 ics2115_device::reg_read()
|
||||
{
|
||||
case 0x00: // [osc] Oscillator Configuration
|
||||
ret = voice.osc_conf.value;
|
||||
if (voice.state.on)
|
||||
{
|
||||
ret |= 8;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret &= ~8;
|
||||
}
|
||||
ret <<= 8;
|
||||
break;
|
||||
|
||||
@ -1078,7 +1086,7 @@ void ics2115_device::recalc_irq()
|
||||
//Suspect
|
||||
bool irq = (m_irq_pending & m_irq_enabled);
|
||||
for (int i = 0; (!irq) && (i < 32); i++)
|
||||
irq |= m_voice[i].vol_ctrl.bitflags.irq_pending && m_voice[i].osc_conf.bitflags.irq_pending;
|
||||
irq |= m_voice[i].vol_ctrl.bitflags.irq_pending || m_voice[i].osc_conf.bitflags.irq_pending;
|
||||
m_irq_on = irq;
|
||||
m_irq_cb(irq ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
@ -17,6 +17,9 @@
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
#define LOG_DEBUG (1U << 1)
|
||||
#define VERBOSE (0)
|
||||
#include "logmacro.h"
|
||||
|
||||
namespace {
|
||||
|
||||
@ -27,6 +30,8 @@ public:
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_xa(*this, "xa"),
|
||||
m_ics(*this, "ics"),
|
||||
m_screen(*this, "screen"),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_palette(*this, "palette"),
|
||||
m_gfxrom(*this, "gfx1"),
|
||||
@ -44,6 +49,9 @@ public:
|
||||
protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
private:
|
||||
void main_map(address_map &map);
|
||||
|
||||
@ -54,7 +62,7 @@ private:
|
||||
|
||||
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
u32 igs027_gpio_r(offs_t offset);
|
||||
u32 igs027_gpio_r(offs_t offset, u32 mem_mask);
|
||||
void igs027_gpio_w(offs_t offset, u32 data, u32 mem_mask);
|
||||
|
||||
TIMER_CALLBACK_MEMBER(igs027_timer0);
|
||||
@ -62,26 +70,52 @@ private:
|
||||
|
||||
void igs027_periph_init(void);
|
||||
void igs027_trigger_irq(int num);
|
||||
u32 igs027_periph_r(offs_t offset);
|
||||
u32 igs027_periph_r(offs_t offset, u32 mem_mask);
|
||||
void igs027_periph_w(offs_t offset, u32 data, u32 mem_mask);
|
||||
|
||||
u32 xa_r(offs_t offset);
|
||||
u32 xa_r(offs_t offset, u32 mem_mask);
|
||||
void xa_w(offs_t offset, u32 data, u32 mem_mask);
|
||||
void cpld_w(offs_t offset, u32 data, u32 mem_mask);
|
||||
|
||||
u8 mcu_p0_r();
|
||||
u8 mcu_p1_r();
|
||||
u8 mcu_p2_r();
|
||||
u8 mcu_p3_r();
|
||||
void mcu_p0_w(uint8_t data);
|
||||
void mcu_p1_w(uint8_t data);
|
||||
void mcu_p2_w(uint8_t data);
|
||||
void mcu_p3_w(uint8_t data);
|
||||
|
||||
u16 xa_wait_r(offs_t offset);
|
||||
|
||||
u8 m_port2_latch;
|
||||
u8 m_port0_latch;
|
||||
|
||||
u32 m_gpio_o;
|
||||
u32 m_irq_enable;
|
||||
u32 m_irq_pending;
|
||||
emu_timer *m_timer0;
|
||||
emu_timer *m_timer1;
|
||||
|
||||
u32 m_xa_cmd;
|
||||
u32 m_xa_ret0;
|
||||
u32 m_xa_ret1;
|
||||
u8 m_num_params;
|
||||
|
||||
u8 m_port0_dat;
|
||||
u8 m_port1_dat;
|
||||
u8 m_port2_dat;
|
||||
u8 m_port3_dat;
|
||||
|
||||
int m_trackball_cnt;
|
||||
int m_trackball_axis[2], m_trackball_axis_pre[2], m_trackball_axis_diff[2];
|
||||
|
||||
emu_timer *m_timer0;
|
||||
emu_timer *m_timer1;
|
||||
|
||||
// devices
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<xa_cpu_device> m_xa;
|
||||
required_device<mx10exa_cpu_device> m_xa;
|
||||
required_device<ics2115_device> m_ics;
|
||||
required_device<screen_device> m_screen;
|
||||
required_shared_ptr<u32> m_videoram;
|
||||
required_device<palette_device> m_palette;
|
||||
required_region_ptr<u8> m_gfxrom;
|
||||
@ -97,11 +131,52 @@ void igs_fear_state::video_start()
|
||||
igs027_periph_init();
|
||||
}
|
||||
|
||||
void igs_fear_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_port2_latch));
|
||||
save_item(NAME(m_port0_latch));
|
||||
|
||||
save_item(NAME(m_gpio_o));
|
||||
save_item(NAME(m_irq_enable));
|
||||
save_item(NAME(m_irq_pending));
|
||||
|
||||
save_item(NAME(m_xa_cmd));
|
||||
save_item(NAME(m_xa_ret0));
|
||||
save_item(NAME(m_xa_ret1));
|
||||
save_item(NAME(m_num_params));
|
||||
|
||||
save_item(NAME(m_port0_dat));
|
||||
save_item(NAME(m_port1_dat));
|
||||
save_item(NAME(m_port2_dat));
|
||||
save_item(NAME(m_port3_dat));
|
||||
}
|
||||
|
||||
void igs_fear_state::machine_reset()
|
||||
{
|
||||
m_port2_latch = 0;
|
||||
m_port0_latch = 0;
|
||||
|
||||
m_gpio_o = 0;
|
||||
m_irq_enable = 0;
|
||||
m_irq_pending = 0;
|
||||
|
||||
m_xa_cmd = 0;
|
||||
m_xa_ret0 = 0;
|
||||
m_xa_ret1 = 0;
|
||||
m_num_params = 0;
|
||||
|
||||
m_port0_dat = 0;
|
||||
m_port1_dat = 0;
|
||||
m_port2_dat = 0;
|
||||
m_port3_dat = 0;
|
||||
|
||||
}
|
||||
|
||||
void igs_fear_state::draw_sprite(bitmap_ind16 &bitmap, const rectangle &cliprect, int xpos, int ypos, int height, int width, int palette, int flipx, int romoffset)
|
||||
{
|
||||
if ((romoffset != 0) && (romoffset != 0xffffffff))
|
||||
{
|
||||
//logerror("x=%d, y=%d, w=%d pix, h=%d pix, c=0x%02x, romoffset=0x%08x\n", xpos, ypos, width, height, palette, romoffset << 2);
|
||||
//LOGMASKED(LOG_DEBUG, "x=%d, y=%d, w=%d pix, h=%d pix, c=0x%02x, romoffset=0x%08x\n", xpos, ypos, width, height, palette, romoffset << 2);
|
||||
const u8 *gfxrom = &m_gfxrom[romoffset << 2];
|
||||
const int x_base = flipx ? (xpos + width - 1) : xpos;
|
||||
const int x_inc = flipx ? (-1) : 1;
|
||||
@ -235,11 +310,11 @@ INPUT_PORTS_START( superkds )
|
||||
PORT_INCLUDE ( fear )
|
||||
|
||||
PORT_MODIFY("DSW1")
|
||||
PORT_DIPNAME( 0x03, 0x00, "Scene" ) PORT_DIPLOCATION("SW1:1,2")
|
||||
PORT_DIPNAME( 0x03, 0x01, "Scene" ) PORT_DIPLOCATION("SW1:1,2")
|
||||
PORT_DIPSETTING( 0x03, "Volcano" )
|
||||
PORT_DIPSETTING( 0x02, "Jungle" )
|
||||
PORT_DIPSETTING( 0x01, "Ice Field" )
|
||||
PORT_DIPSETTING( 0x00, "Ice Field" )
|
||||
PORT_DIPSETTING( 0x00, "Ice Field (duplicate)" )
|
||||
PORT_DIPNAME( 0x04, 0x00, "Ticket" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
@ -278,7 +353,7 @@ INPUT_PORTS_START( superkds )
|
||||
PORT_DIPSETTING( 0x00, "Table32" )
|
||||
|
||||
PORT_MODIFY("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x00, "Free Play" ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Free Play" ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x06, 0x06, "Coin/Credit" ) PORT_DIPLOCATION("SW2:2,3")
|
||||
@ -305,15 +380,19 @@ INPUT_PORTS_END
|
||||
|
||||
void igs_fear_state::sound_irq(int state)
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "sound irq\n");
|
||||
if (state)
|
||||
m_xa->set_input_line(XA_EXT_IRQ2, ASSERT_LINE);
|
||||
}
|
||||
|
||||
void igs_fear_state::vblank_irq(int state)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->pulse_input_line(ARM7_FIRQ_LINE, m_maincpu->minimum_quantum_time());
|
||||
if (m_screen->frame_number() & 1)
|
||||
m_maincpu->pulse_input_line(ARM7_FIRQ_LINE, m_maincpu->minimum_quantum_time());
|
||||
}
|
||||
|
||||
u32 igs_fear_state::igs027_gpio_r(offs_t offset)
|
||||
u32 igs_fear_state::igs027_gpio_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
u32 data = ~u32(0);
|
||||
switch (offset * 4)
|
||||
@ -326,7 +405,12 @@ u32 igs_fear_state::igs027_gpio_r(offs_t offset)
|
||||
data = 0x2000 | (u32(ret) << 3);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_gpio_r %04x (%08x)\n", machine().describe_context(), offset * 4, mem_mask);
|
||||
break;
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -337,6 +421,10 @@ void igs_fear_state::igs027_gpio_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
case 0x18:
|
||||
m_gpio_o = data;
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_gpio_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -373,20 +461,24 @@ void igs_fear_state::igs027_periph_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
case 0x100:
|
||||
// TODO: verify the timer interval
|
||||
m_timer0->adjust(attotime::from_hz(data), 0, attotime::from_hz(data));
|
||||
m_timer0->adjust(attotime::from_hz(data / 2), 0, attotime::from_hz(data / 2));
|
||||
break;
|
||||
|
||||
case 0x104:
|
||||
m_timer1->adjust(attotime::from_hz(data), 0, attotime::from_hz(data));
|
||||
m_timer1->adjust(attotime::from_hz(data / 2), 0, attotime::from_hz(data / 2));
|
||||
break;
|
||||
|
||||
case 0x200:
|
||||
m_irq_enable = data;
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_periph_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
u32 igs_fear_state::igs027_periph_r(offs_t offset)
|
||||
u32 igs_fear_state::igs027_periph_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
u32 data = ~u32(0);
|
||||
switch (offset * 4)
|
||||
@ -395,12 +487,17 @@ u32 igs_fear_state::igs027_periph_r(offs_t offset)
|
||||
data = m_irq_pending;
|
||||
m_irq_pending = 0xff;
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_periph_r %04x (%08x)\n", machine().describe_context(), offset * 4, mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
// TODO: ICS2115 & trackball support in XA
|
||||
u32 igs_fear_state::xa_r(offs_t offset)
|
||||
// TODO: trackball support in XA
|
||||
u32 igs_fear_state::xa_r(offs_t offset, u32 mem_mask)
|
||||
{
|
||||
u32 data = ~u32(0);
|
||||
|
||||
@ -408,6 +505,8 @@ u32 igs_fear_state::xa_r(offs_t offset)
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
data = m_xa_ret0;
|
||||
// TODO: This should be remove when we implement serial trackball support in XA
|
||||
if (m_xa_cmd == 0xa301)
|
||||
{
|
||||
switch (m_trackball_cnt++)
|
||||
@ -444,7 +543,7 @@ u32 igs_fear_state::xa_r(offs_t offset)
|
||||
break;
|
||||
}
|
||||
case 0x80:
|
||||
data = 0;
|
||||
data = m_xa_ret1 << 16;
|
||||
break;
|
||||
}
|
||||
return data;
|
||||
@ -452,10 +551,26 @@ u32 igs_fear_state::xa_r(offs_t offset)
|
||||
|
||||
void igs_fear_state::xa_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
m_xa_cmd = data;
|
||||
|
||||
if (offset == 0)
|
||||
{
|
||||
m_xa_cmd = data;
|
||||
igs027_trigger_irq(3);
|
||||
m_num_params--;
|
||||
|
||||
if (m_num_params <= 0)
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "---------------m_xa_cmd is %02x size %02x\n", (data & 0xff00)>>8, data & 0xff);
|
||||
m_num_params = data & 0xff;
|
||||
}
|
||||
else
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "-------------------------- param %04x\n", data & 0xffff);
|
||||
}
|
||||
m_xa->set_input_line(XA_EXT_IRQ0, ASSERT_LINE);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled xa_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
@ -466,6 +581,116 @@ void igs_fear_state::cpld_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
case 0x8:
|
||||
m_ticket->motor_w(BIT(data, 7));
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGMASKED(LOG_DEBUG, "%s: unhandled cpld_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
u8 igs_fear_state::mcu_p0_r()
|
||||
{
|
||||
u8 ret = m_port0_latch;
|
||||
LOGMASKED(LOG_DEBUG, "%s: COMMAND READ LOWER mcu_p0_r() returning %02x with port3 as %02x\n", machine().describe_context(), ret, m_port3_dat);
|
||||
return ret;
|
||||
}
|
||||
|
||||
u8 igs_fear_state::mcu_p1_r()
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p1_r()\n", machine().describe_context());
|
||||
return m_port1_dat; // superkds XA will end up failing returning port1 dat for now, but not attempt to play any sounds otherwise?
|
||||
}
|
||||
|
||||
u8 igs_fear_state::mcu_p2_r()
|
||||
{
|
||||
u8 ret = m_port2_latch;
|
||||
LOGMASKED(LOG_DEBUG, "%s: COMMAND READ mcu_p2_r() returning %02x with port3 as %02x\n", machine().describe_context(), ret, m_port3_dat);
|
||||
return m_port2_latch;
|
||||
}
|
||||
|
||||
u8 igs_fear_state::mcu_p3_r()
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p3_r()\n", machine().describe_context());
|
||||
return m_port3_dat;
|
||||
}
|
||||
|
||||
static int posedge(uint32_t oldval, uint32_t val, int bit)
|
||||
{
|
||||
return (!BIT(oldval, bit)) && (BIT(val, bit));
|
||||
}
|
||||
|
||||
static int negedge(uint32_t oldval, uint32_t val, int bit)
|
||||
{
|
||||
return (BIT(oldval, bit)) && (!BIT(val, bit));
|
||||
}
|
||||
|
||||
void igs_fear_state::mcu_p0_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p0_w() %02x with port 3 as %02x and port 1 as %02x\n", machine().describe_context(), data, m_port3_dat, m_port1_dat);
|
||||
m_port0_dat = data;
|
||||
}
|
||||
|
||||
void igs_fear_state::mcu_p1_w(uint8_t data)
|
||||
{
|
||||
u8 olddata = m_port1_dat;
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p1_w() %02x\n", machine().describe_context(), data);
|
||||
m_port1_dat = data;
|
||||
|
||||
if (posedge(olddata, m_port1_dat, 3))
|
||||
{
|
||||
igs027_trigger_irq(3);
|
||||
}
|
||||
}
|
||||
|
||||
void igs_fear_state::mcu_p2_w(uint8_t data)
|
||||
{
|
||||
m_port2_dat = data;
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p2_w() %02x with port 3 as %02x\n", machine().describe_context(), data, m_port3_dat);
|
||||
}
|
||||
|
||||
void igs_fear_state::mcu_p3_w(uint8_t data)
|
||||
{
|
||||
u8 oldport3 = m_port3_dat;
|
||||
m_port3_dat = data;
|
||||
LOGMASKED(LOG_DEBUG, "%s: mcu_p3_w() %02x - do latches oldport3 %02x newport3 %02x\n", machine().describe_context(), data, oldport3, m_port3_dat);
|
||||
|
||||
// high->low transition on bit 0x80 must read into latches!
|
||||
if (negedge(oldport3, m_port3_dat, 7))
|
||||
{
|
||||
if (!BIT(m_port3_dat, 4))
|
||||
{
|
||||
m_port0_latch = m_ics->read(m_port1_dat & 7);
|
||||
LOGMASKED(LOG_DEBUG, "read from ics [%d] = [%02x]\n", m_port1_dat & 7, m_port0_latch);
|
||||
}
|
||||
else if (!BIT(m_port3_dat, 5))
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "read command [%d] = [%04x]\n", m_port1_dat & 7, m_xa_cmd);
|
||||
m_port2_latch = (m_xa_cmd & 0xff00) >> 8;
|
||||
m_port0_latch = m_xa_cmd & 0x00ff;
|
||||
}
|
||||
}
|
||||
|
||||
if (negedge(oldport3, m_port3_dat, 6))
|
||||
{
|
||||
if (!BIT(m_port3_dat, 4))
|
||||
{
|
||||
LOGMASKED(LOG_DEBUG, "write to ics [%d] = [%02x]\n", m_port1_dat & 7, m_port0_dat);
|
||||
m_ics->write(m_port1_dat & 7, m_port0_dat);
|
||||
}
|
||||
else if (!BIT(m_port3_dat, 5))
|
||||
{
|
||||
uint32_t dat = (m_port2_dat << 8) | m_port0_dat;
|
||||
LOGMASKED(LOG_DEBUG, "write command [%d] = [%04x]\n", m_port1_dat & 7, dat);
|
||||
switch (m_port1_dat & 7)
|
||||
{
|
||||
case 1:
|
||||
m_xa_ret1 = dat;
|
||||
break;
|
||||
case 2:
|
||||
m_xa_ret0 = dat;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -475,15 +700,25 @@ void igs_fear_state::igs_fear(machine_config &config)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &igs_fear_state::main_map);
|
||||
|
||||
MX10EXA(config, m_xa, 50000000/3); // MX10EXAQC (Philips 80C51 XA)
|
||||
m_xa->port_in_cb<0>().set(FUNC(igs_fear_state::mcu_p0_r));
|
||||
m_xa->port_in_cb<1>().set(FUNC(igs_fear_state::mcu_p1_r));
|
||||
m_xa->port_in_cb<2>().set(FUNC(igs_fear_state::mcu_p2_r));
|
||||
m_xa->port_in_cb<3>().set(FUNC(igs_fear_state::mcu_p3_r));
|
||||
m_xa->port_out_cb<0>().set(FUNC(igs_fear_state::mcu_p0_w));
|
||||
m_xa->port_out_cb<1>().set(FUNC(igs_fear_state::mcu_p1_w));
|
||||
m_xa->port_out_cb<2>().set(FUNC(igs_fear_state::mcu_p2_w));
|
||||
m_xa->port_out_cb<3>().set(FUNC(igs_fear_state::mcu_p3_w));
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
|
||||
screen.set_size(640, 480);
|
||||
screen.set_visarea(0, 640-1, 0, 480-1);
|
||||
screen.set_screen_update(FUNC(igs_fear_state::screen_update));
|
||||
screen.screen_vblank().set(FUNC(igs_fear_state::vblank_irq));
|
||||
screen.set_palette(m_palette);
|
||||
config.set_maximum_quantum(attotime::from_hz(600));
|
||||
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(60);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
|
||||
m_screen->set_size(640, 480);
|
||||
m_screen->set_visarea(0, 640-1, 0, 480-1);
|
||||
m_screen->set_screen_update(FUNC(igs_fear_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(igs_fear_state::vblank_irq));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette, palette_device::BLACK).set_format(palette_device::xBGR_555, 0x4000/2);
|
||||
|
||||
@ -493,9 +728,10 @@ void igs_fear_state::igs_fear(machine_config &config)
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
ics2115_device &ics(ICS2115(config, "ics", 33.8688_MHz_XTAL)); // TODO : Correct?
|
||||
ics.irq().set(FUNC(igs_fear_state::sound_irq));
|
||||
ics.add_route(ALL_OUTPUTS, "mono", 5.0);
|
||||
|
||||
ICS2115(config, m_ics, 33.8688_MHz_XTAL); // TODO : Correct?
|
||||
m_ics->irq().set(FUNC(igs_fear_state::sound_irq));
|
||||
m_ics->add_route(ALL_OUTPUTS, "mono", 5.0);
|
||||
}
|
||||
|
||||
|
||||
@ -583,6 +819,6 @@ void igs_fear_state::init_igs_icescape()
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
GAME( 2005, superkds, 0, igs_fear, superkds, igs_fear_state, init_igs_superkds, ROT0, "IGS", "Super Kids (S019CN)", MACHINE_IS_SKELETON )
|
||||
GAME( 2006, fearless, 0, igs_fear, fear, igs_fear_state, init_igs_fear, ROT0, "IGS", "Fearless Pinocchio (V101US)", MACHINE_IS_SKELETON )
|
||||
GAME( 2005, superkds, 0, igs_fear, superkds, igs_fear_state, init_igs_superkds, ROT0, "IGS", "Super Kids (S019CN)", 0 )
|
||||
GAME( 2006, fearless, 0, igs_fear, fear, igs_fear_state, init_igs_fear, ROT0, "IGS", "Fearless Pinocchio (V101US)", 0 )
|
||||
GAME( 2006, icescape, 0, igs_fear, fear, igs_fear_state, init_igs_icescape, ROT0, "IGS", "Icescape (V104FA)", MACHINE_IS_SKELETON ) // IGS FOR V104FA 2006-11-02
|
||||
|
||||
@ -85,7 +85,7 @@ protected:
|
||||
private:
|
||||
optional_shared_ptr<u32> m_igs_mainram;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
optional_device<xa_cpu_device> m_xa;
|
||||
optional_device<mx10exa_cpu_device> m_xa;
|
||||
required_device<igs017_igs031_device> m_igs017_igs031;
|
||||
|
||||
void vblank_irq(int state);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user