From: Atari Ace [mailto:atari_ace@verizon.net]

Subject: [patch] Add nmk112 initialization

Here's a small patch to add initialization to machine/nmk112.c.  This
resolves a multi-session audio problem reported for donpachi by
Iaspis.

--

From: Atari Ace [mailto:atari_ace@verizon.net]
Subject: [patch] Fix n64 multi-session problems

This patch adds some variable initialization to machine/n64.c to fix
running starsldr multi-session (reported by Firewave/subb).  The fix
is a strict improvment on the current situation, but there are likely
still some remaining multi-session/reset issues with the driver.

src/mame/drivers/cave.c

@@ -4094,6 +4094,8 @@ static void init_cave(running_machine *machine)
 	time_vblank_irq = 100;
 
 	irq_level = 1;
+
+	NMK112_init(0);
 }
 
 static DRIVER_INIT( agallet )
@@ -4161,7 +4163,7 @@ static DRIVER_INIT( donpachi )
 	cave_spritetype = 1;	// "different" sprites (no zooming?)
 	time_vblank_irq = 90;
 
-	NMK112_set_paged_table(0, 0);	// chip #0 (music) is not paged
+	NMK112_init(1<<0);	// chip #0 (music) is not paged
 }
 
 static DRIVER_INIT( esprade )

src/mame/drivers/nmk16.c

@@ -259,6 +259,7 @@ VIDEO_UPDATE( firehawk );
 
 static MACHINE_RESET( nmk16 )
 {
+	NMK112_init(0);
 }
 
 static MACHINE_RESET( NMK004 )

src/mame/drivers/powerins.c

@@ -329,6 +329,7 @@ GFXDECODE_END
 static MACHINE_RESET( powerins )
 {
 	oki_bank = -1;	// samples bank "unitialised"
+	NMK112_init(0);
 }
 
 

src/mame/drivers/quizpani.c

@@ -241,12 +241,19 @@ static GFXDECODE_START( quizpani )
 GFXDECODE_END
 
 
+static MACHINE_RESET( quizpani )
+{
+	NMK112_init(0);
+}
+
 static MACHINE_DRIVER_START( quizpani )
 	MDRV_CPU_ADD(M68000, 10000000)
 	MDRV_CPU_PROGRAM_MAP(quizpani_readmem,quizpani_writemem)
 	MDRV_CPU_VBLANK_INT(irq4_line_hold,1)
 	MDRV_CPU_PERIODIC_INT(irq1_line_hold,164) // music tempo
 
+	MDRV_MACHINE_RESET( quizpani )
+
 	MDRV_SCREEN_REFRESH_RATE(60)
 	MDRV_SCREEN_VBLANK_TIME(DEFAULT_60HZ_VBLANK_DURATION)
 

src/mame/drivers/toaplan2.c

@@ -431,6 +431,7 @@ static MACHINE_RESET( bgaregga )
 	current_bank = 2;
 	memory_set_bankptr(1, &Z80[0x10000]);
 
+	NMK112_init(0);
 	MACHINE_RESET_CALL(toaplan2);
 }
 

src/mame/machine/n64.c

@@ -1549,6 +1549,55 @@ void n64_machine_reset(void)
 	UINT32 *cart = (UINT32*)memory_region(REGION_USER2);
 	UINT64 boot_checksum;
 
+	mi_version = 0;
+	mi_interrupt = 0;
+	mi_intr_mask = 0;
+
+	sp_mem_addr = 0;
+	sp_dram_addr = 0;
+	sp_dma_length = 0;
+	sp_dma_count = 0;
+	sp_dma_skip = 0;
+	sp_semaphore = 0;
+
+	dp_start = 0;
+	dp_end = 0;
+	dp_current = 0;
+	dp_status = 0;
+
+	n64_vi_width = 0;
+	n64_vi_origin = 0;
+	n64_vi_control = 0;
+	n64_vi_burst = n64_vi_vsync = n64_vi_hsync = n64_vi_leap = n64_vi_hstart = n64_vi_vstart = 0;
+	n64_vi_intr = n64_vi_vburst = n64_vi_xscale = n64_vi_yscale = 0;
+
+	ai_dram_addr = 0;
+	ai_len = 0 ;
+	ai_control = 0;
+	ai_dacrate = 0;
+	ai_bitrate = 0;
+	ai_status = 0;
+
+	memset(audio_fifo, 0, sizeof(audio_fifo));
+	audio_fifo_wpos = 0;
+	audio_fifo_rpos = 0;
+	audio_fifo_num = 0;
+
+	pi_dram_addr = 0;
+	pi_cart_addr = 0;
+	pi_first_dma = 1;
+
+	memset(pif_ram, 0, sizeof(pif_ram));
+	memset(pif_cmd, 0, sizeof(pif_cmd));
+	si_dram_addr = 0;
+	si_pif_addr = 0;
+	si_status = 0;
+
+	memset(eeprom, 0, sizeof(eeprom));
+	memset(mempack, 0, sizeof(mempack));
+
+	cic_status = 0;
+
 	cpunum_set_info_int(0, CPUINFO_INT_MIPS3_DRC_OPTIONS, MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
 
 		/* configure fast RAM regions for DRC */

src/mame/machine/nmk112.c

@@ -15,19 +15,21 @@
 #define BANKSIZE 0x10000
 
 /* which chips have their sample address table divided into pages */
-static int has_paged_table[MAXCHIPS] = { 1, 1 };
+static UINT8 page_mask;
 
-static UINT8 current_bank[8] = { ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0 };
+static UINT8 current_bank[8];
 
-void NMK112_set_paged_table( int chip, int value )
+void NMK112_init(UINT8 disable_page_mask)
 {
-	has_paged_table[chip] = value;
+	memset(current_bank, ~0, sizeof(current_bank));
+	page_mask = ~disable_page_mask;
 }
 
 WRITE8_HANDLER( NMK112_okibank_w )
 {
 	int chip	=	(offset & 4) >> 2;
 	int banknum	=	offset & 3;
+	int paged	=	(page_mask & (1 << chip));
 
 	UINT8 *rom	=	memory_region(REGION_SOUND1 + chip);
 	int size			=	memory_region_length(REGION_SOUND1 + chip) - 0x40000;
@@ -37,13 +39,13 @@ WRITE8_HANDLER( NMK112_okibank_w )
 	current_bank[offset] = data;
 
 	/* copy the samples */
-	if ((has_paged_table[chip]) && (banknum == 0))
+	if ((paged) && (banknum == 0))
 		memcpy(rom + 0x400, rom + 0x40000 + bankaddr+0x400, BANKSIZE-0x400);
 	else
 		memcpy(rom + banknum * BANKSIZE, rom + 0x40000 + bankaddr, BANKSIZE);
 
 	/* also copy the sample address table, if it is paged on this chip */
-	if (has_paged_table[chip])
+	if (paged)
 	{
 		rom += banknum * TABLESIZE;
 		memcpy(rom, rom + 0x40000 + bankaddr, TABLESIZE);

src/mame/machine/nmk112.h

@@ -1,7 +1,7 @@
 #ifndef NMK112_H
 #define NMK112_H
 
-void NMK112_set_paged_table( int chip, int value );
+void NMK112_init(UINT8 disable_page_mask);
 
 WRITE8_HANDLER( NMK112_okibank_w );
 WRITE16_HANDLER( NMK112_okibank_lsb_w );