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https://github.com/holub/mame
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Standardized protection accessors for model 2 & model 3 5881 device (nw)
This commit is contained in:
angelosa
parent
cd1c29a3d1
commit
a246b83834
@ -1280,70 +1280,6 @@ WRITE32_MEMBER(model2_state::model2_serial_w)
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}
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}
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/* Protection handling */
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READ32_MEMBER(model2_state::model2_5881prot_r)
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{
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uint32_t retval = 0;
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if (offset == 0x0000/4)
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{
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// status: bit 0 = 1 for busy, 0 for ready
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retval = 0; // we're always ready
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}
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else if (offset == 0x000e/4)
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{
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if (first_read == 1)
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{
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// the RAM based schemes expect a dummy value before the start of the stream
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// to match the previous simulation (dynamite cop) I use 0x0000 here
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first_read = 0;
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retval = 0;
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}
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else
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{
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uint8_t* base;
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retval = m_cryptdevice->do_decrypt(base);
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retval = ((retval & 0xff00) >> 8) | ((retval & 0x00ff) << 8);
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retval <<= 16;
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}
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}
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else logerror("Unhandled Protection READ @ %x mask %x (PC=%x)\n", offset, mem_mask, m_maincpu->pc());
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logerror("model2_5881prot_r %08x: %08x (%08x)\n", offset*4, retval, mem_mask);
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return retval;
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}
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WRITE32_MEMBER(model2_state::model2_5881prot_w)
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{
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logerror("model2_5881prot_w %08x: %08x (%08x)\n", offset*4, data, mem_mask);
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if (offset == 0x0008/4)
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{
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// Zero Gunner uses this, it's encrypted data in prot.RAM consists of several small chunks, selected using low address
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// so far this is only known game with 315-5881 which uses not 0 offset in prot.RAM
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if (mem_mask == 0x0000ffff)
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m_cryptdevice->set_addr_low(data&0xffff);
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else if (mem_mask == 0xffff0000)
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{
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m_cryptdevice->set_addr_high(0);
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if (data != 0)
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printf("model2_5881prot_w not zero high address %08x (%08x)\n", data, mem_mask);
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}
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first_read = 1;
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}
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else if (offset == 0x000c/4)
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{
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printf("subkey %08x (%08x)\n", data, mem_mask);
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m_cryptdevice->set_subkey(data&0xffff);
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}
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else printf("Unhandled Protection WRITE %x @ %x mask %x (PC=%x)\n", data, offset, mem_mask, m_maincpu->pc());
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}
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/* Daytona "To The MAXX" PIC protection simulation */
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@ -1529,6 +1465,12 @@ ADDRESS_MAP_START(model2_state::model2_base_mem)
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AM_RANGE(0x12800000, 0x1281ffff) AM_READWRITE16(lumaram_r,lumaram_w,0x0000ffff) // polygon "luma" RAM
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ADDRESS_MAP_END
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/* common map for 5881 protection */
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ADDRESS_MAP_START(model2_state::model2_5881_mem)
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AM_RANGE(0x01d80000,0x01d8ffff) AM_RAM
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AM_RANGE(0x01d90000,0x01d9ffff) AM_DEVICE16("315_5881", sega_315_5881_crypt_device, iomap_le, 0xffffffff)
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ADDRESS_MAP_END
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READ8_MEMBER(model2_state::virtuacop_lightgun_r)
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{
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uint8_t res;
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@ -1650,6 +1592,11 @@ ADDRESS_MAP_START(model2a_state::model2a_crx_mem)
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AM_RANGE(0x01c80000, 0x01c80003) AM_READWRITE(model2_serial_r, model2_serial_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_START(model2a_state::model2a_5881_mem)
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AM_IMPORT_FROM(model2a_crx_mem)
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AM_IMPORT_FROM(model2_5881_mem)
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ADDRESS_MAP_END
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/* 2B-CRX overrides */
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ADDRESS_MAP_START(model2b_state::model2b_crx_mem)
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AM_IMPORT_FROM(model2_base_mem)
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@ -1688,6 +1635,11 @@ ADDRESS_MAP_START(model2b_state::model2b_crx_mem)
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AM_RANGE(0x01c80000, 0x01c80003) AM_READWRITE(model2_serial_r, model2_serial_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_START(model2b_state::model2b_5881_mem)
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AM_IMPORT_FROM(model2b_crx_mem)
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AM_IMPORT_FROM(model2_5881_mem)
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ADDRESS_MAP_END
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/* 2C-CRX overrides */
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ADDRESS_MAP_START(model2c_state::model2c_crx_mem)
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AM_IMPORT_FROM(model2_base_mem)
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@ -1715,6 +1667,11 @@ ADDRESS_MAP_START(model2c_state::model2c_crx_mem)
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AM_RANGE(0x01c80000, 0x01c80003) AM_READWRITE(model2_serial_r, model2_serial_w )
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ADDRESS_MAP_END
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ADDRESS_MAP_START(model2c_state::model2c_5881_mem)
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AM_IMPORT_FROM(model2c_crx_mem)
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AM_IMPORT_FROM(model2_5881_mem)
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ADDRESS_MAP_END
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/* Input definitions */
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#define MODEL2_PLAYER_INPUTS(_n_, _b1_, _b2_, _b3_, _b4_) \
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@ -2404,6 +2361,10 @@ uint16_t model2_state::crypt_read_callback(uint32_t addr)
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MACHINE_CONFIG_START(model2a_state::model2a_5881)
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model2a(config);
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(model2a_5881_mem)
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MCFG_DEVICE_ADD("315_5881", SEGA315_5881_CRYPT, 0)
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MCFG_SET_READ_CALLBACK(model2_state, crypt_read_callback)
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MACHINE_CONFIG_END
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@ -2467,6 +2428,10 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(model2b_state::model2b_5881)
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model2b(config);
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(model2b_5881_mem)
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MCFG_DEVICE_ADD("315_5881", SEGA315_5881_CRYPT, 0)
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MCFG_SET_READ_CALLBACK(model2_state, crypt_read_callback)
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MACHINE_CONFIG_END
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@ -2556,6 +2521,10 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(model2c_state::model2c_5881)
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model2c(config);
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(model2c_5881_mem)
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MCFG_DEVICE_ADD("315_5881", SEGA315_5881_CRYPT, 0)
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MCFG_SET_READ_CALLBACK(model2_state, crypt_read_callback)
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MACHINE_CONFIG_END
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@ -6077,17 +6046,8 @@ ROM_START( desert ) /* Desert Tank, Model 2 */
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MODEL2_CPU_BOARD
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ROM_END
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DRIVER_INIT_MEMBER(model2_state,genprot)
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{
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//std::string key = parameter(":315_5881:key");
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m_maincpu->space(AS_PROGRAM).install_ram(0x01d80000, 0x01d8ffff);
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m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x01d90000, 0x01d9ffff, read32_delegate(FUNC(model2_state::model2_5881prot_r), this), write32_delegate(FUNC(model2_state::model2_5881prot_w), this));
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}
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DRIVER_INIT_MEMBER(model2_state,pltkids)
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{
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DRIVER_INIT_CALL(genprot);
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// fix bug in program: it destroys the interrupt table and never fixes it
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uint32_t *ROM = (uint32_t *)memregion("maincpu")->base();
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ROM[0x730/4] = 0x08000004;
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@ -6095,8 +6055,6 @@ DRIVER_INIT_MEMBER(model2_state,pltkids)
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DRIVER_INIT_MEMBER(model2_state,zerogun)
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{
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DRIVER_INIT_CALL(genprot);
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// fix bug in program: it destroys the interrupt table and never fixes it
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uint32_t *ROM = (uint32_t *)memregion("maincpu")->base();
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ROM[0x700/4] = 0x08000004;
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@ -6104,8 +6062,6 @@ DRIVER_INIT_MEMBER(model2_state,zerogun)
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DRIVER_INIT_MEMBER(model2_state,sgt24h)
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{
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// DRIVER_INIT_CALL(genprot);
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uint32_t *ROM = (uint32_t *)memregion("maincpu")->base();
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ROM[0x56578/4] = 0x08000004;
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//ROM[0x5b3e8/4] = 0x08000004;
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@ -6161,8 +6117,8 @@ GAME( 1997, zeroguna, zerogun, model2a_5881, model2, model2a_state, zerogun,
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GAME( 1997, zerogunaj, zerogun, model2a_5881, model2, model2a_state, zerogun, ROT0, "Psikyo", "Zero Gunner (Japan, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, motoraid, 0, manxtt, motoraid, model2a_state, 0, ROT0, "Sega", "Motor Raid - Twin", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, motoraiddx,motoraid,manxtt, motoraid, model2a_state, 0, ROT0, "Sega", "Motor Raid - Twin/DX", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcop, 0, model2a_5881, model2, model2a_state, genprot, ROT0, "Sega", "Dynamite Cop (Export, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dyndeka2, dynamcop,model2a_5881, model2, model2a_state, genprot, ROT0, "Sega", "Dynamite Deka 2 (Japan, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcop, 0, model2a_5881, model2, model2a_state, 0, ROT0, "Sega", "Dynamite Cop (Export, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dyndeka2, dynamcop,model2a_5881, model2, model2a_state, 0, ROT0, "Sega", "Dynamite Deka 2 (Japan, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, pltkidsa, pltkids, model2a_5881, model2, model2a_state, pltkids, ROT0, "Psikyo", "Pilot Kids (Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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// Model 2B-CRX (SHARC, SCSP sound board)
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@ -6189,8 +6145,8 @@ GAME( 1997, dynabb97, 0, model2b, dynabb, model2b_state, 0,
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GAME( 1997, overrevb, overrev, indy500, srallyc, model2b_state, 0, ROT0, "Jaleco", "Over Rev (Model 2B, Revision B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, zerogun, 0, model2b_5881, model2, model2b_state, zerogun, ROT0, "Psikyo", "Zero Gunner (Export, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, zerogunj, zerogun, model2b_5881, model2, model2b_state, zerogun, ROT0, "Psikyo", "Zero Gunner (Japan, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcopb, dynamcop, model2b_5881, model2, model2b_state, genprot, ROT0, "Sega", "Dynamite Cop (Export, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dyndeka2b, dynamcop, model2b_5881, model2, model2b_state, genprot, ROT0, "Sega", "Dynamite Deka 2 (Japan, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcopb, dynamcop, model2b_5881, model2, model2b_state, 0, ROT0, "Sega", "Dynamite Cop (Export, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dyndeka2b, dynamcop, model2b_5881, model2, model2b_state, 0, ROT0, "Sega", "Dynamite Deka 2 (Japan, Model 2B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, pltkids, 0, model2b_5881, model2, model2b_state, pltkids, ROT0, "Psikyo", "Pilot Kids (Model 2B, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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// Model 2C-CRX (TGPx4, SCSP sound board)
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@ -6208,4 +6164,4 @@ GAME( 1997, topskatr, 0, model2c, model2, model2c_state, 0,
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GAME( 1997, topskatru, topskatr, model2c, model2, model2c_state, 0, ROT0, "Sega", "Top Skater (USA, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, topskatruo,topskatr, model2c, model2, model2c_state, 0, ROT0, "Sega", "Top Skater (USA)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1997, topskatrj, topskatr, model2c, model2, model2c_state, 0, ROT0, "Sega", "Top Skater (Japan)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcopc, dynamcop, model2c_5881, model2, model2c_state, genprot, ROT0, "Sega", "Dynamite Cop (USA, Model 2C)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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GAME( 1998, dynamcopc, dynamcop, model2c_5881, model2, model2c_state, 0, ROT0, "Sega", "Dynamite Cop (USA, Model 2C)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
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@ -1749,71 +1749,6 @@ WRITE8_MEMBER(model3_state::model3_sound_w)
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}
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}
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READ64_MEMBER(model3_state::model3_5881prot_r)
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{
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uint64_t retvalue = 0xffffffffffffffffU;
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if (offset == 0x00 / 8)
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{
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retvalue = 0;
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}
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else if (offset == 0x18 / 8)
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{
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if (first_read == 1)
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{
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// the RAM based schemes expect a dummy value before the start of the stream
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// to match the previous simulation I use 0xffff here
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first_read = 0;
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retvalue = 0xffff << 16;
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}
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else
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{
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uint8_t* base;
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retvalue = m_cryptdevice->do_decrypt(base);
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// retvalue = ((retvalue & 0xff00) >> 8) | ((retvalue & 0x00ff) << 8); // don't endian swap the return value on this hardware
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retvalue <<= 16;
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}
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// printf("model3_5881prot_r offset %08x : %08x%08x (%08x%08x)\n", offset * 8, (uint32_t)(retvalue >> 32), (uint32_t)(retvalue & 0xffffffff), (uint32_t)(mem_mask >> 32), (uint32_t)(mem_mask & 0xffffffff));
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}
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else
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{
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printf("model3_5881prot_r offset %08x : %08x%08x (%08x%08x)\n", offset * 8, (uint32_t)(retvalue >> 32), (uint32_t)(retvalue & 0xffffffff), (uint32_t)(mem_mask >> 32), (uint32_t)(mem_mask & 0xffffffff));
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}
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return retvalue;
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}
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WRITE64_MEMBER(model3_state::model3_5881prot_w)
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{
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if (offset == 0x10 / 8)
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{
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// code is copied to RAM first, so base address is always 0
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m_cryptdevice->set_addr_low(0);
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m_cryptdevice->set_addr_high(0);
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if (data != 0)
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printf("model3_5881prot_w address isn't 0?\n");
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first_read = 1;
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}
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else if (offset == 0x18 / 8)
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{
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uint16_t subkey = data >> (32 + 16);
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subkey = ((subkey & 0xff00) >> 8) | ((subkey & 0x00ff) << 8); // endian swap the sub-key for this hardware
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printf("model3_5881prot_w setting subkey %04x\n", subkey);
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m_cryptdevice->set_subkey(subkey);
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}
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else
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{
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printf("model3_5881prot_w offset %08x : %08x%08x (%08x%08x)\n", offset * 8, (uint32_t)(data >> 32), (uint32_t)(data & 0xffffffff), (uint32_t)(mem_mask >> 32), (uint32_t)(mem_mask & 0xffffffff));
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}
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}
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WRITE64_MEMBER(model3_state::daytona2_rombank_w)
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{
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if (ACCESSING_BITS_56_63)
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@ -1852,6 +1787,12 @@ ADDRESS_MAP_START(model3_state::model3_mem)
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AM_RANGE(0xc0000000, 0xc003ffff) AM_DEVICE32("comm_board", m3comm_device, m3_map, 0xffffffffffffffffU )
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ADDRESS_MAP_END
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ADDRESS_MAP_START(model3_state::model3_5881_mem)
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AM_IMPORT_FROM( model3_mem )
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AM_RANGE(0xf0180000, 0xf019ffff) AM_MIRROR(0x0e000000) AM_RAM
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AM_RANGE(0xf01a0000, 0xf01a003f) AM_MIRROR(0x0e000000) AM_DEVICE16("315_5881", sega_315_5881_crypt_device, iomap_64be, 0xffffffffffffffffU )
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ADDRESS_MAP_END
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static INPUT_PORTS_START( common )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
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@ -5950,8 +5891,26 @@ MACHINE_CONFIG_START(model3_state::model3_20)
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MCFG_M3COMM_ADD("comm_board")
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MACHINE_CONFIG_END
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uint16_t model3_state::crypt_read_callback(uint32_t addr)
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{
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uint16_t dat = 0;
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if (addr < 0x8000)
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{
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dat = m_maincpu->space().read_word((0xf0180000 + 4 * addr)); // every other word is unused in this RAM, probably 32-bit ram on 64-bit bus?
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}
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// dat = ((dat & 0xff00) >> 8) | ((dat & 0x00ff) << 8);
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// printf("reading %04x\n", dat);
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return dat;
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}
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MACHINE_CONFIG_START(model3_state::model3_20_5881)
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model3_20(config);
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(model3_5881_mem)
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MCFG_DEVICE_ADD("315_5881", SEGA315_5881_CRYPT, 0)
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MCFG_SET_READ_CALLBACK(model3_state, crypt_read_callback)
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MACHINE_CONFIG_END
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@ -5996,23 +5955,12 @@ MACHINE_CONFIG_START(model3_state::model3_21)
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MCFG_M3COMM_ADD("comm_board")
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MACHINE_CONFIG_END
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|
||||
uint16_t model3_state::crypt_read_callback(uint32_t addr)
|
||||
{
|
||||
uint16_t dat = 0;
|
||||
if (addr < 0x8000)
|
||||
{
|
||||
dat = m_maincpu->space().read_word((0xf0180000 + 4 * addr)); // every other word is unused in this RAM, probably 32-bit ram on 64-bit bus?
|
||||
}
|
||||
|
||||
// dat = ((dat & 0xff00) >> 8) | ((dat & 0x00ff) << 8);
|
||||
// printf("reading %04x\n", dat);
|
||||
|
||||
return dat;
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(model3_state::model3_21_5881)
|
||||
model3_21(config);
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(model3_5881_mem)
|
||||
|
||||
MCFG_DEVICE_ADD("315_5881", SEGA315_5881_CRYPT, 0)
|
||||
MCFG_SET_READ_CALLBACK(model3_state, crypt_read_callback)
|
||||
MACHINE_CONFIG_END
|
||||
@ -6048,15 +5996,6 @@ void model3_state::interleave_vroms()
|
||||
}
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state, genprot)
|
||||
{
|
||||
// std::string key = parameter(":315_5881:key");
|
||||
|
||||
m_maincpu->space(AS_PROGRAM).install_ram(0xf0180000, 0xf019ffff, 0x0e000000);
|
||||
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xf01a0000, 0xf01a003f, 0, 0x0e000000, 0, read64_delegate(FUNC(model3_state::model3_5881prot_r), this), write64_delegate(FUNC(model3_state::model3_5881prot_w), this) );
|
||||
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,model3_10)
|
||||
{
|
||||
@ -6221,16 +6160,11 @@ DRIVER_INIT_MEMBER(model3_state,vs2)
|
||||
DRIVER_INIT_MEMBER(model3_state,vs298)
|
||||
{
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,vs299)
|
||||
{
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,harley)
|
||||
@ -6243,12 +6177,10 @@ DRIVER_INIT_MEMBER(model3_state,harleya)
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,srally2)
|
||||
{
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
|
||||
|
||||
uint32_t *rom = (uint32_t*)memregion("user1")->base();
|
||||
rom[(0x7c0c4^4)/4] = 0x60000000;
|
||||
rom[(0x7c0c8^4)/4] = 0x60000000;
|
||||
@ -6271,17 +6203,12 @@ DRIVER_INIT_MEMBER(model3_state,swtrilgy)
|
||||
|
||||
rom[(0x043dc^4)/4] = 0x48000090; // skip force feedback setup
|
||||
rom[(0xf6e44^4)/4] = 0x60000000;
|
||||
|
||||
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,swtrilga)
|
||||
{
|
||||
//uint32_t *rom = (uint32_t*)memregion("user1")->base();
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
|
||||
//rom[(0xf6dd0^4)/4] = 0x60000000;
|
||||
}
|
||||
@ -6291,7 +6218,6 @@ DRIVER_INIT_MEMBER(model3_state,von2)
|
||||
m_step20_with_old_real3d = true;
|
||||
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,dirtdvls)
|
||||
@ -6299,7 +6225,6 @@ DRIVER_INIT_MEMBER(model3_state,dirtdvls)
|
||||
m_step20_with_old_real3d = true;
|
||||
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,daytona2)
|
||||
@ -6314,8 +6239,6 @@ DRIVER_INIT_MEMBER(model3_state,daytona2)
|
||||
//rom[(0x6063c4^4)/4] = 0x60000000;
|
||||
//rom[(0x616434^4)/4] = 0x60000000;
|
||||
//rom[(0x69f4e4^4)/4] = 0x60000000;
|
||||
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,dayto2pe)
|
||||
@ -6331,8 +6254,6 @@ DRIVER_INIT_MEMBER(model3_state,dayto2pe)
|
||||
// rom[(0x618b28^4)/4] = 0x60000000; // jump to encrypted code
|
||||
|
||||
// rom[(0x64ca34^4)/4] = 0x60000000; // dec
|
||||
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,spikeout)
|
||||
@ -6342,7 +6263,6 @@ DRIVER_INIT_MEMBER(model3_state,spikeout)
|
||||
|
||||
rom[(0x6059cc^4)/4] = 0x60000000;
|
||||
rom[(0x6059ec^4)/4] = 0x60000000;
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,spikeofe)
|
||||
@ -6352,13 +6272,11 @@ DRIVER_INIT_MEMBER(model3_state,spikeofe)
|
||||
|
||||
rom[(0x6059cc^4)/4] = 0x60000000;
|
||||
rom[(0x6059ec^4)/4] = 0x60000000;
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,eca)
|
||||
{
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
|
||||
// base = 0xffc80000
|
||||
uint32_t *rom = (uint32_t*)memregion("user1")->base();
|
||||
@ -6390,8 +6308,6 @@ DRIVER_INIT_MEMBER(model3_state,oceanhun)
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
|
||||
rom[(0x57995c^4)/4] = 0x60000000; // decrementer
|
||||
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,magtruck)
|
||||
@ -6399,7 +6315,6 @@ DRIVER_INIT_MEMBER(model3_state,magtruck)
|
||||
m_step20_with_old_real3d = true;
|
||||
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(model3_state,lamachin)
|
||||
@ -6407,7 +6322,6 @@ DRIVER_INIT_MEMBER(model3_state,lamachin)
|
||||
m_step20_with_old_real3d = true;
|
||||
|
||||
DRIVER_INIT_CALL(model3_20);
|
||||
DRIVER_INIT_CALL(genprot);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -179,9 +179,6 @@ public:
|
||||
DECLARE_READ32_MEMBER(model2_serial_r);
|
||||
DECLARE_WRITE32_MEMBER(model2o_serial_w);
|
||||
DECLARE_WRITE32_MEMBER(model2_serial_w);
|
||||
DECLARE_READ32_MEMBER(model2_5881prot_r);
|
||||
DECLARE_WRITE32_MEMBER(model2_5881prot_w);
|
||||
int first_read;
|
||||
|
||||
void raster_init(memory_region *texture_rom);
|
||||
void geo_init(memory_region *polygon_rom);
|
||||
@ -210,7 +207,6 @@ public:
|
||||
DECLARE_DRIVER_INIT(overrev);
|
||||
DECLARE_DRIVER_INIT(pltkids);
|
||||
DECLARE_DRIVER_INIT(rchase2);
|
||||
DECLARE_DRIVER_INIT(genprot);
|
||||
DECLARE_DRIVER_INIT(manxttdx);
|
||||
DECLARE_DRIVER_INIT(srallyc);
|
||||
DECLARE_DRIVER_INIT(doa);
|
||||
@ -259,6 +255,7 @@ public:
|
||||
void drive_map(address_map &map);
|
||||
void geo_sharc_map(address_map &map);
|
||||
void model2_base_mem(address_map &map);
|
||||
void model2_5881_mem(address_map &map);
|
||||
void model2_snd(address_map &map);
|
||||
|
||||
uint8_t m_gamma_table[256];
|
||||
@ -334,6 +331,7 @@ public:
|
||||
void model2a_5881(machine_config &config);
|
||||
void srallyc(machine_config &config);
|
||||
void model2a_crx_mem(address_map &map);
|
||||
void model2a_5881_mem(address_map &map);
|
||||
};
|
||||
|
||||
/*****************************
|
||||
@ -355,6 +353,8 @@ public:
|
||||
void indy500(machine_config &config);
|
||||
void rchase2(machine_config &config);
|
||||
void model2b_crx_mem(address_map &map);
|
||||
void model2b_5881_mem(address_map &map);
|
||||
// TODO: split into own class
|
||||
void rchase2_iocpu_map(address_map &map);
|
||||
void rchase2_ioport_map(address_map &map);
|
||||
};
|
||||
@ -377,6 +377,7 @@ public:
|
||||
void overrev2c(machine_config &config);
|
||||
void stcc(machine_config &config);
|
||||
void model2c_crx_mem(address_map &map);
|
||||
void model2c_5881_mem(address_map &map);
|
||||
};
|
||||
|
||||
/*****************************
|
||||
|
||||
@ -235,7 +235,6 @@ public:
|
||||
void pci_device_set_reg(uint32_t value);
|
||||
void configure_fast_ram();
|
||||
void interleave_vroms();
|
||||
DECLARE_DRIVER_INIT(genprot);
|
||||
DECLARE_DRIVER_INIT(lemans24);
|
||||
DECLARE_DRIVER_INIT(vs298);
|
||||
DECLARE_DRIVER_INIT(vs299);
|
||||
@ -335,9 +334,6 @@ public:
|
||||
void tap_reset();
|
||||
void tap_set_asic_ids();
|
||||
|
||||
DECLARE_READ64_MEMBER(model3_5881prot_r);
|
||||
DECLARE_WRITE64_MEMBER(model3_5881prot_w);
|
||||
int first_read;
|
||||
uint16_t crypt_read_callback(uint32_t addr);
|
||||
|
||||
void model3_21_5881(machine_config &config);
|
||||
@ -347,6 +343,7 @@ public:
|
||||
void model3_20(machine_config &config);
|
||||
void model3_21(machine_config &config);
|
||||
void scud(machine_config &config);
|
||||
void model3_5881_mem(address_map &map);
|
||||
void model3_10_mem(address_map &map);
|
||||
void model3_mem(address_map &map);
|
||||
void model3_snd(address_map &map);
|
||||
|
||||
@ -1,6 +1,9 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Andreas Naive, Olivier Galibert, David Haywood
|
||||
/*
|
||||
TODO:
|
||||
- merge interface for ST-V and NAOMI too.
|
||||
|
||||
re: Tecmo World Cup '98 (ST-V) (from ANY)
|
||||
|
||||
I got one of the card in subject open it up to check the rom version
|
||||
@ -19,6 +22,24 @@
|
||||
|
||||
DEFINE_DEVICE_TYPE(SEGA315_5881_CRYPT, sega_315_5881_crypt_device, "sega315_5881", "Sega 315-5881 Encryption")
|
||||
|
||||
// TODO: standard hookup doesn't work properly (causes a crash in LA Machine Gun)
|
||||
// might be due of high address variables not properly set (@see sega_315_5881_crypt_device::set_addr_high)
|
||||
ADDRESS_MAP_START(sega_315_5881_crypt_device::iomap_64be)
|
||||
AM_RANGE(0x0000, 0x0001) AM_READ(ready_r)
|
||||
// TODO: it is unknown if the
|
||||
AM_RANGE(0x0010, 0x0011) AM_WRITE(addrlo_w)
|
||||
AM_RANGE(0x0012, 0x0013) AM_WRITE(addrhi_w)
|
||||
AM_RANGE(0x0018, 0x0019) AM_WRITE(subkey_be_w)
|
||||
AM_RANGE(0x001c, 0x001d) AM_READ(decrypt_be_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
ADDRESS_MAP_START(sega_315_5881_crypt_device::iomap_le)
|
||||
AM_RANGE(0x0000, 0x0001) AM_READ(ready_r)
|
||||
AM_RANGE(0x0008, 0x0009) AM_WRITE(addrlo_w)
|
||||
AM_RANGE(0x000a, 0x000b) AM_WRITE(addrhi_w)
|
||||
AM_RANGE(0x000c, 0x000d) AM_WRITE(subkey_le_w)
|
||||
AM_RANGE(0x000e, 0x000f) AM_READ(decrypt_le_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
sega_315_5881_crypt_device::sega_315_5881_crypt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, SEGA315_5881_CRYPT, tag, owner, clock)
|
||||
@ -68,13 +89,84 @@ void sega_315_5881_crypt_device::device_reset()
|
||||
dec_hist = 0;
|
||||
dec_header = 0;
|
||||
enc_ready = false;
|
||||
|
||||
first_read = false;
|
||||
|
||||
buffer_pos = 0;
|
||||
line_buffer_pos = 0;
|
||||
line_buffer_size = 0;
|
||||
buffer_bit = 0;
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
*
|
||||
* Chip I/O interface (Model 2/3)
|
||||
*
|
||||
************************************************/
|
||||
|
||||
READ16_MEMBER(sega_315_5881_crypt_device::ready_r)
|
||||
{
|
||||
// bit 0: busy flag
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(sega_315_5881_crypt_device::addrlo_w)
|
||||
{
|
||||
set_addr_low(data&0xffff);
|
||||
first_read = true;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(sega_315_5881_crypt_device::addrhi_w)
|
||||
{
|
||||
set_addr_high(0);
|
||||
if (data != 0)
|
||||
printf("sega_315_5881_crypt_device not zero high address %08x (%08x)\n", data, mem_mask);
|
||||
first_read = true;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(sega_315_5881_crypt_device::subkey_le_w)
|
||||
{
|
||||
printf("subkey %08x (%08x)\n", data, mem_mask);
|
||||
set_subkey(data & 0xffff);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(sega_315_5881_crypt_device::subkey_be_w)
|
||||
{
|
||||
uint16_t subkey;
|
||||
printf("subkey %08x (%08x)\n", data, mem_mask);
|
||||
// endian swap the sub-key for big endian CPUs
|
||||
subkey = ((data & 0xff00) >> 8) | ((data & 0x00ff) << 8);
|
||||
set_subkey(subkey);
|
||||
}
|
||||
|
||||
READ16_MEMBER(sega_315_5881_crypt_device::decrypt_le_r)
|
||||
{
|
||||
uint16_t retval = decrypt_be_r(space,offset,mem_mask);
|
||||
// endian swap the sub-key for little endian CPUs
|
||||
retval = ((retval & 0xff00) >> 8) | ((retval & 0x00ff) << 8);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
READ16_MEMBER(sega_315_5881_crypt_device::decrypt_be_r)
|
||||
{
|
||||
if (first_read == true)
|
||||
{
|
||||
// the RAM based schemes expect a dummy value before the start of the stream
|
||||
// to match the previous simulation (dynamite cop) I use 0x0000 here
|
||||
|
||||
// this is actually header data?
|
||||
first_read = false;
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t* base;
|
||||
uint16_t retval;
|
||||
retval = do_decrypt(base);
|
||||
// retval = ((retval & 0xff00) >> 8) | ((retval & 0x00ff) << 8);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
uint16_t sega_315_5881_crypt_device::do_decrypt(uint8_t *&base)
|
||||
{
|
||||
if(!enc_ready)
|
||||
|
||||
@ -20,6 +20,16 @@ public:
|
||||
// construction/destruction
|
||||
sega_315_5881_crypt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ16_MEMBER(ready_r);
|
||||
DECLARE_WRITE16_MEMBER(subkey_le_w);
|
||||
DECLARE_WRITE16_MEMBER(subkey_be_w);
|
||||
DECLARE_WRITE16_MEMBER(addrlo_w);
|
||||
DECLARE_WRITE16_MEMBER(addrhi_w);
|
||||
DECLARE_READ16_MEMBER(decrypt_le_r);
|
||||
DECLARE_READ16_MEMBER(decrypt_be_r);
|
||||
|
||||
void iomap_64be(address_map &map);
|
||||
void iomap_le(address_map &map);
|
||||
|
||||
uint16_t do_decrypt(uint8_t *&base);
|
||||
void set_addr_low(uint16_t data);
|
||||
@ -36,6 +46,8 @@ protected:
|
||||
|
||||
private:
|
||||
|
||||
bool first_read;
|
||||
|
||||
enum {
|
||||
// BUFFER_SIZE = 32768, LINE_SIZE = 512,
|
||||
BUFFER_SIZE = 2, LINE_SIZE = 512, // this should be a stream, without any 'BUFFER_SIZE' ? I guess the SH4 DMA implementation isn't on a timer tho?
|
||||
|
||||
Loading…
Reference in New Issue
Block a user