mirror of
https://github.com/holub/mame
synced 2025-05-17 19:24:59 +03:00
wicat: Reduce video glitchiness with more sensible interrupt handling
This commit is contained in:
AJR
parent
1b8d0decb5
commit
a279ee3773
@ -313,7 +313,7 @@ void i8275_device::device_timer(emu_timer &timer, device_timer_id id, int param,
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}
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}
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if ((m_status & ST_IE) && m_scanline == m_irq_scanline)
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if ((m_status & ST_IE) && !(m_status & ST_IR) && m_scanline == m_irq_scanline)
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{
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//LOG("I8275 y %u x %u IRQ 1\n", y, x);
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m_status |= ST_IR;
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@ -557,7 +557,7 @@ WRITE8_MEMBER( i8275_device::write )
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case CMD_RESET:
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LOG("I8275 Reset\n");
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m_status &= ~(ST_IE | ST_VE);
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m_status &= ~(ST_IE | ST_IR | ST_VE);
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LOG("I8275 IRQ 0\n");
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m_write_irq(CLEAR_LINE);
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m_write_drq(0);
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@ -26,6 +26,7 @@ Wicat - various systems.
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#include "machine/6522via.h"
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#include "machine/am9517a.h"
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#include "machine/im6402.h"
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#include "machine/input_merger.h"
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#include "machine/mc2661.h"
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#include "machine/mm58274c.h"
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#include "machine/wd_fdc.h"
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@ -52,7 +53,9 @@ public:
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m_uart5(*this, "uart5"),
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m_uart6(*this, "uart6"),
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m_videocpu(*this, "videocpu"),
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m_videoctrl(*this,"video"),
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m_videoctrl(*this, "videoctrl"),
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m_videoirq(*this, "videoirq"),
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m_crtc(*this, "video"),
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m_videodma(*this, "videodma"),
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m_videouart0(*this, "videouart0"),
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m_videouart1(*this, "videouart1"),
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@ -88,19 +91,16 @@ public:
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DECLARE_WRITE8_MEMBER(video_timer_w);
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DECLARE_READ8_MEMBER(vram_r);
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_READ8_MEMBER(video_ctrl_r);
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DECLARE_WRITE8_MEMBER(video_ctrl_w);
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DECLARE_READ8_MEMBER(video_status_r);
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DECLARE_WRITE_LINE_MEMBER(dma_hrq_w);
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DECLARE_WRITE_LINE_MEMBER(dma_nmi_cb);
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DECLARE_WRITE_LINE_MEMBER(crtc_cb);
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DECLARE_WRITE_LINE_MEMBER(crtc_irq_w);
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DECLARE_WRITE_LINE_MEMBER(crtc_irq_clear_w);
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DECLARE_READ8_MEMBER(hdc_r);
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DECLARE_WRITE8_MEMBER(hdc_w);
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DECLARE_READ8_MEMBER(fdc_r);
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DECLARE_WRITE8_MEMBER(fdc_w);
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DECLARE_READ16_MEMBER(via_r);
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DECLARE_WRITE16_MEMBER(via_w);
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DECLARE_WRITE_LINE_MEMBER(kb_data_ready);
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I8275_DRAW_CHARACTER_MEMBER(wicat_display_pixels);
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required_shared_ptr<uint8_t> m_vram;
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@ -115,7 +115,9 @@ public:
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required_device<mc2661_device> m_uart5;
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required_device<mc2661_device> m_uart6;
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required_device<cpu_device> m_videocpu;
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required_device<i8275_device> m_videoctrl;
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required_device<ls259_device> m_videoctrl;
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required_device<input_merger_device> m_videoirq;
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required_device<i8275_device> m_crtc;
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required_device<am9517a_device> m_videodma;
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required_device<mc2661_device> m_videouart0;
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required_device<mc2661_device> m_videouart1;
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@ -143,19 +145,14 @@ private:
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void poll_kb();
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void send_key(uint8_t val);
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emu_timer* m_video_timer;
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emu_timer* m_kb_timer;
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emu_timer* m_kb_serial_timer;
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static const device_timer_id VIDEO_TIMER = 0;
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static const device_timer_id KB_TIMER = 1;
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static const device_timer_id KB_SERIAL_TIMER = 2;
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uint8_t m_portA;
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uint8_t m_portB;
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bool m_video_timer_irq;
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bool m_video_kb_irq;
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uint8_t m_nmi_enable;
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uint8_t m_crtc_irq;
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bool m_crtc_irq;
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uint16_t m_kb_data;
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uint8_t m_kb_bit;
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uint32_t m_kb_keys[8];
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@ -203,7 +200,7 @@ void wicat_state::wicat_video_io(address_map &map)
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map(0x0400, 0x047f).rw(FUNC(wicat_state::videosram_r), FUNC(wicat_state::videosram_w)); // XD2210 4-bit NOVRAM
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map(0x0500, 0x0500).w(FUNC(wicat_state::videosram_recall_w));
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map(0x0600, 0x0600).w(FUNC(wicat_state::videosram_store_w));
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map(0x0800, 0x080f).rw(FUNC(wicat_state::video_ctrl_r), FUNC(wicat_state::video_ctrl_w));
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map(0x0800, 0x0807).w("videoctrl", FUNC(ls259_device::write_d0)).umask16(0xffff);
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map(0x0a00, 0x0a1f).rw(FUNC(wicat_state::video_dma_r), FUNC(wicat_state::video_dma_w)); // AM9517A DMA
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map(0x0b00, 0x0b03).rw(FUNC(wicat_state::video_r), FUNC(wicat_state::video_w)); // i8275 CRTC
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map(0x0e00, 0x0eff).ram();
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@ -297,7 +294,6 @@ static void wicat_floppies(device_slot_interface &device)
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void wicat_state::driver_start()
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{
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m_video_timer = timer_alloc(VIDEO_TIMER);
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m_kb_timer = timer_alloc(KB_TIMER);
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m_kb_serial_timer = timer_alloc(KB_SERIAL_TIMER);
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}
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@ -325,12 +321,8 @@ void wicat_state::machine_reset()
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m_videouart->sbs_w(0);
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m_videouart->crl_w(1);
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m_video_timer_irq = false;
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m_video_kb_irq = false;
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m_video_timer->adjust(attotime::zero,0,attotime::from_hz(60));
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m_kb_timer->adjust(attotime::zero,0,attotime::from_msec(50));
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m_nmi_enable = 0;
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m_crtc_irq = CLEAR_LINE;
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m_crtc_irq = false;
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for(auto & elem : m_kb_keys)
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elem = 0;
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}
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@ -339,10 +331,6 @@ void wicat_state::device_timer(emu_timer &timer, device_timer_id id, int param,
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{
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switch (id)
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{
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case VIDEO_TIMER:
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m_video_timer_irq = true;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,ASSERT_LINE);
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break;
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case KB_TIMER:
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poll_kb();
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break;
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@ -576,9 +564,9 @@ READ8_MEMBER(wicat_state::video_r)
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switch(offset)
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{
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case 0x00:
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return m_videoctrl->read(space,0);
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return m_crtc->read(space,0);
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case 0x02:
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return m_videoctrl->read(space,1);
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return m_crtc->read(space,1);
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default:
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return 0xff;
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}
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@ -589,10 +577,10 @@ WRITE8_MEMBER(wicat_state::video_w)
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switch(offset)
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{
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case 0x00:
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m_videoctrl->write(space,0,data);
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m_crtc->write(space,0,data);
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break;
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case 0x02:
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m_videoctrl->write(space,1,data);
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m_crtc->write(space,1,data);
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break;
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}
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}
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@ -682,22 +670,16 @@ READ8_MEMBER(wicat_state::video_timer_r)
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uint8_t ret = 0x00;
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if(offset == 0x00)
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{
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if(m_video_timer_irq)
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{
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ret |= 0x08;
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m_video_timer_irq = false;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,CLEAR_LINE);
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}
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if(m_video_kb_irq)
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{
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ret |= 0x10;
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m_video_kb_irq = false;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,CLEAR_LINE);
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}
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}
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return (m_videouart->dr_r() << 4) | (m_videouart->tbre_r() && m_videoctrl->q6_r() ? 0x08 : 0x00);
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if(offset == 0x02)
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{
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if (!machine().side_effects_disabled())
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{
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m_videouart->drr_w(1);
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m_videouart->drr_w(0);
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}
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return m_videouart->read(space,0);
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}
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return ret;
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}
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@ -708,28 +690,10 @@ WRITE8_MEMBER(wicat_state::video_timer_w)
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m_videouart->write(space,0,data);
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}
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READ8_MEMBER(wicat_state::video_ctrl_r)
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{
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return 0x00; // TODO
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}
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WRITE8_MEMBER(wicat_state::video_ctrl_w)
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{
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if(offset == 0x07)
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m_nmi_enable = data;
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}
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READ8_MEMBER(wicat_state::video_status_r)
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{
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// this port is read in the NVI IRQ routine, which if bit 2 is set, will unmask DMA channel 0. But no idea what triggers it...
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if(m_crtc_irq == ASSERT_LINE)
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{
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m_crtc_irq = CLEAR_LINE;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,CLEAR_LINE);
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return 0x04;
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}
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else
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return 0x00;
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return m_crtc_irq ? 0x04 : 0x00;
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}
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WRITE_LINE_MEMBER(wicat_state::dma_hrq_w)
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@ -738,25 +702,22 @@ WRITE_LINE_MEMBER(wicat_state::dma_hrq_w)
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m_videodma->hack_w(state);
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}
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WRITE_LINE_MEMBER(wicat_state::dma_nmi_cb)
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WRITE_LINE_MEMBER(wicat_state::crtc_irq_w)
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{
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if(state)
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if (state && m_videoctrl->q0_r())
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{
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if(m_nmi_enable != 0)
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m_videocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
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m_crtc_irq = true;
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m_videoirq->in_w<1>(1);
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}
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}
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WRITE_LINE_MEMBER(wicat_state::kb_data_ready)
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WRITE_LINE_MEMBER(wicat_state::crtc_irq_clear_w)
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{
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m_video_kb_irq = state ? ASSERT_LINE : CLEAR_LINE;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,m_video_kb_irq);
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if (!state)
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{
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m_crtc_irq = false;
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m_videoirq->in_w<1>(0);
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}
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WRITE_LINE_MEMBER(wicat_state::crtc_cb)
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{
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m_crtc_irq = state ? ASSERT_LINE : CLEAR_LINE;
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m_videocpu->set_input_line(INPUT_LINE_IRQ0,m_crtc_irq);
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}
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I8275_DRAW_CHARACTER_MEMBER(wicat_state::wicat_display_pixels)
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@ -879,26 +840,43 @@ MACHINE_CONFIG_START(wicat_state::wicat)
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MCFG_DEVICE_PROGRAM_MAP(wicat_video_mem)
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MCFG_DEVICE_IO_MAP(wicat_video_io)
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MCFG_INPUT_MERGER_ANY_HIGH("videoirq")
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MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("videocpu", INPUT_LINE_IRQ0))
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MCFG_DEVICE_ADD("videoctrl", LS259, 0)
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MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, wicat_state, crtc_irq_clear_w))
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MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE("tbreirq", input_merger_device, in_w<1>))
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MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE("dmairq", input_merger_device, in_w<1>))
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// Q1-Q5 are all used but unknown
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MCFG_DEVICE_ADD("videodma", AM9517A, 8_MHz_XTAL) // clock is a bit of guess
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MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, wicat_state, dma_hrq_w))
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MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, wicat_state, dma_nmi_cb))
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MCFG_AM9517A_OUT_EOP_CB(WRITELINE("dmairq", input_merger_device, in_w<0>))
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MCFG_AM9517A_IN_MEMR_CB(READ8(*this, wicat_state, vram_r))
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MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, wicat_state, vram_w))
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MCFG_AM9517A_OUT_IOW_0_CB(WRITE8("video", i8275_device, dack_w))
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MCFG_IM6402_ADD("videouart", 0, 0)
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MCFG_IM6402_DR_CALLBACK(WRITELINE(*this, wicat_state, kb_data_ready))
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MCFG_INPUT_MERGER_ALL_HIGH("dmairq")
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MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("videocpu", INPUT_LINE_NMI))
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MCFG_IM6402_ADD("videouart", 0, 1200)
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MCFG_IM6402_DR_CALLBACK(WRITELINE("videoirq", input_merger_device, in_w<2>))
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MCFG_IM6402_TBRE_CALLBACK(WRITELINE("tbreirq", input_merger_device, in_w<0>))
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MCFG_INPUT_MERGER_ALL_HIGH("tbreirq")
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MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<3>))
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// terminal (2x INS2651, 1x IM6042 - one of these is for the keyboard, another communicates with the main board, the third is unknown)
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MCFG_DEVICE_ADD("videouart0", MC2661, 5.0688_MHz_XTAL) // the INS2651 looks similar enough to the MC2661...
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MCFG_MC2661_TXD_HANDLER(WRITELINE("uart0", mc2661_device, rx_w))
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MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("videocpu", INPUT_LINE_IRQ0))
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MCFG_MC2661_RXRDY_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<0>))
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MCFG_MC2661_RTS_HANDLER(WRITELINE("uart0", mc2661_device, cts_w))
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MCFG_MC2661_DTR_HANDLER(WRITELINE("uart0", mc2661_device, dsr_w))
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MCFG_DEVICE_ADD("videouart1", MC2661, 5.0688_MHz_XTAL)
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MCFG_MC2661_RXC(19200)
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MCFG_MC2661_TXC(19200)
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MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("videocpu", INPUT_LINE_IRQ0))
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MCFG_MC2661_RXRDY_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<4>))
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MCFG_X2210_ADD("vsram") // XD2210
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@ -912,7 +890,7 @@ MACHINE_CONFIG_START(wicat_state::wicat)
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MCFG_I8275_CHARACTER_WIDTH(10)
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MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(wicat_state, wicat_display_pixels)
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MCFG_I8275_DRQ_CALLBACK(WRITELINE("videodma", am9517a_device, dreq0_w))
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MCFG_I8275_IRQ_CALLBACK(WRITELINE(*this, wicat_state,crtc_cb))
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MCFG_I8275_VRTC_CALLBACK(WRITELINE(*this, wicat_state, crtc_irq_w))
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MCFG_VIDEO_SET_SCREEN("screen")
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MCFG_DEFAULT_LAYOUT(layout_wicat)
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