From a27abd7ff245f862677c16aee3ef560527ba94b1 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Fri, 12 Jul 2013 22:33:28 +0000 Subject: [PATCH] (MESS) pc1640: Inherited IGA from EGA, now showing video. (nw) --- src/mess/video/isa_pc1640_iga.c | 424 +++----------------------------- src/mess/video/isa_pc1640_iga.h | 30 +-- 2 files changed, 32 insertions(+), 422 deletions(-) diff --git a/src/mess/video/isa_pc1640_iga.c b/src/mess/video/isa_pc1640_iga.c index 37da544c9d8..a3f02ae70a6 100644 --- a/src/mess/video/isa_pc1640_iga.c +++ b/src/mess/video/isa_pc1640_iga.c @@ -27,8 +27,8 @@ // MACROS / CONSTANTS //************************************************************************** -#define SCREEN_TAG "screen" #define PEGA1A_TAG "ic910" +#define EGA_CRTC_NAME "crtc_ega_ega" @@ -59,69 +59,6 @@ const rom_entry *isa8_pc1640_iga_device::device_rom_region() const } -//------------------------------------------------- -// mc6845_interface crtc_intf -//------------------------------------------------- - -static MC6845_UPDATE_ROW( pc1640_update_row ) -{ -} - -static MC6845_INTERFACE( crtc_intf ) -{ - SCREEN_TAG, - false, - 8, - NULL, - pc1640_update_row, - NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - DEVCB_NULL, - NULL -}; - - -//------------------------------------------------- -// SCREEN_UPDATE( pc1640_iga ) -//------------------------------------------------- - -UINT32 isa8_pc1640_iga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - return 0; -} - - -//------------------------------------------------- -// MACHINE_DRIVER( pc1640_iga ) -//------------------------------------------------- - -static MACHINE_CONFIG_FRAGMENT( pc1640_iga ) - MCFG_SCREEN_ADD(SCREEN_TAG, RASTER) - MCFG_SCREEN_UPDATE_DEVICE(DEVICE_SELF, isa8_pc1640_iga_device, screen_update) - MCFG_SCREEN_SIZE(80*8, 25*8) - MCFG_SCREEN_VISIBLE_AREA(0, 80*8-1, 0, 25*8-1) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) - MCFG_SCREEN_REFRESH_RATE(60) - - MCFG_PALETTE_LENGTH(64) - - MCFG_MC6845_ADD(PEGA1A_TAG, AMS40041, XTAL_28_63636MHz/32, crtc_intf) -MACHINE_CONFIG_END - - -//------------------------------------------------- -// machine_config_additions - device-specific -// machine configurations -//------------------------------------------------- - -machine_config_constructor isa8_pc1640_iga_device::device_mconfig_additions() const -{ - return MACHINE_CONFIG_NAME( pc1640_iga ); -} - - //************************************************************************** // LIVE DEVICE @@ -132,10 +69,7 @@ machine_config_constructor isa8_pc1640_iga_device::device_mconfig_additions() co //------------------------------------------------- isa8_pc1640_iga_device::isa8_pc1640_iga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : device_t(mconfig, ISA8_PC1640_IGA, "Amstrad PC1640 IGA", tag, owner, clock, "pc1640_iga", __FILE__), - device_isa8_card_interface(mconfig, *this), - m_vdu(*this, PEGA1A_TAG), - m_video_ram(*this, "video_ram") + : isa8_ega_device(mconfig, ISA8_PC1640_IGA, "Amstrad PC1640 IGA", tag, owner, clock, "pc1640_iga", __FILE__) { } @@ -146,334 +80,36 @@ isa8_pc1640_iga_device::isa8_pc1640_iga_device(const machine_config &mconfig, co void isa8_pc1640_iga_device::device_start() { + astring tempstring; + set_isa_device(); - m_isa->install_rom(this, 0xc0000, 0xc7fff, 0, 0, "iga", "iga"); - m_isa->install_memory(0xa0000, 0xbffff, 0, 0, READ8_DELEGATE(isa8_pc1640_iga_device, video_ram_r), WRITE8_DELEGATE(isa8_pc1640_iga_device, video_ram_w)); - m_isa->install_device(0x3b0, 0x3df, 0, 0, READ8_DELEGATE(isa8_pc1640_iga_device, iga_r), WRITE8_DELEGATE(isa8_pc1640_iga_device, iga_w)); - - // allocate memory - m_video_ram.allocate(0x20000); -} - - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void isa8_pc1640_iga_device::device_reset() -{ -} - - -//------------------------------------------------- -// video_ram_r - -//------------------------------------------------- - -READ8_MEMBER( isa8_pc1640_iga_device::video_ram_r ) -{ - UINT8 data = 0; - - if (BIT(m_egc_ctrl, 1)) + for (int i = 0; i < 64; i++ ) { - data = m_video_ram[offset]; + UINT8 r = ( ( i & 0x04 ) ? 0xAA : 0x00 ) + ( ( i & 0x20 ) ? 0x55 : 0x00 ); + UINT8 g = ( ( i & 0x02 ) ? 0xAA : 0x00 ) + ( ( i & 0x10 ) ? 0x55 : 0x00 ); + UINT8 b = ( ( i & 0x01 ) ? 0xAA : 0x00 ) + ( ( i & 0x08 ) ? 0x55 : 0x00 ); + + palette_set_color_rgb( machine(), i, r, g, b ); } - return data; -} - - -//------------------------------------------------- -// video_ram_w - -//------------------------------------------------- - -WRITE8_MEMBER( isa8_pc1640_iga_device::video_ram_w ) -{ - if (BIT(m_egc_ctrl, 1)) - { - m_video_ram[offset] = data; - } -} - - -//------------------------------------------------- -// iga_r - -//------------------------------------------------- - -READ8_MEMBER( isa8_pc1640_iga_device::iga_r ) -{ - UINT8 data = 0; - - //logerror("IGA read %03x\n", offset+0x3b0); - - switch (offset) - { - case 0x01: - data = m_vdu->register_r(space, 0); - break; - - case 0x05: // Mono CRT Controller Data - if (!BIT(m_egc_ctrl, 0)) - { - data = m_vdu->register_r(space, 0); - } - break; - - case 0x08: // Mono Extended Mode Control Protection Register - if (!BIT(m_egc_ctrl, 0)) - { - m_emcrp++; - } - break; - - case 0x0a: // Mono Status Register - /* - - bit description - - 0 Display Enable - 1 Light Pen Strobe - 2 Light Pen Switch (-LPSW) - 3 Mono Video - 4 Color Diagnostic (MUX) - 5 Color Diagnostic (MUX) - 6 EGA Mode - 7 -VSYNC - - */ - - if (!BIT(m_egc_ctrl, 0)) - { - data |= m_vdu->de_r(); - data |= m_lpen << 1; - data |= 0x04; - data |= !m_vdu->vsync_r() << 7; - } - break; - - case 0x12: // EGC Status Register - /* - - bit description - - 0 - 1 - 2 - 3 - 4 Switch Sense - 5 - 6 - 7 VSYNC Interrupt Active - - */ - - // switch sense - //data |= BIT(m_sw->read(), ((m_egc_ctrl >> 2) & 0x03) ^ 0x03); - break; - - case 0x15: // Sequencer Data Register - break; - - case 0x25: // Color CRT Controller Data - if (BIT(m_egc_ctrl, 0)) - { - data = m_vdu->register_r(space, 0); - } - break; - - case 0x28: // Color Extended Mode Control Protection Register - if (BIT(m_egc_ctrl, 0)) - { - m_emcrp++; - } - break; - - case 0x2a: // Color Status Register - /* - - bit description - - 0 Display Enable - 1 Light Pen Strobe - 2 Light Pen Switch (-LPSW) - 3 -VSYNC - 4 Color Diagnostic (MUX) - 5 Color Diagnostic (MUX) - 6 EGA Mode - 7 1 - - */ - - if (BIT(m_egc_ctrl, 0)) - { - data |= m_vdu->de_r(); - data |= m_lpen << 1; - data |= 0x04; - data |= !m_vdu->vsync_r() << 3; - data |= 0x80; - } - break; - } - - return data; -} - - -//------------------------------------------------- -// iga_w - -//------------------------------------------------- - -WRITE8_MEMBER( isa8_pc1640_iga_device::iga_w ) -{ - //logerror("IGA write %03x:%02x\n", offset+0x3b0, data); - - switch (offset) - { - case 0x00: - m_vdu->address_w(space, 0, data); - break; - - case 0x01: - m_vdu->register_w(space, 0, data); - break; - - case 0x04: // Mono CRT Controller Address - if (!BIT(m_egc_ctrl, 0)) - { - m_vdu->address_w(space, 0, data); - } - break; - - case 0x05: // Mono CRT Controller Data - if (!BIT(m_egc_ctrl, 0)) - { - } - break; - - case 0x08: // HMGA Mode Control Register - break; - - case 0x0b: // Mono Extended Mode Control Register - /* - - bit description - - 0 Enable Color Simulation Modes - 1 Enable 132 Character Mode - 2 Disable Blanking - 3 Enable Alternate Character Sets on plane 3 - 4 Lock CRTC Timing Registers - 5 Disable Palette and Overscan Registers - 6 Enable Special Modes - 7 Vsync Polarity, Border Blanking - - */ - - if (!BIT(m_egc_ctrl, 0) && (m_emcrp > 1)) - { - m_emcrp = 0; - m_emcr = data; - } - break; - - case 0x0f: // Hercules Mode Register - break; - - case 0x10: // EGA Mode Control Register - break; - - case 0x12: // EGC Control Register - /* - - bit description - - 0 CRTC 3BX/3DX I/O Address Select - 1 Display RAM Enable - 2 Clock Rate Select / Switch Sense Select bit 0 - 3 Clock Rate Select / Switch Sense Select bit 1 - 4 External Video Enable - 5 Alternate (64K) Text page Select - 6 HSYNC Polarity - 7 VSYNC Polarity - - */ - - m_egc_ctrl = data; - break; - - case 0x14: // Sequencer Address Register - m_sar = data; - break; - - case 0x15: // Sequencer Data Register - m_sdr[m_sar & 0x07] = data; - break; - - case 0x1e: // Graphics Controller Address - m_gcar = data; - break; - - case 0x1f: // Graphics Controller Data - m_gcdr[m_gcar & 0x0f] = data; - break; - - case 0x24: // Color CRT Controller Address - if (BIT(m_egc_ctrl, 0)) - { - m_vdu->address_w(space, 0, data); - } - break; - - case 0x25: // Color CRT Controller Data - if (BIT(m_egc_ctrl, 0)) - { - m_vdu->register_w(space, 0, data); - } - break; - - case 0x28: // CGA Mode Control Register - break; - - case 0x2b: // Color Extended Mode Control Register - /* - - bit description - - 0 Enable Color Simulation Modes - 1 Enable 132 Character Mode - 2 Disable Blanking - 3 Enable Alternate Character Sets on plane 3 - 4 Lock CRTC Timing Registers - 5 Disable Palette and Overscan Registers - 6 Enable Special Modes - 7 Vsync Polarity, Border Blanking - - */ - - if (BIT(m_egc_ctrl, 0) && (m_emcrp > 1)) - { - m_emcrp = 0; - m_emcr = data; - } - break; - - case 0x2d: // Plantronics Mode Register - /* - - bit description - - 0 - 1 - 2 - 3 - 4 Enable Extended color palette 2 - 5 Enable Extended color palette 1 - 6 Color Plane 0/1 Position - 7 - - */ - - m_plr = data; - break; - } -} + /* Install 256KB Video ram on our EGA card */ + m_vram = machine().memory().region_alloc(subtag(tempstring,"vram"), 256*1024, 1, ENDIANNESS_LITTLE); + + m_videoram = m_vram->base(); + m_plane[0] = m_videoram + 0x00000; + memset(m_plane[0], 0, sizeof(UINT8) * 0x10000); + m_plane[1] = m_videoram + 0x10000; + memset(m_plane[1], 0, sizeof(UINT8) * 0x10000); + m_plane[2] = m_videoram + 0x20000; + memset(m_plane[2], 0, sizeof(UINT8) * 0x10000); + m_plane[3] = m_videoram + 0x30000; + memset(m_plane[3], 0, sizeof(UINT8) * 0x10000); + + m_crtc_ega = subdevice(EGA_CRTC_NAME); + + m_isa->install_rom(this, 0xc0000, 0xc7fff, 0, 0, "ega", "iga"); + m_isa->install_device(0x3b0, 0x3bf, 0, 0, read8_delegate(FUNC(isa8_ega_device::pc_ega8_3b0_r), this), write8_delegate(FUNC(isa8_ega_device::pc_ega8_3b0_w), this)); + m_isa->install_device(0x3c0, 0x3cf, 0, 0, read8_delegate(FUNC(isa8_ega_device::pc_ega8_3c0_r), this), write8_delegate(FUNC(isa8_ega_device::pc_ega8_3c0_w), this)); + m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate(FUNC(isa8_ega_device::pc_ega8_3d0_r), this), write8_delegate(FUNC(isa8_ega_device::pc_ega8_3d0_w), this)); +} \ No newline at end of file diff --git a/src/mess/video/isa_pc1640_iga.h b/src/mess/video/isa_pc1640_iga.h index c8c85b054e2..238b37b3a1e 100644 --- a/src/mess/video/isa_pc1640_iga.h +++ b/src/mess/video/isa_pc1640_iga.h @@ -14,7 +14,7 @@ #include "emu.h" #include "machine/isa.h" -#include "video/mc6845.h" +#include "video/isa_ega.h" @@ -24,44 +24,18 @@ // ======================> isa8_pc1640_iga_device -class isa8_pc1640_iga_device : public device_t, - public device_isa8_card_interface +class isa8_pc1640_iga_device : public isa8_ega_device { public: // construction/destruction isa8_pc1640_iga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); // optional information overrides - virtual machine_config_constructor device_mconfig_additions() const; virtual const rom_entry *device_rom_region() const; - - DECLARE_READ8_MEMBER( video_ram_r ); - DECLARE_WRITE8_MEMBER( video_ram_w ); - DECLARE_READ8_MEMBER( iga_r ); - DECLARE_WRITE8_MEMBER( iga_w ); - - UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); protected: // device-level overrides virtual void device_start(); - virtual void device_reset(); - -private: - required_device m_vdu; - optional_shared_ptr m_video_ram; - - int m_lpen; - UINT8 m_egc_ctrl; - UINT8 m_emcr; // extended mode control register - UINT8 m_emcrp; // extended mode control register protection read counter - UINT8 m_sar; // sequencer address register - UINT8 m_sdr[8]; // sequencer data registers - UINT8 m_gcar; // graphics controller address register - UINT8 m_gcdr[16]; // graphics controller data registers - UINT8 m_crtcar; // CRT controller address register - UINT8 m_crtcdr[32]; // CRT controller data registers - UINT8 m_plr; // Plantronics mode register };