mirror of
https://github.com/holub/mame
synced 2025-06-30 07:58:56 +03:00
Namco NB 1/2 work.
Shares the memory with the c75.
Renames the c75 region to c7x from user4.
Implements the c75 reset/halt control.
Implements the irqs more correctly.
[From OG]
This commit is contained in:
Aaron Giles
parent
727c8323df
commit
a27dbe428a
@ -49,6 +49,28 @@ static WRITE16_HANDLER( speedup_w )
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COMBINE_DATA(&su_82);
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}
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WRITE16_HANDLER(namcoc7x_soundram16_w)
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{
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COMBINE_DATA(namcoc7x_mcuram+offset);
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}
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READ16_HANDLER(namcoc7x_soundram16_r)
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{
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return namcoc7x_mcuram[offset];
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}
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WRITE32_HANDLER(namcoc7x_soundram32_w)
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{
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namcoc7x_soundram16_w(machine, offset*2, data >> 16, mem_mask >> 16);
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namcoc7x_soundram16_w(machine, offset*2+1, data, mem_mask);
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}
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READ32_HANDLER(namcoc7x_soundram32_r)
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{
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return (namcoc7x_soundram16_r(machine, offset*2, mem_mask >> 16) << 16) |
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namcoc7x_soundram16_r(machine, offset*2+1, mem_mask);
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}
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void namcoc7x_sound_write16(UINT16 command, UINT32 offset)
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{
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namcoc7x_mcuram[offset] = command;
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@ -56,13 +78,13 @@ void namcoc7x_sound_write16(UINT16 command, UINT32 offset)
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void namcoc7x_on_driver_init(running_machine *machine)
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{
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UINT8 *pROM = (UINT8 *)memory_region(machine, "user4");
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UINT8 *pROM = (UINT8 *)memory_region(machine, "c7x");
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int cpunum;
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// clear the first page of the data ROM
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// clear the two 16-bits magic values at the start of the rom
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// (prevents external init routines from getting called - they assume a
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// RAM layout for a different BIOS and crash ours)
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memset(pROM, 0xff, 0x100);
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// ROM layout for a different BIOS and crash ours)
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memset(pROM, 0, 4);
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// install speedup cheat
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for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
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@ -105,10 +127,10 @@ static WRITE16_HANDLER( c7x_shared_w )
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ADDRESS_MAP_START( namcoc7x_mcu_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x002000, 0x002fff) AM_READWRITE( c352_0_r, c352_0_w )
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AM_RANGE(0x004000, 0x00bfff) AM_RAM AM_BASE(&namcoc7x_mcuram)
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AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("user4", 0x8c000)
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AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c7x", 0x8c000)
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AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x301000, 0x301001) AM_NOP // watchdog? LEDs?
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AM_RANGE(0x308000, 0x308003) AM_NOP // volume control IC?
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ADDRESS_MAP_END
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@ -116,10 +138,10 @@ ADDRESS_MAP_END
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ADDRESS_MAP_START( namcoc7x_mcu_share_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x002000, 0x002fff) AM_READWRITE( c352_0_r, c352_0_w )
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AM_RANGE(0x004000, 0x00bfff) AM_READWRITE( c7x_shared_r, c7x_shared_w ) AM_BASE(&namcoc7x_mcuram)
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AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("user4", 0x8c000)
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AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c7x", 0x8c000)
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AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("c7x", 0)
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AM_RANGE(0x301000, 0x301001) AM_NOP // watchdog? LEDs?
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AM_RANGE(0x308000, 0x308003) AM_NOP // volume control IC?
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ADDRESS_MAP_END
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@ -19,6 +19,11 @@ ADDRESS_MAP_EXTERN(namcoc7x_mcu_io, 8);
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INTERRUPT_GEN( namcoc7x_interrupt );
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WRITE16_HANDLER(namcoc7x_soundram16_w);
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READ16_HANDLER(namcoc7x_soundram16_r);
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WRITE32_HANDLER(namcoc7x_soundram32_w);
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READ32_HANDLER(namcoc7x_soundram32_r);
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void namcoc7x_sound_write16(UINT16 command, UINT32 offset);
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void namcoc7x_on_driver_init(running_machine *machine);
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void namcoc7x_set_host_ram(UINT32 *hostram);
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@ -442,7 +442,7 @@ ROM_START( speedrcr )
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ROM_REGION( 0x100000, NAMCONB1_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?)
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ROM_LOAD("se1_ssh.18u", 0x000000, 0x100000, CRC(7a8e0bda) SHA1(f6a508d90274d0205fec0c46f5f783a2715c0c6e) )
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ROM_REGION( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
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ROM_REGION( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
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ROM_LOAD("se1_spr.21l", 0x000000, 0x80000, CRC(850a27ac) SHA1(7d5db840ec67659a1f2e69a62cdb03ce6ee0b47b) )
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NAMCO_C7X_BIOS
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@ -479,7 +479,7 @@ ROM_START( finalapb )
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ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?)
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ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) )
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ROM_REGION( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
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ROM_REGION( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
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ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
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NAMCO_C7X_BIOS
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@ -516,7 +516,7 @@ ROM_START( finalapo )
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ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?)
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ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) )
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ROM_REGION( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
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ROM_REGION( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
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ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
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NAMCO_C7X_BIOS
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@ -553,7 +553,7 @@ ROM_START( finalapr )
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ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?)
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ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) )
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ROM_REGION( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
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ROM_REGION( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
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ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
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NAMCO_C7X_BIOS
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@ -12,7 +12,7 @@ ToDo:
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Main CPU : Motorola 68020 32-bit processor @ 25MHz
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Secondary CPUs : C329 + 137 (both custom)
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Custom Graphics Chips : GFX:123,145,156,C116 - Motion Objects:C355,187,C347
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Sound CPU : C351 (custom)
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Sound CPU : C75 (custom)
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PCM Sound chip : C352 (custom)
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I/O Chip : 160 (custom)
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Board composition : Single board
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@ -52,7 +52,7 @@ Main processor - MC68EC020FG25 25MHz (100 pin PQFP)
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- 137 custom PLD (28 pin NDIP)
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- C366 Key Custom
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Sound processor - C351 custom (160 pin PQFP)
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Sound processor - C75 custom
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(PCM) - C352 custom (100 pin PQFP)
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(control inputs) - 160 custom (80 pin PQFP)
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@ -161,7 +161,7 @@ Main processor - MC68EC020FG25 25MHz (100 pin PQFP)
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- 137 custom PLD (28 pin NDIP)
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- C366 Key Custom
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Sound processor - C351 custom (160 pin PQFP)
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Sound processor - C75 custom
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(PCM) - C352 custom (100 pin PQFP)
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(control inputs) - 160 custom (80 pin PQFP)
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@ -285,69 +285,19 @@ UINT32 *namconb1_tilebank32;
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/****************************************************************************/
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static UINT32 *namconb_cpureg32;
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static int
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GetCPURegister(int which)
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{
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return (namconb_cpureg32[which/4]<<((which&3)*8))>>24;
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}
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static UINT8 namconb_cpureg[32];
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static int vblank_irq_active, pos_irq_active;
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static TIMER_CALLBACK( namconb1_TriggerPOSIRQ )
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{
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int irqlevel = GetCPURegister(0x04)>>4;
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if(pos_irq_active || !(namconb_cpureg[0x02] & 0xf0))
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return;
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video_screen_update_partial(machine->primary_screen, param);
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cpunum_set_input_line(machine, 0, irqlevel, PULSE_LINE);
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pos_irq_active = 1;
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x02] & 0xf, ASSERT_LINE);
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}
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static TIMER_CALLBACK( namconb2_TriggerPOSIRQ )
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{
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int irqlevel = GetCPURegister(0x02);
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video_screen_update_partial(machine->primary_screen, param);
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cpunum_set_input_line(machine, 0, irqlevel, PULSE_LINE);
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} /* namconb2_TriggerPOSIRQ */
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static INTERRUPT_GEN( namconb2_interrupt )
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{
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/**
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* f00000 0x01 // VBLANK irq level
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* f00001 0x00
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* f00002 0x05 // POSIRQ level
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* f00003 0x00
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*
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* f00004 VBLANK ack
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* f00005
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* f00006 POSIRQ ack
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* f00007
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*
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* f00008
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*
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* f00009 0x62
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* f0000a 0x0f
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* f0000b 0x41
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* f0000c 0x70
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* f0000d 0x70
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* f0000e 0x23
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* f0000f 0x50
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* f00010 0x00
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* f00011 0x64
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* f00012 0x18
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* f00013 0xe7
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* f00014 (watchdog)
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* f00016 0x00
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* f0001e 0x00
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* f0001f 0x01
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*/
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int scanline = (paletteram32[0x1808/4]&0xffff)-32;
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int irqlevel = GetCPURegister(0x00);
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cpunum_set_input_line(machine, 0, irqlevel, HOLD_LINE);
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if( scanline<0 )
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scanline = 0;
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if( scanline < NAMCONB1_VBSTART )
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timer_set( video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, namconb2_TriggerPOSIRQ );
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} /* namconb2_interrupt */
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static INTERRUPT_GEN( namconb1_interrupt )
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{
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/**
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@ -385,8 +335,12 @@ static INTERRUPT_GEN( namconb1_interrupt )
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* 40001f 0x00
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*/
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int scanline = (paletteram32[0x1808/4]&0xffff)-32;
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int irqlevel = GetCPURegister(0x04)&0xf;
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cpunum_set_input_line(machine, 0, irqlevel, HOLD_LINE);
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if((!vblank_irq_active) && (namconb_cpureg[0x04] & 0xf0)) {
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x04] & 0xf, ASSERT_LINE);
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vblank_irq_active = 1;
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}
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if( scanline<0 )
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{
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scanline = 0;
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@ -397,10 +351,197 @@ static INTERRUPT_GEN( namconb1_interrupt )
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}
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} /* namconb1_interrupt */
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static WRITE32_HANDLER( namconb_cpureg_w )
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static TIMER_CALLBACK( namconb2_TriggerPOSIRQ )
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{
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COMBINE_DATA( &namconb_cpureg32[offset] );
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} /* namconb_cpureg_w */
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video_screen_update_partial(machine->primary_screen, param);
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pos_irq_active = 1;
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x02], ASSERT_LINE);
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}
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static INTERRUPT_GEN( namconb2_interrupt )
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{
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/**
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* f00000 0x01 // VBLANK irq level
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* f00001 0x00
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* f00002 0x05 // POSIRQ level
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* f00003 0x00
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*
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* f00004 VBLANK ack
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* f00005
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* f00006 POSIRQ ack
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* f00007
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*
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* f00008
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*
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* f00009 0x62
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* f0000a 0x0f
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* f0000b 0x41
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* f0000c 0x70
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* f0000d 0x70
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* f0000e 0x23
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* f0000f 0x50
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* f00010 0x00
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* f00011 0x64
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* f00012 0x18
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* f00013 0xe7
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* f00014 (watchdog)
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* f00016 0x00
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* f0001e 0x00
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* f0001f 0x01
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*/
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int scanline = (paletteram32[0x1808/4]&0xffff)-32;
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if((!vblank_irq_active) && namconb_cpureg[0x00]) {
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x00], ASSERT_LINE);
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vblank_irq_active = 1;
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}
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if( scanline<0 )
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scanline = 0;
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if( scanline < NAMCONB1_VBSTART )
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timer_set( video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, namconb2_TriggerPOSIRQ );
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} /* namconb2_interrupt */
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static void namconb1_cpureg8_w(running_machine *machine, int reg, UINT8 data)
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{
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UINT8 prev = namconb_cpureg[reg];
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namconb_cpureg[reg] = data;
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switch(reg) {
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case 0x02: // POS IRQ level/enable
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if(pos_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
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cpunum_set_input_line(machine, 0, prev & 0xf, CLEAR_LINE);
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if(data & 0xf0)
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cpunum_set_input_line(machine, 0, data & 0xf, ASSERT_LINE);
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else
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pos_irq_active = 0;
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}
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break;
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case 0x04: // VBLANK IRQ level/enable
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if(vblank_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
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cpunum_set_input_line(machine, 0, prev & 0xf, CLEAR_LINE);
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if(data & 0xf0)
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cpunum_set_input_line(machine, 0, data & 0xf, ASSERT_LINE);
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else
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vblank_irq_active = 0;
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}
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break;
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case 0x07: // POS ack
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if(pos_irq_active) {
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x02] & 0xf, CLEAR_LINE);
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pos_irq_active = 0;
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}
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break;
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case 0x09: // VBLANK ack
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if(vblank_irq_active) {
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cpunum_set_input_line(machine, 0, namconb_cpureg[0x04] & 0xf, CLEAR_LINE);
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vblank_irq_active = 0;
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}
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break;
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case 0x16: // Watchdog
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break;
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case 0x18: // C75 Control
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if(data & 1) {
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cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, CLEAR_LINE);
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cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, ASSERT_LINE);
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cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, CLEAR_LINE);
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} else
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cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, ASSERT_LINE);
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break;
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}
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}
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static WRITE32_HANDLER( namconb1_cpureg_w )
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{
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if(mem_mask & 0xff000000)
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namconb1_cpureg8_w(machine, offset*4, data >> 24);
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if(mem_mask & 0x00ff0000)
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namconb1_cpureg8_w(machine, offset*4+1, data >> 16);
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if(mem_mask & 0x0000ff00)
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namconb1_cpureg8_w(machine, offset*4+2, data >> 8);
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if(mem_mask & 0x000000ff)
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namconb1_cpureg8_w(machine, offset*4+3, data);
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}
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|
||||
static void namconb2_cpureg8_w(running_machine *machine, int reg, UINT8 data)
|
||||
{
|
||||
UINT8 prev = namconb_cpureg[reg];
|
||||
namconb_cpureg[reg] = data;
|
||||
switch(reg) {
|
||||
case 0x00: // VBLANK IRQ level
|
||||
if(vblank_irq_active && (prev != data)) {
|
||||
cpunum_set_input_line(machine, 0, prev, CLEAR_LINE);
|
||||
if(data)
|
||||
cpunum_set_input_line(machine, 0, data, ASSERT_LINE);
|
||||
else
|
||||
vblank_irq_active = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x02: // POS IRQ level
|
||||
if(pos_irq_active && (prev != data)) {
|
||||
cpunum_set_input_line(machine, 0, prev, CLEAR_LINE);
|
||||
if(data)
|
||||
cpunum_set_input_line(machine, 0, data, ASSERT_LINE);
|
||||
else
|
||||
pos_irq_active = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x04: // VBLANK ack
|
||||
if(vblank_irq_active) {
|
||||
cpunum_set_input_line(machine, 0, namconb_cpureg[0x00], CLEAR_LINE);
|
||||
vblank_irq_active = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x06: // POS ack
|
||||
if(pos_irq_active) {
|
||||
cpunum_set_input_line(machine, 0, namconb_cpureg[0x02], CLEAR_LINE);
|
||||
pos_irq_active = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x14: // Watchdog
|
||||
break;
|
||||
|
||||
case 0x16: // C75 Control
|
||||
if(data & 1) {
|
||||
cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, ASSERT_LINE);
|
||||
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, CLEAR_LINE);
|
||||
} else {
|
||||
cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER( namconb2_cpureg_w )
|
||||
{
|
||||
if(mem_mask & 0xff000000)
|
||||
namconb2_cpureg8_w(machine, offset*4, data >> 24);
|
||||
if(mem_mask & 0x00ff0000)
|
||||
namconb2_cpureg8_w(machine, offset*4+1, data >> 16);
|
||||
if(mem_mask & 0x0000ff00)
|
||||
namconb2_cpureg8_w(machine, offset*4+2, data >> 8);
|
||||
if(mem_mask & 0x000000ff)
|
||||
namconb2_cpureg8_w(machine, offset*4+3, data);
|
||||
}
|
||||
|
||||
static READ32_HANDLER(namconb_cpureg_r)
|
||||
{
|
||||
return (namconb_cpureg[offset*4] << 24) | (namconb_cpureg[offset*4+1] << 16)
|
||||
| (namconb_cpureg[offset*4+2] << 8) | namconb_cpureg[offset*4+3];
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
|
||||
@ -441,6 +582,13 @@ static NVRAM_HANDLER( namconb1 )
|
||||
}
|
||||
} /* namconb1 */
|
||||
|
||||
static MACHINE_START(namconb)
|
||||
{
|
||||
vblank_irq_active = 0;
|
||||
pos_irq_active = 0;
|
||||
memset(namconb_cpureg, 0, sizeof(namconb_cpureg));
|
||||
}
|
||||
|
||||
static DRIVER_INIT( nebulray )
|
||||
{
|
||||
UINT8 *pMem = (UINT8 *)memory_region(machine, NAMCONB1_TILEMASKREGION);
|
||||
@ -669,30 +817,14 @@ WRITE32_HANDLER( srand_w )
|
||||
*/
|
||||
} /* srand_w */
|
||||
|
||||
static WRITE32_HANDLER( sharedram_w )
|
||||
{
|
||||
if (offset < 0xb0)
|
||||
{
|
||||
if (mem_mask == 0xffff0000)
|
||||
{
|
||||
namcoc7x_sound_write16((data>>16), offset*2);
|
||||
}
|
||||
else if (mem_mask == 0x0000ffff)
|
||||
{
|
||||
namcoc7x_sound_write16((data&0xffff), (offset*2)+1);
|
||||
}
|
||||
}
|
||||
|
||||
COMBINE_DATA(&namconb1_workram32[offset]);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( namconb1_am, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0x100000, 0x10001f) AM_READ(gunbulet_gun_r)
|
||||
AM_RANGE(0x1c0000, 0x1cffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x1e4000, 0x1e4003) AM_READWRITE(randgen_r,srand_w)
|
||||
AM_RANGE(0x200000, 0x2fffff) AM_READ(SMH_RAM) AM_WRITE(sharedram_w) AM_BASE(&namconb1_workram32) /* shared with MCU) */
|
||||
AM_RANGE(0x400000, 0x40001f) AM_READ(SMH_RAM) AM_WRITE(namconb_cpureg_w) AM_BASE(&namconb_cpureg32)
|
||||
AM_RANGE(0x200000, 0x207fff) AM_READWRITE(namcoc7x_soundram32_r, namcoc7x_soundram32_w)
|
||||
AM_RANGE(0x208000, 0x2fffff) AM_RAM
|
||||
AM_RANGE(0x400000, 0x40001f) AM_READWRITE(namconb_cpureg_r, namconb1_cpureg_w)
|
||||
AM_RANGE(0x580000, 0x5807ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&nvmem32)
|
||||
AM_RANGE(0x600000, 0x61ffff) AM_READWRITE(namco_obj32_r,namco_obj32_w)
|
||||
AM_RANGE(0x620000, 0x620007) AM_READWRITE(namco_spritepos32_r,namco_spritepos32_w)
|
||||
@ -707,8 +839,9 @@ static ADDRESS_MAP_START( namconb2_am, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0x1c0000, 0x1cffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x1e4000, 0x1e4003) AM_READWRITE(randgen_r,srand_w)
|
||||
AM_RANGE(0x200000, 0x2fffff) AM_READ(SMH_RAM) AM_WRITE(sharedram_w) AM_BASE(&namconb1_workram32) /* shared with MCU */
|
||||
AM_RANGE(0x400000, 0x4fffff) AM_ROM AM_REGION("user1", 0)
|
||||
AM_RANGE(0x200000, 0x207fff) AM_READWRITE(namcoc7x_soundram32_r, namcoc7x_soundram32_w)
|
||||
AM_RANGE(0x208000, 0x2fffff) AM_RAM
|
||||
AM_RANGE(0x400000, 0x4fffff) AM_ROM AM_REGION("data", 0)
|
||||
AM_RANGE(0x600000, 0x61ffff) AM_READWRITE(namco_obj32_r,namco_obj32_w)
|
||||
AM_RANGE(0x620000, 0x620007) AM_READWRITE(namco_spritepos32_r,namco_spritepos32_w)
|
||||
AM_RANGE(0x640000, 0x64000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* unknown xy offset */
|
||||
@ -722,7 +855,7 @@ static ADDRESS_MAP_START( namconb2_am, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x980000, 0x98000f) AM_READ(namco_rozbank32_r) AM_WRITE(namco_rozbank32_w)
|
||||
AM_RANGE(0xa00000, 0xa007ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&nvmem32)
|
||||
AM_RANGE(0xc00000, 0xc0001f) AM_READ(custom_key_r) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xf00000, 0xf0001f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&namconb_cpureg32)
|
||||
AM_RANGE(0xf00000, 0xf0001f) AM_READWRITE(namconb_cpureg_r, namconb2_cpureg_w)
|
||||
ADDRESS_MAP_END /* namconb2_readmem */
|
||||
|
||||
#define MASTER_CLOCK_HZ 48384000
|
||||
@ -735,6 +868,7 @@ static MACHINE_DRIVER_START( namconb1 )
|
||||
NAMCO_C7X_MCU(MASTER_CLOCK_HZ/3)
|
||||
|
||||
MDRV_NVRAM_HANDLER(namconb1)
|
||||
MDRV_MACHINE_START(namconb)
|
||||
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
|
||||
|
||||
MDRV_SCREEN_ADD("main", RASTER)
|
||||
@ -759,6 +893,7 @@ static MACHINE_DRIVER_START( namconb2 )
|
||||
NAMCO_C7X_MCU(MASTER_CLOCK_HZ/3)
|
||||
|
||||
MDRV_NVRAM_HANDLER(namconb1)
|
||||
MDRV_MACHINE_START(namconb)
|
||||
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
|
||||
|
||||
MDRV_SCREEN_ADD("main", RASTER)
|
||||
@ -782,7 +917,7 @@ ROM_START( ptblank )
|
||||
ROM_LOAD32_WORD( "gn2mprlb.15b", 0x00002, 0x80000, CRC(fe2d9425) SHA1(51b166a629cbb522720d63720558816b496b6b76) )
|
||||
ROM_LOAD32_WORD( "gn2mprub.13b", 0x00000, 0x80000, CRC(3bf4985a) SHA1(f559e0d5f55d23d886fe61bd7d5ca556acc7f87c) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "gn1-spr0.bin", 0, 0x20000, CRC(6836ba38) SHA1(6ea17ea4bbb59be108e8887acd7871409580732f) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -810,7 +945,7 @@ ROM_START( gunbulet )
|
||||
ROM_LOAD32_WORD( "gn1-mprl.bin", 0x00002, 0x80000, CRC(f99e309e) SHA1(3fe0ddf756e6849f8effc7672456cbe32f65c98a) )
|
||||
ROM_LOAD32_WORD( "gn1-mpru.bin", 0x00000, 0x80000, CRC(72a4db07) SHA1(8c5e1e51cd961b311d03f7b21f36a5bd5e8e9104) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "gn1-spr0.bin", 0, 0x20000, CRC(6836ba38) SHA1(6ea17ea4bbb59be108e8887acd7871409580732f) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -838,7 +973,7 @@ ROM_START( nebulray )
|
||||
ROM_LOAD32_WORD( "nr2-mpru.13b", 0x00000, 0x80000, CRC(049b97cb) SHA1(0e344b29a4d4bdc854fa9849589772df2eeb0a05) )
|
||||
ROM_LOAD32_WORD( "nr2-mprl.15b", 0x00002, 0x80000, CRC(0431b6d4) SHA1(54c96e8ac9e753956c31bdef79d390f1c20e10ff) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "nr1-spr0", 0, 0x20000, CRC(1cc2b44b) SHA1(161f4ed39fabe89d7ee1d539f8b9f08cd0ff3111) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -873,7 +1008,7 @@ ROM_START( nebulryj )
|
||||
ROM_LOAD32_WORD( "nr1-mpru", 0x00000, 0x80000, CRC(42ef71f9) SHA1(20e3cb63e1fde293c60c404b378d901d635c4b79) )
|
||||
ROM_LOAD32_WORD( "nr1-mprl", 0x00002, 0x80000, CRC(fae5f62c) SHA1(143d716abbc834aac6270db3bbb89ec71ea3804d) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "nr1-spr0", 0, 0x20000, CRC(1cc2b44b) SHA1(161f4ed39fabe89d7ee1d539f8b9f08cd0ff3111) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -908,7 +1043,7 @@ ROM_START( gslgr94u )
|
||||
ROM_LOAD32_WORD( "gse2mprl.bin", 0x00002, 0x80000, CRC(a514349c) SHA1(1f7ec81cd6193410d2f01e6f0f84878561fc8035) )
|
||||
ROM_LOAD32_WORD( "gse2mpru.bin", 0x00000, 0x80000, CRC(b6afd238) SHA1(438a3411ac8ce3d22d5da8c0800738cb8d2994a9) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "gse2spr0.bin", 0, 0x20000, CRC(17e87cfc) SHA1(9cbeadb6dfcb736e8c80eab344f70fc2f58469d6) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1060,7 +1195,7 @@ ROM_START( gslugrsj )
|
||||
ROM_LOAD32_WORD( "gs1mprl.15b", 0x00002, 0x80000, CRC(1e6c3626) SHA1(56abe21884fd87df10996db19c49ce14214d4b73) )
|
||||
ROM_LOAD32_WORD( "gs1mpru.13b", 0x00000, 0x80000, CRC(ef355179) SHA1(0ab0ef4301a318681bb5827d35734a0732b35484) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "gs1spr0.5b", 0, 0x80000, CRC(561ea20f) SHA1(adac6b77effc3a82079a9b228bafca0fcef72ba5) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1086,7 +1221,7 @@ ROM_START( sws95 )
|
||||
ROM_LOAD32_WORD( "ss51mprl.bin", 0x00002, 0x80000, CRC(c9e0107d) SHA1(0f10582416023a86ea1ef2679f3f06016c086e08) )
|
||||
ROM_LOAD32_WORD( "ss51mpru.bin", 0x00000, 0x80000, CRC(0d93d261) SHA1(5edef26e2c86dbc09727d910af92747d022e4fed) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "ss51spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1113,7 +1248,7 @@ ROM_START( sws96 )
|
||||
ROM_LOAD32_WORD( "ss61mprl.bin", 0x00002, 0x80000, CRC(06f55e73) SHA1(6be26f8a2ef600bf07c580f210d7b265ac464002) )
|
||||
ROM_LOAD32_WORD( "ss61mpru.bin", 0x00000, 0x80000, CRC(0abdbb83) SHA1(67e8b712291f9bcf2c3a52fbc451fad54679cab8) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "ss61spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1139,7 +1274,7 @@ ROM_START( sws97 )
|
||||
ROM_LOAD32_WORD( "ss71mprl.bin", 0x00002, 0x80000, CRC(bd60b50e) SHA1(9e00bacd506182ab2af2c0efdd5cc401b3e46485) )
|
||||
ROM_LOAD32_WORD( "ss71mpru.bin", 0x00000, 0x80000, CRC(3444f5a8) SHA1(8d0f35b3ba8f65dbc67c3b2d273833227a8b8b2a) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "ss71spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1165,7 +1300,7 @@ ROM_START( vshoot )
|
||||
ROM_LOAD32_WORD( "vsj1mprl.15b", 0x00002, 0x80000, CRC(83a60d92) SHA1(c3db0c79f772a79418914353a3d6ecc4883ea54e) )
|
||||
ROM_LOAD32_WORD( "vsj1mpru.13b", 0x00000, 0x80000, CRC(c63eb92d) SHA1(f93bd4b91daee645677955020dc8df14dc9bfd27) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "vsj1spr0.5b", 0, 0x80000, CRC(b0c71aa6) SHA1(a94fae02b46a645ff728d2f98827c85ff155892b) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1351,7 +1486,7 @@ ROM_START( outfxies )
|
||||
ROM_LOAD32_WORD( "ou2mprl.11c", 0x00002, 0x80000, CRC(f414a32e) SHA1(9733ab087cfde1b8fb5b676d8a2eb5325ebdbb56) )
|
||||
ROM_LOAD32_WORD( "ou2mpru.11d", 0x00000, 0x80000, CRC(ab5083fb) SHA1(cb2e7a4838c2b80057edb83ea63116bccb1394d3) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "ou1spr0.5b", 0, 0x80000, CRC(60cee566) SHA1(2f3b96793816d90011586e0f9f71c58b636b6d4c) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1384,7 +1519,7 @@ ROM_START( outfxies )
|
||||
ROM_REGION( 0x200000, NAMCONB1_TILEGFXREGION, ROMREGION_DISPOSE )
|
||||
ROM_LOAD( "ou1-scr0", 0x000000, 0x200000, CRC(b3b3f2e9) SHA1(541bd7e9ba12aff4ec4033bd9c6bb19476acb3c4) )
|
||||
|
||||
ROM_REGION32_BE( 0x100000, "user1", 0 )
|
||||
ROM_REGION32_BE( 0x100000, "data", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "ou1dat0.20a", 0x00000, 0x80000, CRC(1a49aead) SHA1(df243aff1a6fb5bcf4d5d883c5af2374a4aff477) )
|
||||
ROM_LOAD16_WORD_SWAP( "ou1dat1.20b", 0x80000, 0x80000, CRC(63bb119d) SHA1(d4c2820243b84c3f5cdf7f9e66bb50f53d0efed2) )
|
||||
ROM_END
|
||||
@ -1394,7 +1529,7 @@ ROM_START( outfxesj )
|
||||
ROM_LOAD32_WORD( "ou1-mprl.11c", 0x00002, 0x80000, CRC(d3b9e530) SHA1(3f5fe5eea817a23dfe42e76f32912ce94d4c49c9) )
|
||||
ROM_LOAD32_WORD( "ou1-mpru.11d", 0x00000, 0x80000, CRC(d98308fb) SHA1(fdefeebf56464a20e3aaefd88df4eee9f7b5c4f3) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "ou1spr0.5b", 0, 0x80000, CRC(60cee566) SHA1(2f3b96793816d90011586e0f9f71c58b636b6d4c) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1427,7 +1562,7 @@ ROM_START( outfxesj )
|
||||
ROM_REGION( 0x200000, NAMCONB1_TILEGFXREGION, ROMREGION_DISPOSE )
|
||||
ROM_LOAD( "ou1-scr0", 0x000000, 0x200000, CRC(b3b3f2e9) SHA1(541bd7e9ba12aff4ec4033bd9c6bb19476acb3c4) )
|
||||
|
||||
ROM_REGION32_BE( 0x100000, "user1", 0 )
|
||||
ROM_REGION32_BE( 0x100000, "data", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "ou1dat0.20a", 0x00000, 0x80000, CRC(1a49aead) SHA1(df243aff1a6fb5bcf4d5d883c5af2374a4aff477) )
|
||||
ROM_LOAD16_WORD_SWAP( "ou1dat1.20b", 0x80000, 0x80000, CRC(63bb119d) SHA1(d4c2820243b84c3f5cdf7f9e66bb50f53d0efed2) )
|
||||
ROM_END
|
||||
@ -1438,7 +1573,7 @@ ROM_START( machbrkr )
|
||||
ROM_LOAD32_WORD( "mb1_mprl.11c", 0x00002, 0x80000, CRC(86cf0644) SHA1(07eeadda1d94c9be2f882edb6f2eb0b98292e500) )
|
||||
ROM_LOAD32_WORD( "mb1_mpru.11d", 0x00000, 0x80000, CRC(fb1ff916) SHA1(e0ba96c1f26a60f87d8050e582e164d91e132183) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "mb1_spr0.5b", 0, 0x80000, CRC(d10f6272) SHA1(cb99e06e050dbf86998ea51ef2ca130b2acfb2f6) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1475,7 +1610,7 @@ ROM_START( machbrkr )
|
||||
ROM_LOAD( "mb1_scr1.1c", 0x200000, 0x200000, CRC(fb2b1939) SHA1(bf9d7b93205e7012aa86693f3d2ba8f4d729bc97) )
|
||||
ROM_LOAD( "mb1_scr2.1b", 0x400000, 0x200000, CRC(0e6097a5) SHA1(b6c64b3e34ba913138b6b7c3d99d2be4f3ceda08) )
|
||||
|
||||
ROM_REGION32_BE( 0x100000, "user1", 0 )
|
||||
ROM_REGION32_BE( 0x100000, "data", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "mb1_dat0.20a", 0x00000, 0x80000, CRC(fb2e3cd1) SHA1(019b1d645a07619036522f42e0b9a537f39b6b93) )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1185,7 +1185,7 @@ ROM_START( danceyes )
|
||||
ROM_LOAD16_BYTE( "dc1rom3l.ic1", 0x0c00000, 0x200000, CRC(a76bcd4c) SHA1(817abdc43158b7aaac329c3ea17782277acb36a4) )
|
||||
ROM_LOAD16_BYTE( "dc1rom3u.ic9", 0x0c00001, 0x200000, CRC(1405d123) SHA1(3d7be5558358740f5a0a3a3022543cf5aca4cf24) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "dc1sprog.6d", 0x0000000, 0x040000, CRC(96cd7788) SHA1(68a5a53a5fc50e2b6b684c99d27d81e3a8c56287) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1211,7 +1211,7 @@ ROM_START( dunkmnia )
|
||||
ROM_LOAD16_BYTE( "dm1rom1u.ic8", 0x0400001, 0x200000, CRC(01e905d3) SHA1(430b2ae0c67265b6acc8aa4dd50f6144929993f8) )
|
||||
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "dm1sprog.6d", 0x0000000, 0x040000, CRC(de1cbc78) SHA1(855ebece1841f50ae324d7d6b8b18ab6f657d28e) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1237,7 +1237,7 @@ ROM_START( dunkmnic )
|
||||
ROM_LOAD16_BYTE( "dm1rom1u.ic8", 0x0400001, 0x200000, CRC(01e905d3) SHA1(430b2ae0c67265b6acc8aa4dd50f6144929993f8) )
|
||||
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "dm1sprog.6d", 0x0000000, 0x040000, CRC(de1cbc78) SHA1(855ebece1841f50ae324d7d6b8b18ab6f657d28e) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1256,7 +1256,7 @@ ROM_START( myangel3 )
|
||||
ROM_LOAD16_BYTE( "kqt1prg1l.ic3", 0x1000000, 0x800000, CRC(298d8eeb) SHA1(c421b1bdd5fd46c026a41e2cec47cafd1a69d33d) )
|
||||
ROM_LOAD16_BYTE( "kqt1prg1u.ic6", 0x1000001, 0x800000, CRC(911783db) SHA1(1005fc9b38e212844e397150a6f98f43ad88d4b9) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "kqt1sprog.7e", 0x0000000, 0x040000, CRC(bb1888a6) SHA1(4db07738079725413cdba7eb75252ee71ae50a66) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1274,7 +1274,7 @@ ROM_START( pocketrc )
|
||||
ROM_LOAD16_BYTE( "pkr1rom0l.ic5", 0x000000, 0x200000, CRC(6c9b074c) SHA1(885f342bd178e4146e1f75259206f6625c0b3c18) )
|
||||
ROM_LOAD16_BYTE( "pkr1rom0u.ic6", 0x000001, 0x200000, CRC(a55c0906) SHA1(3b6abfa877f88a4d96222d98af02498b0c777af6) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "pkr1verb.6d", 0x000000, 0x040000, CRC(9bf08992) SHA1(fca7943f7bcf0ee758fa63fbdef8f7456b9e46cb) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1298,7 +1298,7 @@ ROM_START( primglex )
|
||||
ROM_LOAD16_BYTE( "pg1rom1l.ic8", 0x0400001, 0x200000, CRC(59b5a71c) SHA1(ddc1f0a5488466166c21fd0c84ab2b4cf04316bf) )
|
||||
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "pg1sprog.6d", 0x0000000, 0x040000, CRC(e7c3396d) SHA1(12bbb8ebcaab1b40462a12917dd9b58bd9ab8663) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1318,7 +1318,7 @@ ROM_START( ptblnk2a )
|
||||
ROM_LOAD16_BYTE( "gnb1prg0l.ic2", 0x000000, 0x800000, CRC(78746037) SHA1(d130ca1153a730e3c967945248f00662f9fab304) )
|
||||
ROM_LOAD16_BYTE( "gnb1prg0u.ic5", 0x000001, 0x800000, CRC(697d3279) SHA1(40302780f7494d9413888b2d1da38bd14a9a444f) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "gnb1vera.6d", 0x0000000, 0x040000, CRC(6461ae77) SHA1(1377b716a69ef9d4d2e48083d23f22bd5c103c00) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1344,7 +1344,7 @@ ROM_START( souledge )
|
||||
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
|
||||
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "so1sprogc.6d", 0x0000000, 0x040000, CRC(2bbc118c) SHA1(4168a9aa525f1f0ce6cf6e14cfe4c118c4c0d773) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1370,7 +1370,7 @@ ROM_START( souledga )
|
||||
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
|
||||
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "so1sprogc.6d", 0x0000000, 0x040000, CRC(2bbc118c) SHA1(4168a9aa525f1f0ce6cf6e14cfe4c118c4c0d773) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1396,7 +1396,7 @@ ROM_START( souledgb )
|
||||
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
|
||||
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "so1sprog.6d", 0x0000000, 0x040000, CRC(f6f682b7) SHA1(a64e19be3f6e630b8c34f34b46b95aadfabd3f63) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1421,7 +1421,7 @@ ROM_START( souledgc )
|
||||
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
|
||||
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "so1sprog.6d", 0x0000000, 0x040000, CRC(f6f682b7) SHA1(a64e19be3f6e630b8c34f34b46b95aadfabd3f63) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1437,7 +1437,7 @@ ROM_START( starswep )
|
||||
|
||||
ROM_REGION32_LE( 0x0100000, "user2", ROMREGION_ERASE00 ) /* main data */
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "stp1sprog.7e", 0x0000000, 0x040000, CRC(08aaaf6a) SHA1(51c913a39ff7c154aef8bb10139cc8b92eb4756a) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1461,7 +1461,7 @@ ROM_START( tekken )
|
||||
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
|
||||
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1484,7 +1484,7 @@ ROM_START( tekkena )
|
||||
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
|
||||
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1507,7 +1507,7 @@ ROM_START( tekkenb )
|
||||
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
|
||||
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1530,7 +1530,7 @@ ROM_START( tekkenc )
|
||||
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
|
||||
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1555,7 +1555,7 @@ ROM_START( tekken2 )
|
||||
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
|
||||
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1580,7 +1580,7 @@ ROM_START( tekken2a )
|
||||
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
|
||||
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1605,7 +1605,7 @@ ROM_START( tekken2b )
|
||||
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
|
||||
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
@ -1628,7 +1628,7 @@ ROM_START( xevi3dg )
|
||||
ROM_LOAD16_BYTE( "xv31rom2l.ic4", 0x0800000, 0x200000, CRC(8403a277) SHA1(35193211351494a086d8422e3b0b71a8d3a262a6) )
|
||||
ROM_LOAD16_BYTE( "xv31rom2u.ic7", 0x0800001, 0x200000, CRC(ecf70432) SHA1(bec128a215e0aef66e9a8707bb0d1eb7b098a356) )
|
||||
|
||||
ROM_REGION16_LE( 0x100000, "user4", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_REGION16_LE( 0x100000, "c7x", 0 ) /* sound data and MCU BIOS */
|
||||
ROM_LOAD( "xv31sprog.6d", 0x0000000, 0x040000, CRC(e50b856a) SHA1(631da4f60c9ce08387fca26a70481a2fdacf9765) )
|
||||
NAMCO_C7X_BIOS
|
||||
|
||||
|
||||
@ -4,6 +4,7 @@
|
||||
#include "namconb1.h"
|
||||
#include "namcoic.h"
|
||||
#include "namcos2.h"
|
||||
#include "audio/namcoc7x.h"
|
||||
|
||||
static UINT32 tilemap_tile_bank[4];
|
||||
|
||||
@ -111,18 +112,24 @@ handle_mcu( running_machine *machine )
|
||||
static int toggle;
|
||||
static UINT16 credits;
|
||||
static int old_coin_state;
|
||||
static int old_p1;
|
||||
static int old_p2;
|
||||
static int old_p3;
|
||||
static int old_p4;
|
||||
static UINT16 old_p1;
|
||||
static UINT16 old_p2;
|
||||
static UINT16 old_p3;
|
||||
static UINT16 old_p4;
|
||||
int new_coin_state = input_port_read(machine, "COIN") & 0x3; /* coin1,2 */
|
||||
unsigned dsw = input_port_read(machine, "DSW")<<16;
|
||||
unsigned p1 = input_port_read(machine, "P1");
|
||||
unsigned p2 = input_port_read(machine, "P2");
|
||||
unsigned p3;
|
||||
unsigned p4;
|
||||
UINT16 dsw = input_port_read(machine, "DSW");
|
||||
UINT16 p1 = input_port_read(machine, "P1");
|
||||
UINT16 p2 = input_port_read(machine, "P2");
|
||||
UINT16 p3;
|
||||
UINT16 p4;
|
||||
|
||||
toggle = !toggle;
|
||||
if( toggle ) dsw &= ~(0x80<<16);
|
||||
if(toggle)
|
||||
dsw &= ~0x80;
|
||||
|
||||
if(cpunum_is_suspended(1, SUSPEND_REASON_HALT))
|
||||
return;
|
||||
|
||||
if( namcos2_gametype == NAMCONB2_MACH_BREAKERS )
|
||||
{
|
||||
p3 = input_port_read_safe(machine, "P3", 0);
|
||||
@ -144,17 +151,18 @@ handle_mcu( running_machine *machine )
|
||||
old_p3 = p3;
|
||||
old_p4 = p4;
|
||||
|
||||
namconb1_workram32[0x6000/4] = dsw|p1;
|
||||
namconb1_workram32[0x6004/4] = (p2<<16)|p3;
|
||||
namconb1_workram32[0x6008/4] = p4<<16;
|
||||
namcoc7x_soundram16_w(machine, 0x6000/2, dsw, 0xffff);
|
||||
namcoc7x_soundram16_w(machine, 0x6002/2, p1, 0xffff);
|
||||
namcoc7x_soundram16_w(machine, 0x6004/2, p2, 0xffff);
|
||||
namcoc7x_soundram16_w(machine, 0x6006/2, p3, 0xffff);
|
||||
namcoc7x_soundram16_w(machine, 0x6008/2, p4, 0xffff);
|
||||
|
||||
if( new_coin_state && !old_coin_state )
|
||||
{
|
||||
credits++;
|
||||
}
|
||||
old_coin_state = new_coin_state;
|
||||
namconb1_workram32[0x601e/4] &= 0xffff0000;
|
||||
namconb1_workram32[0x601e/4] |= credits;
|
||||
namcoc7x_soundram16_w(machine, 0x601e/2, credits, 0xffff);
|
||||
} /* handle_mcu */
|
||||
|
||||
static void
|
||||
|
||||
Loading…
Reference in New Issue
Block a user