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pic16c5x: Store FSR and show in debugger without extra high bits; eliminate now-unnecessary reset kludge

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This commit is contained in:
AJR 2024-02-22 22:03:41 -05:00
parent 15a453a55a
commit a27f84f90c
1 changed files with 6 additions and 14 deletions
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20
src/devices/cpu/pic16c5x/pic16c5x.cpp
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@ -398,7 +398,7 @@ void pic16c5x_device::push_stack(u16 data)
u8 pic16c5x_device::get_regfile(u8 addr) // Read from internal memory u8 pic16c5x_device::get_regfile(u8 addr) // Read from internal memory
{ {
if (addr == 0) { // Indirect addressing if (addr == 0) { // Indirect addressing
addr = m_FSR & m_data_mask; addr = m_FSR;
} else if (m_data_width != 5) { } else if (m_data_width != 5) {
addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
} }
@ -409,7 +409,7 @@ u8 pic16c5x_device::get_regfile(u8 addr) // Read from internal memory
void pic16c5x_device::store_regfile(u8 addr, u8 data) // Write to internal memory void pic16c5x_device::store_regfile(u8 addr, u8 data) // Write to internal memory
{ {
if (addr == 0) { // Indirect addressing if (addr == 0) { // Indirect addressing
addr = m_FSR & m_data_mask; addr = m_FSR;
} else if (m_data_width != 5) { } else if (m_data_width != 5) {
addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
} }
@ -468,13 +468,13 @@ void pic16c5x_device::status_w(u8 data)
u8 pic16c5x_device::fsr_r() u8 pic16c5x_device::fsr_r()
{ {
return m_FSR; // high bits are 1
return m_FSR | u8(~m_data_mask);
} }
void pic16c5x_device::fsr_w(u8 data) void pic16c5x_device::fsr_w(u8 data)
{ {
// high bits are 1 m_FSR = data & m_data_mask;
m_FSR = data | u8(~m_data_mask);
} }
u8 pic16c5x_device::porta_r() u8 pic16c5x_device::porta_r()
@ -1048,7 +1048,7 @@ void pic16c5x_device::device_start()
if (m_picmodel != 0x16C54 && m_picmodel != 0x16C56 && m_picmodel != 0x16C58) if (m_picmodel != 0x16C54 && m_picmodel != 0x16C56 && m_picmodel != 0x16C58)
state_add( PIC16C5x_TRSC, "TRSC", m_port_tris[PORTC]).formatstr("%02X"); state_add( PIC16C5x_TRSC, "TRSC", m_port_tris[PORTC]).formatstr("%02X");
} }
state_add( PIC16C5x_FSR, "FSR", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X"); state_add( PIC16C5x_FSR, "FSR", m_debugger_temp).mask(m_data_mask).formatstr("%02X");
state_add( PIC16C5x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s"); state_add( PIC16C5x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s");
state_add( STATE_GENPC, "GENPC", m_PC).noshow(); state_add( STATE_GENPC, "GENPC", m_PC).noshow();
@ -1081,9 +1081,6 @@ void pic16c5x_device::state_import(const device_state_entry &entry)
case PIC16C5x_PRTD: case PIC16C5x_PRTD:
m_port_data[PORTD] = m_debugger_temp; m_port_data[PORTD] = m_debugger_temp;
break; break;
case PIC16C5x_FSR:
m_FSR = m_debugger_temp | u8(~m_data_mask);
break;
case PIC16C5x_PSCL: case PIC16C5x_PSCL:
m_prescaler = m_debugger_temp; m_prescaler = m_debugger_temp;
break; break;
@ -1112,9 +1109,6 @@ void pic16c5x_device::state_export(const device_state_entry &entry)
case PIC16C5x_PRTD: case PIC16C5x_PRTD:
m_debugger_temp = m_port_data[PORTD]; m_debugger_temp = m_port_data[PORTD];
break; break;
case PIC16C5x_FSR:
m_debugger_temp = m_FSR | u8(~m_data_mask);
break;
} }
} }
@ -1182,8 +1176,6 @@ void pic16c5x_device::device_reset()
reset_regs(); reset_regs();
CLR(m_STATUS, PA_REG); CLR(m_STATUS, PA_REG);
SET(m_STATUS, TO_FLAG | PD_FLAG); SET(m_STATUS, TO_FLAG | PD_FLAG);
store_regfile(3, m_STATUS);
store_regfile(4, m_FSR);
} }