diff --git a/src/mame/drivers/mz700.c b/src/mame/drivers/mz700.c
index 4039da71e14..91d05618d74 100644
--- a/src/mame/drivers/mz700.c
+++ b/src/mame/drivers/mz700.c
@@ -59,6 +59,25 @@
  *  D000-DFFF   videoram or RAM
  *  E000-FFFF   memory mapped IO or RAM
  *
+ *  ToDo:
+    - slows down while making sound
+    - MZ800:
+      - Had to patch the rom to load cassettes
+      - Port CF not done.
+      - Dips not connected.
+      - MZ800-mode display not working /Hi-res not coded.
+      - The CRTC is a very complex custom device, mostly unemulated.
+    - MZ1500:
+      - Various ports not done.
+      - Floppy disk and quick disk not done.
+      - F4 display is blank.
+      - Need manuals.
+
+  Note: MZ800 hardware starts in memory map (mode A), but switches to MZ700
+  compatibility mode (mode B) as soon as it starts up. We start in Mode B
+  because it helps MZ1500 get started and it doesn't break anything.
+
+*
  *****************************************************************************/
 
 #include "emu.h"
@@ -97,6 +116,22 @@ TIMER_DEVICE_CALLBACK_MEMBER(mz_state::ne556_other_callback)
 ***************************************************************************/
 
 static ADDRESS_MAP_START( mz700_mem, AS_PROGRAM, 8, mz_state )
+	AM_RANGE(0x0000, 0x0fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
+	AM_RANGE(0x1000, 0xcfff) AM_RAM
+	AM_RANGE(0xd000, 0xdfff) AM_RAMBANK("bankd")
+	AM_RANGE(0xe000, 0xffff) AM_DEVICE("banke", address_map_bank_device, amap8)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( mz700_banke, AS_PROGRAM, 8, mz_state )
+	// bank 0: ram (mz700_bank1)
+	AM_RANGE(0x0000, 0x1fff) AM_RAM
+	// bank 1: devices (mz700_bank3)
+	AM_RANGE(0x2000, 0x2003) AM_MIRROR(0x1ff0) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
+	AM_RANGE(0x2004, 0x2007) AM_MIRROR(0x1ff0) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
+	AM_RANGE(0x2008, 0x200b) AM_MIRROR(0x1ff0) AM_READWRITE(mz700_e008_r,mz700_e008_w)
+	AM_RANGE(0x200c, 0x200f) AM_MIRROR(0x1ff0) AM_NOP
+	// bank 2: switched out (mz700_bank5)
+	AM_RANGE(0x4000, 0x5fff) AM_NOP
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( mz700_io, AS_IO, 8, mz_state )
@@ -111,6 +146,26 @@ static ADDRESS_MAP_START( mz700_io, AS_IO, 8, mz_state )
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( mz800_mem, AS_PROGRAM, 8, mz_state )
+	AM_RANGE(0x0000, 0x0fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
+	AM_RANGE(0x1000, 0x1fff) AM_RAMBANK("bank1")
+	AM_RANGE(0x2000, 0x7fff) AM_RAM
+	AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("banka")
+	AM_RANGE(0xc000, 0xcfff) AM_RAMBANK("bankc")
+	AM_RANGE(0xd000, 0xdfff) AM_RAMBANK("bankd")
+	AM_RANGE(0xe000, 0xffff) AM_DEVICE("bankf", address_map_bank_device, amap8)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( mz800_bankf, AS_PROGRAM, 8, mz_state )
+	// bank 0: ram (mz700_bank1)
+	AM_RANGE(0x0000, 0x1fff) AM_RAM
+	// bank 1: devices (mz700_bank3)
+	AM_RANGE(0x2000, 0x2003) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
+	AM_RANGE(0x2004, 0x2007) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
+	AM_RANGE(0x2008, 0x200b) AM_READWRITE(mz700_e008_r,mz700_e008_w)
+	AM_RANGE(0x200c, 0x200f) AM_NOP
+	AM_RANGE(0x2010, 0x3fff) AM_ROM AM_REGION("monitor", 0x2010)
+	// bank 2: switched out (mz700_bank5)
+	AM_RANGE(0x4000, 0x5fff) AM_NOP
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( mz800_io, AS_IO, 8, mz_state )
@@ -303,12 +358,11 @@ static const gfx_layout mz700_layout =
 };
 
 static GFXDECODE_START( mz700 )
-	GFXDECODE_ENTRY("cgrom", 0, mz700_layout, 0, 256)
+	GFXDECODE_ENTRY("cgrom", 0, mz700_layout, 0, 4)
 GFXDECODE_END
 
 static GFXDECODE_START( mz800 )
-	GFXDECODE_ENTRY(NULL, 0, mz700_layout, 0, 256)
-	GFXDECODE_ENTRY("monitor", 0x1000, mz700_layout, 0, 256)    // for mz800 viewer only
+	GFXDECODE_ENTRY("monitor", 0x1000, mz700_layout, 0, 4)    // for mz800 viewer only
 GFXDECODE_END
 
 
@@ -321,23 +375,28 @@ static MACHINE_CONFIG_START( mz700, mz_state )
 	MCFG_CPU_ADD("maincpu", Z80, XTAL_17_73447MHz/5)
 	MCFG_CPU_PROGRAM_MAP(mz700_mem)
 	MCFG_CPU_IO_MAP(mz700_io)
+	MCFG_DEVICE_ADD("banke", ADDRESS_MAP_BANK, 0)
+	MCFG_DEVICE_PROGRAM_MAP(mz700_banke)
+	MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+	MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
+	MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16)
+	MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
 
+	MCFG_MACHINE_RESET_OVERRIDE(mz_state, mz700)
 
 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
 	MCFG_SCREEN_RAW_PARAMS(XTAL_17_73447MHz/2, 568, 0, 40*8, 312, 0, 25*8)
 	MCFG_SCREEN_UPDATE_DRIVER(mz_state, screen_update_mz700)
 	MCFG_SCREEN_PALETTE("palette")
+	MCFG_PALETTE_ADD_3BIT_RGB("palette")
 
 	MCFG_GFXDECODE_ADD("gfxdecode", "palette", mz700)
-	MCFG_PALETTE_ADD("palette", 256*2)
-	MCFG_PALETTE_INDIRECT_ENTRIES(8)
-	MCFG_PALETTE_INIT_OWNER(mz_state, mz)
 
 	/* sound hardware */
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
-	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
+	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.05)
 	MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
 	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
 
@@ -376,16 +435,22 @@ MACHINE_CONFIG_END
 
 
 static MACHINE_CONFIG_DERIVED( mz800, mz700 )
+	MCFG_DEVICE_REMOVE("banke")
 
 	/* basic machine hardware */
 	MCFG_CPU_MODIFY("maincpu")
 	MCFG_CPU_PROGRAM_MAP(mz800_mem)
 	MCFG_CPU_IO_MAP(mz800_io)
+	MCFG_DEVICE_ADD("bankf", ADDRESS_MAP_BANK, 0)
+	MCFG_DEVICE_PROGRAM_MAP(mz800_bankf)
+	MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+	MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
+	MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16)
+	MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
 
+	MCFG_MACHINE_RESET_OVERRIDE(mz_state, mz800)
 	MCFG_GFXDECODE_MODIFY("gfxdecode",mz800)
 
-	MCFG_VIDEO_START_OVERRIDE(mz_state,mz800)
-
 	MCFG_SCREEN_MODIFY("screen")
 	MCFG_SCREEN_UPDATE_DRIVER(mz_state, screen_update_mz800)
 
@@ -435,14 +500,23 @@ ROM_END
 ROM_START( mz800 )
 	ROM_REGION( 0x4000, "monitor", 0 )
 	ROM_LOAD( "mz800.rom", 0x0000, 0x4000, CRC(600d17e1) SHA1(950ce4b51429916f8036e41ba6130fac149b36e4) )
+	// fix cassette loading
+	ROM_FILL(0x761,1,0x13)
+	ROM_FILL(0xA4B,1,0x45)
+
+	ROM_REGION( 0x10000, "user1", ROMREGION_ERASE00 ) // ramdisk
 ROM_END
 
 ROM_START( mz1500 )
 	ROM_REGION( 0x4000, "monitor", 0 )
-	ROM_LOAD( "9z-502m.rom",  0x0000, 0x2800, CRC(643db428) SHA1(c2ad8af2ef00db32afde54d5741b07de5d4da16a))
+	ROM_LOAD( "9z-502m.rom",  0x0000, 0x1000, CRC(643db428) SHA1(c2ad8af2ef00db32afde54d5741b07de5d4da16a))
+	ROM_CONTINUE(0x2800, 0x1800)
+
 	ROM_REGION( 0x1000, "cgrom", 0 )
 	//ROM_LOAD( "mz700fon.jp", 0x0000, 0x1000, CRC(697ec121) SHA1(5eb1d42d273b1fd2cab120486279ab8ff6c85dc7))
 	ROM_LOAD( "mz700fon.jpn", 0x0000, 0x1000, CRC(425eedf5) SHA1(bd2cc750f2d2f63e50a59786668509e81a276e32) )
+
+	ROM_REGION( 0x10000, "user1", ROMREGION_ERASE00 ) // ramdisk
 ROM_END
 
 /***************************************************************************
diff --git a/src/mame/includes/mz700.h b/src/mame/includes/mz700.h
index 6558180dbbd..7ddb1745c43 100644
--- a/src/mame/includes/mz700.h
+++ b/src/mame/includes/mz700.h
@@ -16,53 +16,26 @@
 #include "sound/speaker.h"
 #include "imagedev/cassette.h"
 #include "bus/centronics/ctronics.h"
+#include "machine/bankdev.h"
 #include "machine/ram.h"
 
 class mz_state : public driver_device
 {
 public:
 	mz_state(const machine_config &mconfig, device_type type, const char *tag)
-		: driver_device(mconfig, type, tag),
-		m_maincpu(*this, "maincpu"),
-		m_speaker(*this, "speaker"),
-		m_pit(*this, "pit8253"),
-		m_ppi(*this, "ppi8255"),
-		m_cassette(*this, "cassette"),
-		m_centronics(*this, "centronics"),
-		m_ram(*this, RAM_TAG),
-		m_gfxdecode(*this, "gfxdecode"),
-		m_palette(*this, "palette")  { }
+		: driver_device(mconfig, type, tag)
+		, m_maincpu(*this, "maincpu")
+		, m_speaker(*this, "speaker")
+		, m_pit(*this, "pit8253")
+		, m_ppi(*this, "ppi8255")
+		, m_cassette(*this, "cassette")
+		, m_centronics(*this, "centronics")
+		, m_ram(*this, RAM_TAG)
+		, m_palette(*this, "palette")
+		, m_banke(*this, "banke")
+		, m_bankf(*this, "bankf")
+		{ }
 
-	int m_mz700;                /* 1 if running on an mz700 */
-
-	int m_cursor_timer;
-	int m_other_timer;
-
-	int m_intmsk;   /* PPI8255 pin PC2 */
-
-	int m_mz700_ram_lock;       /* 1 if ram lock is active */
-	int m_mz700_ram_vram;       /* 1 if vram is banked in */
-
-	/* mz800 specific */
-	UINT8 *m_cgram;
-
-	int m_mz700_mode;           /* 1 if in mz700 mode */
-	int m_mz800_ram_lock;       /* 1 if lock is active */
-	int m_mz800_ram_monitor;    /* 1 if monitor rom banked in */
-
-	int m_hires_mode;           /* 1 if in 640x200 mode */
-	int m_screennum;           /* screen designation */
-
-	int m_centronics_busy;
-	int m_centronics_perror;
-
-	UINT8 *m_colorram;
-	UINT8 *m_videoram;
-	UINT8 m_speaker_level;
-	UINT8 m_prev_state;
-	UINT16 m_mz800_ramaddr;
-	UINT8 m_mz800_palette[4];
-	UINT8 m_mz800_palette_bank;
 	DECLARE_READ8_MEMBER(mz700_e008_r);
 	DECLARE_WRITE8_MEMBER(mz700_e008_w);
 	DECLARE_READ8_MEMBER(mz800_bank_0_r);
@@ -87,9 +60,9 @@ public:
 	DECLARE_WRITE8_MEMBER(mz800_cgram_w);
 	DECLARE_DRIVER_INIT(mz800);
 	DECLARE_DRIVER_INIT(mz700);
+	DECLARE_MACHINE_RESET(mz700);
+	DECLARE_MACHINE_RESET(mz800);
 	virtual void machine_start();
-	DECLARE_PALETTE_INIT(mz);
-	DECLARE_VIDEO_START(mz800);
 	UINT32 screen_update_mz700(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	UINT32 screen_update_mz800(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	TIMER_DEVICE_CALLBACK_MEMBER(ne556_cursor_callback);
@@ -105,6 +78,40 @@ public:
 	DECLARE_WRITE8_MEMBER(mz800_z80pio_port_a_w);
 	DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
 	DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
+
+private:
+	int m_mz700;                /* 1 if running on an mz700 */
+
+	int m_cursor_timer;
+	int m_other_timer;
+
+	int m_intmsk;   /* PPI8255 pin PC2 */
+
+	int m_mz700_ram_lock;       /* 1 if ram lock is active */
+	int m_mz700_ram_vram;       /* 1 if vram is banked in */
+
+	/* mz800 specific */
+	UINT8 *m_cgram;
+	UINT8 *m_p_chargen;
+
+	int m_mz700_mode;           /* 1 if in mz700 mode */
+	int m_mz800_ram_lock;       /* 1 if lock is active */
+	int m_mz800_ram_monitor;    /* 1 if monitor rom banked in */
+
+	int m_hires_mode;           /* 1 if in 640x200 mode */
+	int m_screennum;           /* screen designation */
+
+	int m_centronics_busy;
+	int m_centronics_perror;
+
+	UINT8 *m_colorram;
+	UINT8 *m_videoram;
+	UINT8 m_speaker_level;
+	UINT8 m_prev_state;
+	UINT16 m_mz800_ramaddr;
+	UINT8 m_mz800_palette[4];
+	UINT8 m_mz800_palette_bank;
+
 	required_device<cpu_device> m_maincpu;
 	required_device<speaker_sound_device> m_speaker;
 	required_device<pit8253_device> m_pit;
@@ -112,8 +119,9 @@ public:
 	required_device<cassette_image_device> m_cassette;
 	optional_device<centronics_device> m_centronics;
 	required_device<ram_device> m_ram;
-	required_device<gfxdecode_device> m_gfxdecode;
 	required_device<palette_device> m_palette;
+	optional_device<address_map_bank_device> m_banke;
+	optional_device<address_map_bank_device> m_bankf;
 };
 
 #endif /* MZ700_H_ */
diff --git a/src/mame/machine/mz700.c b/src/mame/machine/mz700.c
index a3a9f3514fa..af228e304d0 100644
--- a/src/mame/machine/mz700.c
+++ b/src/mame/machine/mz700.c
@@ -42,16 +42,24 @@ DRIVER_INIT_MEMBER(mz_state,mz700)
 	m_mz700 = TRUE;
 	m_mz700_mode = TRUE;
 
-	m_videoram = auto_alloc_array(machine(), UINT8, 0x800);
-	memset(m_videoram, 0, sizeof(UINT8) * 0x800);
-	m_colorram = auto_alloc_array(machine(), UINT8, 0x800);
-	memset(m_colorram, 0, sizeof(UINT8) * 0x800);
+	m_videoram = auto_alloc_array(machine(), UINT8, 0x1000);
+	memset(m_videoram, 0, sizeof(UINT8) * 0x1000);
+	m_colorram = m_videoram + 0x800;
+
+	m_p_chargen = memregion("cgrom")->base();
+	UINT8 *rom = memregion("monitor")->base();
+	UINT8 *ram = m_ram->pointer();
+	membank("bankr0")->configure_entry(0, &ram[0]); // ram
+	membank("bankr0")->configure_entry(1, &rom[0]); // rom
+	membank("bankw0")->configure_entry(0, &ram[0]); // ram
+	membank("bankd")->configure_entry(0, &ram[0xd000]); // ram
+	membank("bankd")->configure_entry(1, m_videoram); // vram
 }
 
 DRIVER_INIT_MEMBER(mz_state,mz800)
 {
 	m_mz700 = FALSE;
-	m_mz700_mode = FALSE;
+	m_mz700_mode = true;//FALSE;
 
 	/* video ram */
 	m_videoram = auto_alloc_array(machine(), UINT8, 0x4000);
@@ -61,12 +69,50 @@ DRIVER_INIT_MEMBER(mz_state,mz800)
 	/* character generator ram */
 	m_cgram = auto_alloc_array(machine(), UINT8, 0x1000);
 	memset(m_cgram, 0, sizeof(UINT8) * 0x1000);
+
+	m_p_chargen = memregion("cgrom")->base();
+	if (!m_p_chargen)
+		m_p_chargen = m_cgram;
+	UINT8 *rom = memregion("monitor")->base();
+	UINT8 *ram = m_ram->pointer();
+	// configure banks (0 = RAM in all cases)
+	membank("bankr0")->configure_entry(0, &ram[0]); // ram
+	membank("bankr0")->configure_entry(1, &rom[0]); // rom
+	membank("bankw0")->configure_entry(0, &ram[0]); // ram
+	membank("bank1")->configure_entry(0, &ram[0x1000]); // ram
+	membank("bank1")->configure_entry(1, &rom[0x1000]); // chargen
+	membank("banka")->configure_entry(0, &ram[0x8000]); // ram
+	membank("banka")->configure_entry(1, m_videoram); // vram in mz800 mode
+	membank("bankc")->configure_entry(0, &ram[0xc000]); // ram
+	membank("bankc")->configure_entry(1, m_cgram); // cgram in mz800 mode
+	membank("bankd")->configure_entry(0, &ram[0xd000]); // ram
+	membank("bankd")->configure_entry(1, m_videoram); // vram in mz700 mode
 }
 
 void mz_state::machine_start()
 {
 	/* reset memory map to defaults */
-	mz700_bank_4_w(m_maincpu->space(AS_PROGRAM), 0, 0);
+	mz700_bank_4_w(m_maincpu->space(AS_IO), 0, 0);
+}
+
+MACHINE_RESET_MEMBER( mz_state, mz700 )
+{
+	membank("bankr0")->set_entry(1); //rom
+	membank("bankw0")->set_entry(0); //ram
+	membank("bankd")->set_entry(1); //vram
+	m_banke->set_bank(1); //devices
+}
+
+MACHINE_RESET_MEMBER( mz_state, mz800 )
+{
+	// default to mz700 mode or mz1500 won't start.
+	membank("bankr0")->set_entry(1); //rom
+	membank("bankw0")->set_entry(0); //ram
+	membank("bank1")->set_entry(0); //ram
+	membank("banka")->set_entry(0); //ram
+	membank("bankc")->set_entry(0); //ram
+	membank("bankd")->set_entry(1); //vram
+	m_bankf->set_bank(1); //devices
 }
 
 
@@ -99,38 +145,41 @@ WRITE8_MEMBER(mz_state::mz700_e008_w)
 
 READ8_MEMBER(mz_state::mz800_bank_0_r)
 {
-	UINT8 *videoram = m_videoram;
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
 
 	/* switch in cgrom */
-	spc.install_read_bank(0x1000, 0x1fff, "bank2");
-	spc.nop_write(0x1000, 0x1fff);
-	membank("bank2")->set_base(memregion("monitor")->base() + 0x1000);
+	//spc.install_read_bank(0x1000, 0x1fff, "bank2");
+	//spc.nop_write(0x1000, 0x1fff);
+	//membank("bank2")->set_base(memregion("monitor")->base() + 0x1000);
+	membank("bank1")->set_entry(1);
 
 	if (m_mz700_mode)
 	{
 		/* cgram from 0xc000 to 0xcfff */
-		spc.install_read_bank(0xc000, 0xcfff, "bank6");
-		spc.install_write_handler(0xc000, 0xcfff, write8_delegate(FUNC(mz_state::mz800_cgram_w),this));
-		membank("bank6")->set_base(m_cgram);
+		//spc.install_read_bank(0xc000, 0xcfff, "bank6");
+		//spc.install_write_handler(0xc000, 0xcfff, write8_delegate(FUNC(mz_state::mz800_cgram_w),this));
+		//membank("bank6")->set_base(m_cgram);
+		membank("bankc")->set_entry(1);
 	}
 	else
 	{
 		if (m_hires_mode)
 		{
 			/* vram from 0x8000 to 0xbfff */
-			spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
-			membank("bank4")->set_base(videoram);
+			//spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
+			//membank("bank4")->set_base(m_videoram);
+			membank("banka")->set_entry(1);
 		}
 		else
 		{
 			/* vram from 0x8000 to 0x9fff */
-			spc.install_readwrite_bank(0x8000, 0x9fff, "bank4");
-			membank("bank4")->set_base(videoram);
+			//spc.install_readwrite_bank(0x8000, 0x9fff, "bank4");
+			//membank("bank4")->set_base(m_videoram);
 
 			/* ram from 0xa000 to 0xbfff */
-			spc.install_readwrite_bank(0xa000, 0xbfff, "bank5");
-			membank("bank5")->set_base(m_ram->pointer() + 0xa000);
+			//spc.install_readwrite_bank(0xa000, 0xbfff, "bank5");
+			//membank("bank5")->set_base(m_ram->pointer() + 0xa000);
+			membank("bank1")->set_entry(1);
 		}
 	}
 
@@ -141,16 +190,19 @@ WRITE8_MEMBER(mz_state::mz700_bank_0_w)
 {
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
 
-	spc.install_readwrite_bank(0x0000, 0x0fff, "bank1");
-	membank("bank1")->set_base(m_ram->pointer());
+	//spc.install_readwrite_bank(0x0000, 0x0fff, "bank1a");
+	//membank("bank1a")->set_base(m_ram->pointer());
+	membank("bankr0")->set_entry(0); // ram
 }
 
 WRITE8_MEMBER(mz_state::mz800_bank_0_w)
 {
-	address_space &spc = m_maincpu->space(AS_PROGRAM);
+	//address_space &spc = m_maincpu->space(AS_PROGRAM);
 
-	spc.install_readwrite_bank(0x0000, 0x7fff, "bank1");
-	membank("bank1")->set_base(m_ram->pointer());
+	//spc.install_readwrite_bank(0x0000, 0x7fff, "bank1a");
+	//membank("bank1a")->set_base(m_ram->pointer());
+	membank("bank1")->set_entry(0); // ram
+	membank("bankr0")->set_entry(0); // ram
 }
 
 READ8_MEMBER(mz_state::mz800_bank_1_r)
@@ -158,20 +210,23 @@ READ8_MEMBER(mz_state::mz800_bank_1_r)
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
 
 	/* switch in ram from 0x1000 to 0x1fff */
-	spc.install_readwrite_bank(0x1000, 0x1fff, "bank2");
-	membank("bank2")->set_base(m_ram->pointer() + 0x1000);
+	//spc.install_readwrite_bank(0x1000, 0x1fff, "bank2");
+	//membank("bank2")->set_base(m_ram->pointer() + 0x1000);
+	membank("bank1")->set_entry(0); // ram
 
 	if (m_mz700_mode)
 	{
 		/* ram from 0xc000 to 0xcfff */
-		spc.install_readwrite_bank(0xc000, 0xcfff, "bank6");
-		membank("bank6")->set_base(m_ram->pointer() + 0xc000);
+		//spc.install_readwrite_bank(0xc000, 0xcfff, "bank6");
+		//membank("bank6")->set_base(m_ram->pointer() + 0xc000);
+		membank("bankc")->set_entry(0); // ram
 	}
 	else
 	{
 		/* ram from 0x8000 to 0xbfff */
-		spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
-		membank("bank4")->set_base(m_ram->pointer() + 0x8000);
+		//spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
+		//membank("bank4")->set_base(m_ram->pointer() + 0x8000);
+		membank("banka")->set_entry(0); // ram
 	}
 
 	return 0xff;
@@ -180,14 +235,25 @@ READ8_MEMBER(mz_state::mz800_bank_1_r)
 WRITE8_MEMBER(mz_state::mz700_bank_1_w)
 {
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
+	membank("bankd")->set_entry(0); // ram
 
 	if (m_mz700_mode)
 	{
 		/* switch in ram when not locked */
 		if (!m_mz700_ram_lock)
 		{
-			spc.install_readwrite_bank(0xd000, 0xffff, "bank7");
-			membank("bank7")->set_base(m_ram->pointer() + 0xd000);
+			if (m_mz700)
+			{
+				//membank("bankd")->set_entry(0); // ram
+				m_banke->set_bank(0); //ram
+			}
+			else
+			{
+				//spc.install_readwrite_bank(0xd000, 0xffff, "bank7");
+				//spc.install_readwrite_bank(0xd000, 0xdfff, "bank7");
+				//membank("bank7")->set_base(m_ram->pointer() + 0xd000);
+				m_bankf->set_bank(0); //ram
+			}
 			m_mz700_ram_vram = FALSE;
 		}
 	}
@@ -196,8 +262,9 @@ WRITE8_MEMBER(mz_state::mz700_bank_1_w)
 		/* switch in ram when not locked */
 		if (!m_mz800_ram_lock)
 		{
-			spc.install_readwrite_bank(0xe000, 0xffff, "bank8");
-			membank("bank8")->set_base(m_ram->pointer() + 0xe000);
+			//spc.install_readwrite_bank(0xe000, 0xffff, "bank8");
+			//membank("bank8")->set_base(m_ram->pointer() + 0xe000);
+			m_bankf->set_bank(0); //ram
 			m_mz800_ram_monitor = FALSE;
 		}
 	}
@@ -205,44 +272,46 @@ WRITE8_MEMBER(mz_state::mz700_bank_1_w)
 
 WRITE8_MEMBER(mz_state::mz700_bank_2_w)
 {
-	address_space &spc = m_maincpu->space(AS_PROGRAM);
+	//address_space &spc = m_maincpu->space(AS_PROGRAM);
+
+	//spc.install_read_bank(0x0000, 0x0fff, "bank1a");
+	//spc.nop_write(0x0000, 0x0fff);
+	//membank("bank1a")->set_base(memregion("monitor")->base());
+	membank("bankr0")->set_entry(1); // rom
 
-	spc.install_read_bank(0x0000, 0x0fff, "bank1");
-	spc.nop_write(0x0000, 0x0fff);
-	membank("bank1")->set_base(memregion("monitor")->base());
 }
 
 WRITE8_MEMBER(mz_state::mz700_bank_3_w)
 {
-	UINT8 *videoram = m_videoram;
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
 
 	if (m_mz700_mode)
 	{
 		if (!m_mz700_ram_lock)
 		{
-			/* switch in videoram */
-			spc.install_readwrite_bank(0xd000, 0xd7ff, "bank7");
-			membank("bank7")->set_base(videoram);
-
-			/* switch in colorram */
-			spc.install_readwrite_bank(0xd800, 0xdfff, "bank9");
-			membank("bank9")->set_base(m_colorram);
+			if (m_mz700)
+				membank("bankd")->set_entry(1);
+			else
+			{
+				/* switch in videoram */
+				//spc.install_readwrite_bank(0xd000, 0xd7ff, "bank7");
+				//membank("bank7")->set_base(m_videoram);
 
+				/* switch in colorram */
+				//spc.install_readwrite_bank(0xd800, 0xdfff, "bank9");
+				//membank("bank9")->set_base(m_colorram);
+				membank("bankd")->set_entry(1);
+			}
 			m_mz700_ram_vram = TRUE;
 
 			/* switch in memory mapped i/o devices */
 			if (m_mz700)
 			{
-				spc.install_readwrite_handler(0xe000, 0xfff3, 0, 0x1ff0, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi));
-				spc.install_readwrite_handler(0xe004, 0xfff7, 0, 0x1ff0, read8_delegate(FUNC(pit8253_device::read), (pit8253_device*)m_pit), write8_delegate(FUNC(pit8253_device::write), (pit8253_device*)m_pit));
-				spc.install_readwrite_handler(0xe008, 0xfff8, 0, 0x1ff0, read8_delegate(FUNC(mz_state::mz700_e008_r),this), write8_delegate(FUNC(mz_state::mz700_e008_w),this));
+				m_banke->set_bank(1); //devices
 			}
 			else
 			{
-				spc.install_readwrite_handler(0xe000, 0xe003, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi));
-				spc.install_readwrite_handler(0xe004, 0xe007, read8_delegate(FUNC(pit8253_device::read), (pit8253_device*)m_pit), write8_delegate(FUNC(pit8253_device::write), (pit8253_device*)m_pit));
-				spc.install_readwrite_handler(0xe008, 0xe008, read8_delegate(FUNC(mz_state::mz700_e008_r),this), write8_delegate(FUNC(mz_state::mz700_e008_w),this));
+				m_bankf->set_bank(1); //devices
 			}
 		}
 	}
@@ -251,9 +320,10 @@ WRITE8_MEMBER(mz_state::mz700_bank_3_w)
 		if (!m_mz800_ram_lock)
 		{
 			/* switch in mz800 monitor rom if not locked */
-			spc.install_read_bank(0xe000, 0xffff, "bank8");
-			spc.nop_write(0xe000, 0xffff);
-			membank("bank8")->set_base(memregion("monitor")->base() + 0x2000);
+			//spc.install_read_bank(0xe000, 0xffff, "bank8");
+			//spc.nop_write(0xe000, 0xffff);
+			//membank("bank8")->set_base(memregion("monitor")->base() + 0x2000);
+			m_bankf->set_bank(1); // devices + rom
 			m_mz800_ram_monitor = TRUE;
 		}
 	}
@@ -261,7 +331,6 @@ WRITE8_MEMBER(mz_state::mz700_bank_3_w)
 
 WRITE8_MEMBER(mz_state::mz700_bank_4_w)
 {
-	UINT8 *videoram = m_videoram;
 	address_space &spc = m_maincpu->space(AS_PROGRAM);
 
 	if (m_mz700_mode)
@@ -270,46 +339,58 @@ WRITE8_MEMBER(mz_state::mz700_bank_4_w)
 		mz700_bank_2_w(space, 0, 0);    /* switch in monitor rom */
 		mz700_bank_3_w(space, 0, 0);    /* switch in videoram, colorram, and mmio */
 
-		/* rest is ram is always ram in mz700 mode */
-		spc.install_readwrite_bank(0x1000, 0xcfff, "bank2");
-		membank("bank2")->set_base(m_ram->pointer() + 0x1000);
+		if (!m_mz700)
+		{
+			/* rest is ram is always ram in mz700 mode */
+			//spc.install_readwrite_bank(0x1000, 0xcfff, "bank2");
+			//membank("bank2")->set_base(m_ram->pointer() + 0x1000);
+			membank("bankr0")->set_entry(1); // rom
+			membank("bank1")->set_entry(0); // ram
+			membank("bankc")->set_entry(0); // ram
+		}
 	}
 	else
 	{
 		/* monitor rom and cgrom */
-		spc.install_read_bank(0x0000, 0x1fff, "bank1");
-		spc.nop_write(0x0000, 0x1fff);
-		membank("bank1")->set_base(memregion("monitor")->base());
+		//spc.install_read_bank(0x0000, 0x1fff, "bank1a");
+		//spc.nop_write(0x0000, 0x1fff);
+		//membank("bank1a")->set_base(memregion("monitor")->base());
+		membank("bankr0")->set_entry(1); // rom
+		membank("bank1")->set_entry(1); // rom
 
 		/* ram from 0x2000 to 0x7fff */
-		spc.install_readwrite_bank(0x2000, 0x7fff, "bank3");
-		membank("bank3")->set_base(m_ram->pointer());
+		//spc.install_readwrite_bank(0x2000, 0x7fff, "bank3");
+		//membank("bank3")->set_base(m_ram->pointer());
 
 		if (m_hires_mode)
 		{
 			/* vram from 0x8000 to 0xbfff */
-			spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
-			membank("bank4")->set_base(videoram);
+			//spc.install_readwrite_bank(0x8000, 0xbfff, "bank4");
+			//membank("bank4")->set_base(m_videoram);
+			membank("banka")->set_entry(1); // vram
 		}
 		else
 		{
 			/* vram from 0x8000 to 0x9fff */
-			spc.install_readwrite_bank(0x8000, 0x9fff, "bank4");
-			membank("bank4")->set_base(videoram);
+			//spc.install_readwrite_bank(0x8000, 0x9fff, "bank4");
+			//membank("bank4")->set_base(m_videoram);
+			membank("banka")->set_entry(1); // vram
 
 			/* ram from 0xa000 to 0xbfff */
-			spc.install_readwrite_bank(0xa000, 0xbfff, "bank5");
-			membank("bank5")->set_base(m_ram->pointer() + 0xa000);
+			//spc.install_readwrite_bank(0xa000, 0xbfff, "bank5");
+			//membank("bank5")->set_base(m_ram->pointer() + 0xa000);
 		}
 
 		/* ram from 0xc000 to 0xdfff */
-		spc.install_readwrite_bank(0xc000, 0xdfff, "bank6");
-		membank("bank6")->set_base(m_ram->pointer() + 0xc000);
+		//spc.install_readwrite_bank(0xc000, 0xdfff, "bank6");
+		//membank("bank6")->set_base(m_ram->pointer() + 0xc000);
+		membank("bankd")->set_entry(0); // ram
 
 		/* mz800 monitor rom from 0xe000 to 0xffff */
-		spc.install_read_bank(0xe000, 0xffff, "bank8");
-		spc.nop_write(0xe000, 0xffff);
-		membank("bank8")->set_base(memregion("monitor")->base() + 0x2000);
+		//spc.install_read_bank(0xe000, 0xffff, "bank8");
+		//spc.nop_write(0xe000, 0xffff);
+		//membank("bank8")->set_base(memregion("monitor")->base() + 0x2000);
+		m_bankf->set_bank(1); // devices + rom
 		m_mz800_ram_monitor = TRUE;
 
 		m_mz800_ram_lock = FALSE; /* reset lock? */
@@ -324,13 +405,19 @@ WRITE8_MEMBER(mz_state::mz700_bank_5_w)
 	{
 		/* prevent access from 0xd000 to 0xffff */
 		m_mz700_ram_lock = TRUE;
-		spc.nop_readwrite(0xd000, 0xffff);
+		if (m_mz700)
+			m_banke->set_bank(2);
+		else
+			//spc.nop_readwrite(0xd000, 0xdfff);
+			//spc.nop_readwrite(0xd000, 0xffff);
+			m_bankf->set_bank(2);
 	}
 	else
 	{
 		/* prevent access from 0xe000 to 0xffff */
 		m_mz800_ram_lock = TRUE;
-		spc.nop_readwrite(0xe000, 0xffff);
+		//spc.nop_readwrite(0xe000, 0xffff);
+		m_bankf->set_bank(2);
 	}
 }
 
@@ -435,7 +522,7 @@ WRITE8_MEMBER(mz_state::pio_port_a_w)
 	LOG(2,"mz700_pio_port_a_w",("%02X\n", data),machine());
 
 	/* the ls145 is connected to PA0-PA3 */
-	dynamic_cast<ttl74145_device *>(device)->write(data & 0x07);
+	dynamic_cast<ttl74145_device *>(device)->write(data & 0x0f);
 
 	/* ne556 reset is connected to PA7 */
 	timer->enable(BIT(data, 7));
diff --git a/src/mame/video/mz700.c b/src/mame/video/mz700.c
index b3f08dad1a3..0944d17fd31 100644
--- a/src/mame/video/mz700.c
+++ b/src/mame/video/mz700.c
@@ -15,75 +15,54 @@
 #include "includes/mz700.h"
 
 
-#ifndef VERBOSE
-#define VERBOSE 1
-#endif
-
-#define LOG(N,M,A)  \
-	do { \
-		if(VERBOSE>=N) \
-		{ \
-			if( M ) \
-				logerror("%11.6f: %-24s",machine.time().as_double(),(char*)M ); \
-			logerror A; \
-		} \
-	} while (0)
-
-
-PALETTE_INIT_MEMBER(mz_state, mz)
-{
-	int i;
-
-	for (i = 0; i < 8; i++)
-		m_palette->set_indirect_color(i, rgb_t((i & 2) ? 0xff : 0x00, (i & 4) ? 0xff : 0x00, (i & 1) ? 0xff : 0x00));
-
-	for (i = 0; i < 256; i++)
-	{
-		m_palette->set_pen_indirect(i*2, i & 7);
-			m_palette->set_pen_indirect(i*2+1, (i >> 4) & 7);
-	}
-}
-
-
 UINT32 mz_state::screen_update_mz700(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
 {
-	UINT8 *videoram = m_videoram;
-	int offs;
+	UINT8 y,ra,gfx,col,bg=0,fg=0,oldcol=0x7e;
+	UINT16 sy=0,ma=0,x,chr;
 
-	bitmap.fill(m_palette->black_pen(), cliprect);
-
-	for(offs = 0; offs < 40*25; offs++)
+	for (y = 0; y < 25; y++)
 	{
-		int sx, sy, code, color;
+		for (ra = 0; ra < 8; ra++)
+		{
+			UINT16 *p = &bitmap.pix16(sy++);
 
-		sy = (offs / 40) * 8;
-		sx = (offs % 40) * 8;
+			for (x = ma; x < ma + 40; x++)
+			{
+				col = m_colorram[x];
+				if (col != oldcol)
+				{
+					oldcol = col;
+					col = BITSWAP8(col, 7, 3, 4, 6, 5, 0, 2, 1); // turn BRG into RGB
+					bg = col & 7;
+					fg = (col >> 3) & 7;
+				}
+				chr = m_videoram[x] | (BIT(col, 7)<<8);
+				gfx = m_p_chargen[(chr<<3) | ra ];
 
-		color = m_colorram[offs];
-		code = videoram[offs] | (color & 0x80) << 1;
-
-		m_gfxdecode->gfx(0)->opaque(bitmap,cliprect, code, color, 0, 0, sx, sy);
+				/* Display a scanline of a character */
+				*p++ = BIT(gfx, 0) ? fg : bg;
+				*p++ = BIT(gfx, 1) ? fg : bg;
+				*p++ = BIT(gfx, 2) ? fg : bg;
+				*p++ = BIT(gfx, 3) ? fg : bg;
+				*p++ = BIT(gfx, 4) ? fg : bg;
+				*p++ = BIT(gfx, 5) ? fg : bg;
+				*p++ = BIT(gfx, 6) ? fg : bg;
+				*p++ = BIT(gfx, 7) ? fg : bg;
+			}
+		}
+		ma+=40;
 	}
-
 	return 0;
 }
 
 
 /***************************************************************************
     MZ-800
+    Not working.
 ***************************************************************************/
 
-VIDEO_START_MEMBER(mz_state,mz800)
-{
-	m_gfxdecode->gfx(0)->set_source(m_cgram);
-}
-
 UINT32 mz_state::screen_update_mz800(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
 {
-	UINT8 *videoram = m_videoram;
-
-	bitmap.fill(m_palette->black_pen(), cliprect);
-
 	if (m_mz700_mode)
 		return screen_update_mz700(screen, bitmap, cliprect);
 	else
@@ -94,20 +73,19 @@ UINT32 mz_state::screen_update_mz800(screen_device &screen, bitmap_ind16 &bitmap
 		else
 		{
 			int x, y;
-			UINT8 *start_addr = videoram;
 
 			for (x = 0; x < 40; x++)
 			{
 				for (y = 0; y < 200; y++)
 				{
-					bitmap.pix16(y, x * 8 + 0) = BIT(start_addr[x * 8 + y], 0);
-					bitmap.pix16(y, x * 8 + 1) = BIT(start_addr[x * 8 + y], 1);
-					bitmap.pix16(y, x * 8 + 2) = BIT(start_addr[x * 8 + y], 2);
-					bitmap.pix16(y, x * 8 + 3) = BIT(start_addr[x * 8 + y], 3);
-					bitmap.pix16(y, x * 8 + 4) = BIT(start_addr[x * 8 + y], 4);
-					bitmap.pix16(y, x * 8 + 5) = BIT(start_addr[x * 8 + y], 5);
-					bitmap.pix16(y, x * 8 + 6) = BIT(start_addr[x * 8 + y], 6);
-					bitmap.pix16(y, x * 8 + 7) = BIT(start_addr[x * 8 + y], 7);
+					bitmap.pix16(y, x * 8 + 0) = BIT(m_videoram[x * 8 + y], 0) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 1) = BIT(m_videoram[x * 8 + y], 1) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 2) = BIT(m_videoram[x * 8 + y], 2) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 3) = BIT(m_videoram[x * 8 + y], 3) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 4) = BIT(m_videoram[x * 8 + y], 4) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 5) = BIT(m_videoram[x * 8 + y], 5) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 6) = BIT(m_videoram[x * 8 + y], 6) ? 7 : 0;
+					bitmap.pix16(y, x * 8 + 7) = BIT(m_videoram[x * 8 + y], 7) ? 7 : 0;
 				}
 			}
 		}
@@ -123,6 +101,4 @@ UINT32 mz_state::screen_update_mz800(screen_device &screen, bitmap_ind16 &bitmap
 WRITE8_MEMBER(mz_state::mz800_cgram_w)
 {
 	m_cgram[offset] = data;
-
-	m_gfxdecode->gfx(0)->mark_dirty(offset/8);
 }