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https://github.com/holub/mame
synced 2025-06-10 06:47:18 +03:00
n2a03: Put a second irq line logically-ored with the normal one [O. Galibert]
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commit
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@ -96,6 +96,7 @@ void m6502_device::init()
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save_item(NAME(IR));
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save_item(NAME(IR));
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save_item(NAME(nmi_state));
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save_item(NAME(nmi_state));
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save_item(NAME(irq_state));
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save_item(NAME(irq_state));
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save_item(NAME(apu_irq_state));
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save_item(NAME(v_state));
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save_item(NAME(v_state));
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save_item(NAME(inst_state));
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save_item(NAME(inst_state));
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save_item(NAME(inst_substate));
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save_item(NAME(inst_substate));
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@ -116,6 +117,7 @@ void m6502_device::init()
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IR = 0x00;
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IR = 0x00;
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nmi_state = false;
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nmi_state = false;
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irq_state = false;
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irq_state = false;
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apu_irq_state = false;
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irq_taken = false;
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irq_taken = false;
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v_state = false;
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v_state = false;
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inst_state = STATE_RESET;
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inst_state = STATE_RESET;
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@ -131,6 +133,7 @@ void m6502_device::device_reset()
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inst_substate = 0;
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inst_substate = 0;
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nmi_state = false;
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nmi_state = false;
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irq_state = false;
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irq_state = false;
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apu_irq_state = false;
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irq_taken = false;
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irq_taken = false;
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v_state = false;
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v_state = false;
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end_cycles = 0;
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end_cycles = 0;
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@ -416,6 +419,7 @@ void m6502_device::execute_set_input(int inputnum, int state)
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{
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{
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switch(inputnum) {
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switch(inputnum) {
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case IRQ_LINE: irq_state = state == ASSERT_LINE; break;
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case IRQ_LINE: irq_state = state == ASSERT_LINE; break;
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case APU_IRQ_LINE: apu_irq_state = state == ASSERT_LINE; break;
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case NMI_LINE: nmi_state = nmi_state || (state == ASSERT_LINE); break;
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case NMI_LINE: nmi_state = nmi_state || (state == ASSERT_LINE); break;
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case V_LINE:
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case V_LINE:
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if(!v_state && state == ASSERT_LINE)
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if(!v_state && state == ASSERT_LINE)
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@ -612,7 +616,7 @@ void m6502_device::prefetch()
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IR = mintf->read_decrypted(PC);
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IR = mintf->read_decrypted(PC);
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sync = false;
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sync = false;
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if((nmi_state || (irq_state && !(P & F_I))) && !inhibit_interrupts) {
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if((nmi_state || ((irq_state || apu_irq_state) && !(P & F_I))) && !inhibit_interrupts) {
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irq_taken = true;
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irq_taken = true;
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IR = 0x00;
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IR = 0x00;
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} else
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} else
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@ -47,6 +47,7 @@ class m6502_device : public cpu_device {
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public:
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public:
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enum {
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enum {
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IRQ_LINE = INPUT_LINE_IRQ0,
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IRQ_LINE = INPUT_LINE_IRQ0,
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APU_IRQ_LINE = INPUT_LINE_IRQ1,
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NMI_LINE = INPUT_LINE_NMI,
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NMI_LINE = INPUT_LINE_NMI,
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V_LINE = 10
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V_LINE = 10
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};
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};
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@ -176,7 +177,7 @@ protected:
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memory_interface *mintf;
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memory_interface *mintf;
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int inst_state, inst_substate;
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int inst_state, inst_substate;
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int icount;
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int icount;
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bool nmi_state, irq_state, v_state;
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bool nmi_state, irq_state, apu_irq_state, v_state;
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bool irq_taken, sync, direct_disabled, inhibit_interrupts;
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bool irq_taken, sync, direct_disabled, inhibit_interrupts;
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UINT64 end_cycles;
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UINT64 end_cycles;
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@ -87,6 +87,7 @@ protected:
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enum {
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enum {
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N2A03_IRQ_LINE = m6502_device::IRQ_LINE,
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N2A03_IRQ_LINE = m6502_device::IRQ_LINE,
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N2A03_APU_IRQ_LINE = m6502_device::APU_IRQ_LINE,
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N2A03_NMI_LINE = m6502_device::NMI_LINE,
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N2A03_NMI_LINE = m6502_device::NMI_LINE,
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N2A03_SET_OVERFLOW = m6502_device::V_LINE,
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N2A03_SET_OVERFLOW = m6502_device::V_LINE,
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};
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};
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@ -371,7 +371,7 @@ static int8 apu_dpcm(nesapu_state *info, dpcm_t *chan)
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if (chan->regs[0] & 0x80) /* IRQ Generator */
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if (chan->regs[0] & 0x80) /* IRQ Generator */
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{
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{
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chan->irq_occurred = TRUE;
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chan->irq_occurred = TRUE;
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downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_IRQ_LINE, ASSERT_LINE);
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downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, ASSERT_LINE);
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}
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}
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break;
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break;
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}
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}
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@ -521,7 +521,7 @@ INLINE void apu_regwrite(nesapu_state *info,int address, uint8 value)
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case APU_WRE0:
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case APU_WRE0:
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info->APU.dpcm.regs[0] = value;
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info->APU.dpcm.regs[0] = value;
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if (0 == (value & 0x80)) {
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if (0 == (value & 0x80)) {
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downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_IRQ_LINE, CLEAR_LINE);
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downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, CLEAR_LINE);
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info->APU.dpcm.irq_occurred = FALSE;
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info->APU.dpcm.irq_occurred = FALSE;
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}
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}
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break;
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break;
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