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https://github.com/holub/mame
synced 2025-05-21 13:18:56 +03:00
Sync latest ASC from MESS (no whatsnew)
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@ -101,6 +101,14 @@ device_t *asc_device_config::alloc_device(running_machine &machine) const
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// LIVE DEVICE
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//**************************************************************************
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// does nothing, this timer exists only to make MAME sync itself at our audio rate
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static TIMER_CALLBACK( sync_timer_cb )
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{
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asc_device *pDevice = (asc_device *)ptr;
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stream_update(pDevice->m_stream);
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}
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//-------------------------------------------------
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// asc_device - constructor
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//-------------------------------------------------
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@ -125,6 +133,8 @@ void asc_device::device_start()
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m_stream = stream_create(this, 0, 2, 22257, this, static_stream_generate);
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memset(m_regs, 0, sizeof(m_regs));
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m_sync_timer = timer_alloc(this->machine, sync_timer_cb, this);
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}
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@ -198,12 +208,10 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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m_fifo_cap_b--;
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}
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if ((m_fifo_cap_a) || (m_fifo_cap_b))
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{
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switch (m_chip_type)
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{
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case ASC_TYPE_SONORA:
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if (m_fifo_cap_a <= 0x200)
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if (m_fifo_cap_a < 0x200)
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{
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m_regs[R_FIFOSTAT-0x800] |= 0x4; // fifo less than half full
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m_regs[R_FIFOSTAT-0x800] |= 0x8; // just pass the damn test
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@ -215,7 +223,7 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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break;
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default:
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if (m_fifo_cap_a <= 0x200)
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if (m_fifo_cap_a == 0x1ff)
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{
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m_regs[R_FIFOSTAT-0x800] |= 1; // fifo A half-empty
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if (m_irq_cb)
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@ -223,9 +231,16 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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m_irq_cb(this, 1);
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}
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}
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else if (m_fifo_cap_a == 0x1) // fifo A fully empty
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{
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m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A empty
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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// don't update for non-(E)ASC
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if (m_fifo_cap_b <= 0x200)
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if (m_fifo_cap_b == 0x1ff)
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{
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m_regs[R_FIFOSTAT-0x800] |= 4; // fifo B half-empty
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if (m_irq_cb)
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@ -233,9 +248,16 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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m_irq_cb(this, 1);
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}
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}
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break;
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else if (m_fifo_cap_b == 0x1) // fifo B fully empty
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{
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m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B empty
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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break;
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}
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outL[i] = smpll * 64;
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outR[i] = smplr * 64;
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@ -274,6 +296,8 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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}
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break;
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}
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// printf("rdA %04x rdB %04x wrA %04x wrB %04x (capA %04x B %04x)\n", m_fifo_a_rdptr, m_fifo_b_rdptr, m_fifo_a_wrptr, m_fifo_b_wrptr, m_fifo_cap_a, m_fifo_cap_b);
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}
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//-------------------------------------------------
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@ -358,10 +382,12 @@ UINT8 asc_device::read(UINT16 offset)
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rv = m_regs[R_FIFOSTAT-0x800];
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}
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// printf("Read FIFO stat = %02x\n", rv);
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// reading this register clears all bits
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m_regs[R_FIFOSTAT-0x800] = 0;
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// reading this clears interrupts?
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// reading this clears interrupts
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if (m_irq_cb)
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{
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m_irq_cb(this, 0);
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@ -425,7 +451,7 @@ void asc_device::write(UINT16 offset, UINT8 data)
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m_fifo_a[m_fifo_a_wrptr++] = data;
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m_fifo_cap_a++;
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if (m_fifo_cap_a == 0x800)
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if (m_fifo_cap_a == 0x3ff)
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{
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m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A full
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}
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@ -444,7 +470,7 @@ void asc_device::write(UINT16 offset, UINT8 data)
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m_fifo_b[m_fifo_b_wrptr++] = data;
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m_fifo_cap_b++;
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if (m_fifo_cap_b == 0x800)
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if (m_fifo_cap_b == 0x3ff)
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{
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m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B full
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}
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@ -471,6 +497,15 @@ void asc_device::write(UINT16 offset, UINT8 data)
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m_fifo_a_rdptr = m_fifo_b_rdptr = 0;
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m_fifo_a_wrptr = m_fifo_b_wrptr = 0;
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m_fifo_cap_a = m_fifo_cap_b = 0;
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if (data != 0)
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{
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timer_adjust_periodic(m_sync_timer, attotime_zero, 0, ATTOTIME_IN_HZ(22257/4));
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}
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else
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{
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timer_adjust_oneshot(m_sync_timer, attotime_never, 0);
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}
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}
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break;
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@ -99,6 +99,8 @@ public:
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UINT8 read(UINT16 offset);
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void write(UINT16 offset, UINT8 data);
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sound_stream *m_stream;
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protected:
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enum
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{
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@ -133,7 +135,6 @@ protected:
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UINT8 m_chip_type;
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void (*m_irq_cb)(running_device *device, int state);
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sound_stream *m_stream;
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UINT8 m_fifo_a[0x400];
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UINT8 m_fifo_b[0x400];
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@ -145,6 +146,8 @@ protected:
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int m_fifo_a_rdptr, m_fifo_b_rdptr;
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int m_fifo_a_wrptr, m_fifo_b_wrptr;
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int m_fifo_cap_a, m_fifo_cap_b;
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emu_timer *m_sync_timer;
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};
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