-bus/coco/coco_ram.cpp: fix a rather obvious bug in shift/mask

-misc. formatting consistency
This commit is contained in:
Vas Crabb 2020-06-25 10:54:22 +10:00
parent 731fbe1975
commit a335166ec2
4 changed files with 31 additions and 36 deletions

View File

@ -12,7 +12,7 @@
#include "emu.h" #include "emu.h"
#include "coco_ram.h" #include "coco_ram.h"
#include "cococart.h"
#include "machine/ram.h" #include "machine/ram.h"
#define STATICRAM_TAG "static_ram" #define STATICRAM_TAG "static_ram"
@ -53,7 +53,7 @@ namespace
private: private:
required_device<ram_device> m_staticram; required_device<ram_device> m_staticram;
int m_offset; u32 m_offset;
}; };
}; };
@ -126,19 +126,19 @@ void coco_pak_ram_device::scs_write(offs_t offset, u8 data)
{ {
// int idata = data; // int idata = data;
switch(offset) switch (offset)
{ {
case 0: case 0:
m_offset = ((m_offset & 0xffff00) + data); m_offset = (m_offset & 0xffff00) | u32(data);
break; break;
case 1: case 1:
m_offset = ((m_offset & 0xff00ff) + (data << 8)); m_offset = (m_offset & 0xff00ff) | (u32(data) << 8);
break; break;
case 2: case 2:
m_offset = ((m_offset & 0x00ffff) + (data << 16)); m_offset = (m_offset & 0x00ffff) | (u32(data) << 16);
break; break;
case 3: case 3:
if( m_offset < BUFFER_SIZE ) if (m_offset < BUFFER_SIZE)
{ {
m_staticram->write(m_offset, data); m_staticram->write(m_offset, data);
} }
@ -161,20 +161,19 @@ u8 coco_pak_ram_device::scs_read(offs_t offset)
switch (offset) switch (offset)
{ {
case 0: case 0:
data = (m_offset) & 0xff; data = u8(m_offset & 0x00ff);
break; break;
case 1: case 1:
data = (m_offset & 0xff00ff) >> 8; data = u8((m_offset >> 8) & 0x00ff);
break; break;
case 2: case 2:
data = (m_offset & 0xff0000) >> 16; data = u8((m_offset >> 16) & 0x00ff);
break; break;
case 3: case 3:
if( m_offset < BUFFER_SIZE ) if (m_offset < BUFFER_SIZE)
{ {
data = m_staticram->read(m_offset); data = m_staticram->read(m_offset);
} }
break; break;
} }

View File

@ -107,7 +107,7 @@ void i960_cpu_device::send_iac(uint32_t adr)
logerror("I960: %x: IAC %08x %08x %08x %08x (invalidate internal instruction cache)\n", m_PIP, iac[0], iac[1], iac[2], iac[3]); logerror("I960: %x: IAC %08x %08x %08x %08x (invalidate internal instruction cache)\n", m_PIP, iac[0], iac[1], iac[2], iac[3]);
// we do not emulate the instruction cache, so this is safe to ignore // we do not emulate the instruction cache, so this is safe to ignore
break; break;
case 0x8F: // enable/disable breakpoints case 0x8f: // enable/disable breakpoints
logerror("I960: %x: IAC %08x %08x %08x %08x (enable/disable breakpoints)\n", m_PIP, iac[0], iac[1], iac[2], iac[3]); logerror("I960: %x: IAC %08x %08x %08x %08x (enable/disable breakpoints)\n", m_PIP, iac[0], iac[1], iac[2], iac[3]);
// processor breakpoints are not emulated, safe to ignore // processor breakpoints are not emulated, safe to ignore
break; break;

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@ -881,7 +881,7 @@ const natural_keyboard::keycode_map_entry *natural_keyboard::find_code(char32_t
{ {
keycode_map::const_iterator const found(m_keycode_map.find(ch)); keycode_map::const_iterator const found(m_keycode_map.find(ch));
if (m_keycode_map.end() == found) return nullptr; if (m_keycode_map.end() == found) return nullptr;
for(const keycode_map_entry &entry : found->second) for (keycode_map_entry const &entry : found->second)
{ {
if (entry.condition.eval()) if (entry.condition.eval())
return &entry; return &entry;

View File

@ -81,39 +81,35 @@ void gscpm_state::cflash_w(offs_t offset, uint8_t data)
uint8_t gscpm_state::sio_r(offs_t offset) uint8_t gscpm_state::sio_r(offs_t offset)
{ {
switch(offset & 3) switch (offset & 3)
{ {
case 0x00: case 0x00:
return m_sio->da_r(); return m_sio->da_r();
break; case 0x01:
case 0x01: return m_sio->db_r();
return m_sio->db_r(); case 0x02:
break; return m_sio->ca_r();
case 0x02: case 0x03:
return m_sio->ca_r(); return m_sio->cb_r();
break;
case 0x03:
return m_sio->cb_r();
break;
} }
return 0x00; // can't happen return 0x00; // can't happen
} }
void gscpm_state::sio_w(offs_t offset, uint8_t data) void gscpm_state::sio_w(offs_t offset, uint8_t data)
{ {
switch(offset & 3) switch (offset & 3)
{ {
case 0x00: case 0x00:
m_sio->da_w(data); m_sio->da_w(data);
break; break;
case 0x01: case 0x01:
m_sio->db_w(data); m_sio->db_w(data);
break; break;
case 0x02: case 0x02:
m_sio->ca_w(data); m_sio->ca_w(data);
break; break;
case 0x03: case 0x03:
m_sio->cb_w(data); m_sio->cb_w(data);
break; break;
} }
} }