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mcr.c: fix generic_paletteram regression (nw)

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This commit is contained in:
Alex W. Jackson 2014-04-30 23:23:30 +00:00
parent 4484d8d0a8
commit a33b7c10c0
6 changed files with 16 additions and 24 deletions
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2
src/mame/drivers/mcr.c
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@ -822,7 +822,7 @@ static ADDRESS_MAP_START( cpu_91490_map, AS_PROGRAM, 8, mcr_state )
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xe800, 0xe9ff) AM_MIRROR(0x0200) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(mcr_91490_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xf800, 0xf87f) AM_MIRROR(0x0780) AM_WRITE(mcr_91490_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0xf800, 0xf87f) AM_MIRROR(0x0780) AM_WRITE(mcr_paletteram9_w) AM_SHARE("paletteram")
ADDRESS_MAP_END
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */

6
src/mame/drivers/mcr3.c
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@ -485,7 +485,7 @@ static ADDRESS_MAP_START( mcrmono_map, AS_PROGRAM, 8, mcr3_state )
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xe800, 0xe9ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xea00, 0xebff) AM_RAM
AM_RANGE(0xec00, 0xec7f) AM_MIRROR(0x0380) AM_WRITE(mcr3_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0xec00, 0xec7f) AM_MIRROR(0x0380) AM_WRITE(mcr_paletteram9_w) AM_SHARE("paletteram")
AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(mcr3_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xf800, 0xffff) AM_ROM /* schematics show a 2716 @ 2B here, but nobody used it */
ADDRESS_MAP_END
@ -520,7 +520,7 @@ static ADDRESS_MAP_START( spyhunt_map, AS_PROGRAM, 8, mcr3_state )
AM_RANGE(0xe800, 0xebff) AM_MIRROR(0x0400) AM_RAM_WRITE(spyhunt_alpharam_w) AM_SHARE("spyhunt_alpha")
AM_RANGE(0xf000, 0xf7ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xf800, 0xf9ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xfa00, 0xfa7f) AM_MIRROR(0x0180) AM_WRITE(mcr3_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0xfa00, 0xfa7f) AM_MIRROR(0x0180) AM_WRITE(mcr_paletteram9_w) AM_SHARE("paletteram")
ADDRESS_MAP_END
/* upper I/O map determined by PAL; only SSIO ports and scroll registers are verified from schematics */
@ -554,7 +554,7 @@ static ADDRESS_MAP_START( spyhuntpr_map, AS_PROGRAM, 8, mcr3_state )
AM_RANGE(0xe800, 0xebff) AM_MIRROR(0x0400) AM_RAM_WRITE(spyhunt_alpharam_w) AM_SHARE("spyhunt_alpha")
AM_RANGE(0xf000, 0xf7ff) AM_RAM //AM_SHARE("nvram")
AM_RANGE(0xf800, 0xf9ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xfa00, 0xfa7f) AM_MIRROR(0x0180) AM_RAM AM_WRITE(spyhuntpr_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0xfa00, 0xfa7f) AM_MIRROR(0x0180) AM_RAM_WRITE(spyhuntpr_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("DSW0")
AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("DSW1")

9
src/mame/includes/mcr.h
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@ -27,6 +27,7 @@ public:
m_ipu(*this, "ipu"),
m_spriteram(*this, "spriteram"),
m_videoram(*this, "videoram"),
m_paletteram(*this, "paletteram"),
m_ssio(*this, "ssio"),
m_chip_squeak_deluxe(*this, "csd"),
m_sounds_good(*this, "sg"),
@ -36,9 +37,7 @@ public:
m_dpoker_hopper_timer(*this, "dp_hopper"),
m_samples(*this, "samples"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_generic_paletteram_8(*this, "paletteram")
{ }
m_palette(*this, "palette") { }
// these should be required but can't because mcr68 shares with us
// once the sound boards are properly device-ified, fix this
@ -46,6 +45,7 @@ public:
optional_device<cpu_device> m_ipu;
optional_shared_ptr<UINT8> m_spriteram;
optional_shared_ptr<UINT8> m_videoram;
optional_shared_ptr<UINT8> m_paletteram;
optional_device<midway_ssio_device> m_ssio;
optional_device<midway_chip_squeak_deluxe_device> m_chip_squeak_deluxe;
@ -57,13 +57,12 @@ public:
optional_device<samples_device> m_samples;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_shared_ptr<UINT8> m_generic_paletteram_8;
DECLARE_WRITE8_MEMBER(mcr_control_port_w);
DECLARE_WRITE8_MEMBER(mcr_ipu_laserdisk_w);
DECLARE_READ8_MEMBER(mcr_ipu_watchdog_r);
DECLARE_WRITE8_MEMBER(mcr_ipu_watchdog_w);
DECLARE_WRITE8_MEMBER(mcr_91490_paletteram_w);
DECLARE_WRITE8_MEMBER(mcr_paletteram9_w);
DECLARE_WRITE8_MEMBER(mcr_90009_videoram_w);
DECLARE_WRITE8_MEMBER(mcr_90010_videoram_w);
DECLARE_READ8_MEMBER(twotiger_videoram_r);

1
src/mame/includes/mcr3.h
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@ -23,7 +23,6 @@ public:
INT16 m_spyhunt_scrolly;
tilemap_t *m_bg_tilemap;
tilemap_t *m_alpha_tilemap;
DECLARE_WRITE8_MEMBER(mcr3_paletteram_w);
DECLARE_WRITE8_MEMBER(spyhuntpr_paletteram_w);
DECLARE_WRITE8_MEMBER(mcr3_videoram_w);
DECLARE_WRITE8_MEMBER(spyhunt_videoram_w);

11
src/mame/video/mcr.c
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@ -167,11 +167,14 @@ void mcr_state::journey_set_color(int index, int data)
}
WRITE8_MEMBER(mcr_state::mcr_91490_paletteram_w)
WRITE8_MEMBER(mcr_state::mcr_paletteram9_w)
{
m_generic_paletteram_8[offset] = data;
offset &= 0x7f;
mcr_set_color((offset / 2) & 0x3f, data | ((offset & 1) << 8));
// palette RAM is actually 9 bit (a 93419 SRAM)
// however, there is no way for the CPU to read back
// the high bit, because D8 of the SRAM is connected
// to A0 of the bus rather than to a data line
m_paletteram[offset] = data;
mcr_set_color(offset / 2, data | ((offset & 1) << 8));
}

11
src/mame/video/mcr3.c
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@ -148,18 +148,9 @@ VIDEO_START_MEMBER(mcr3_state,spyhuntpr)
*
*************************************/
WRITE8_MEMBER(mcr3_state::mcr3_paletteram_w)
{
m_generic_paletteram_8[offset] = data;
offset &= 0x7f;
/* high bit of red comes from low bit of address */
m_palette->set_pen_color(offset / 2, pal3bit(((offset & 1) << 2) + (data >> 6)), pal3bit(data >> 0), pal3bit(data >> 3));
}
WRITE8_MEMBER(mcr3_state::spyhuntpr_paletteram_w)
{
m_generic_paletteram_8[offset] = data;
m_paletteram[offset] = data;
offset = (offset & 0x0f) | (offset & 0x60) >> 1;
int r = (data & 0x07) >> 0;