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https://github.com/holub/mame
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dsp16: Added 16-bit immediate load opcode. [Andrew Gardner]
Fixed reset behavior. Code reorganization.
This commit is contained in:
Andrew Gardner
parent
b547e0ac7b
commit
a33f00ff55
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -346,6 +346,7 @@ src/emu/cpu/drcumlsh.h svneol=native#text/plain
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src/emu/cpu/dsp16/dsp16.c svneol=native#text/plain
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src/emu/cpu/dsp16/dsp16.h svneol=native#text/plain
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src/emu/cpu/dsp16/dsp16dis.c svneol=native#text/plain
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src/emu/cpu/dsp16/dsp16ops.c svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32.c svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32.h svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32dis.c svneol=native#text/plain
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@ -197,7 +197,8 @@ CPUOBJS += $(CPUOBJ)/dsp16/dsp16.o
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DASMOBJS += $(CPUOBJ)/dsp16/dsp16dis.o
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endif
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$(CPUOBJ)/dsp16/dsp16.o: $(CPUSRC)/dsp16/dsp16.c \
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$(CPUOBJ)/dsp16/dsp16.o: $(CPUSRC)/dsp16/dsp16ops.c \
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$(CPUSRC)/dsp16/dsp16.c \
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$(CPUSRC)/dsp16/dsp16.h
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@ -137,7 +137,14 @@ void dsp16_device::device_start()
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void dsp16_device::device_reset()
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{
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m_pc = m_ppc = 0x0000;
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// Page 7-5
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m_pc = 0x0000;
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m_sioc = 0x0000;
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m_pioc = 0x0008;
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m_rb = 0x0000;
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m_re = 0x0000;
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// AUC is not affected by reset
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m_ppc = m_pc;
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}
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@ -163,7 +170,7 @@ void dsp16_device::state_string_export(const device_state_entry &entry, astring
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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string.printf("(see below)");
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string.printf("(multiple below)");
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break;
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// Placeholder for a better view later (TODO)
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@ -294,248 +301,4 @@ void dsp16_device::execute_run()
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} while (m_icount > 0);
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}
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void dsp16_device::execute_one(const UINT16 op, UINT8& cycles, UINT8& pcAdvance)
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{
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cycles = 1;
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pcAdvance = 1;
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const UINT8 opcode = (op >> 11) & 0x1f;
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switch(opcode)
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{
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// Format 1: Multiply/ALU Read/Write Group
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case 0x06:
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{
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// F1, Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x04: case 0x1c:
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{
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// F1 Y=a0[1] | F1 Y=a1[1]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x16:
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{
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// F1, x = Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x17:
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{
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// F1, y[l] = Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x1f:
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{
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// F1, y = Y, x = *pt++[i]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x19: case 0x1b:
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{
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// F1, y = a0|1, x = *pt++[i]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x14:
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{
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// F1, Y = y[1]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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// Format 1a: Multiply/ALU Read/Write Group (major typo in docs on p3-51)
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case 0x07:
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{
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// F1, At[1] = Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 aT = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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// Format 2: Multiply/ALU Read/Write Group
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case 0x15:
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{
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// F1, Z : y[1]
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//const UINT8 Z = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x1d:
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{
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// F1, Z : y, x=*pt++[i]
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//const UINT8 Z = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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// Format 2a: Multiply/ALU Read/Write Group
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case 0x05:
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{
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// F1, Z : aT[1]
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//const UINT8 Z = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 aT = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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// Format 3: Special Functions
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case 0x12:
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case 0x13:
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{
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// if|ifc CON F2
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//const UINT8 CON = (op & 0x001f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F2 = (op & 0x01e0) >> 5;
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break;
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}
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// Format 4: Branch Direct Group
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case 0x00: case 0x01:
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{
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// goto JA
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const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
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m_pc = JA;
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pcAdvance = 0;
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break;
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}
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case 0x10: case 0x11:
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{
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// call JA
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//const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
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break;
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}
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// Format 5: Branch Indirect Group
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case 0x18:
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{
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// goto B
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//const UINT8 B = (op & 0x0700) >> 8;
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break;
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}
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// Format 6: Contitional Branch Qualifier/Software Interrupt (icall)
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case 0x1a:
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{
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// if CON [goto/call/return]
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//const UINT8 CON = (op & 0x001f);
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break;
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}
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// Format 7: Data Move Group
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case 0x09: case 0x0b:
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{
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// R = aS
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//const UINT8 R = (op & 0x03f0) >> 4;
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//const UINT8 S = (op & 0x1000) >> 12;
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break;
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}
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case 0x08:
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{
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// aT = R
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//const UINT8 R = (op & 0x03f0) >> 4;
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//const UINT8 aT = (op & 0x0400) >> 10;
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break;
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}
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case 0x0f:
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{
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// R = Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 R = (op & 0x03f0) >> 4;
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break;
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}
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case 0x0c:
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{
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// Y = R
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 R = (op & 0x03f0) >> 4;
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break;
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}
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case 0x0d:
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{
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// Z : R
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//const UINT8 Z = (op & 0x000f);
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//const UINT8 R = (op & 0x03f0) >> 4;
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break;
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}
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// Format 8: Data Move (immediate operand - 2 words)
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case 0x0a:
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{
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// R = N
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//const UINT8 R = (op & 0x03f0) >> 4;
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pcAdvance++;
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break;
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}
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// Format 9: Short Immediate Group
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case 0x02: case 0x03:
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{
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// R = M
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//const UINT8 M = (op & 0x00ff);
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//const UINT8 R = (op & 0x0e00) >> 9;
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break;
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}
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// Format 10: do - redo
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case 0x0e:
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{
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// do|redo K
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//const UINT8 K = (op & 0x007f);
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//const UINT8 NI = (op & 0x0780) >> 7;
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break;
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}
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// RESERVED
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case 0x1e:
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{
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break;
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}
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// UNKNOWN
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default:
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{
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break;
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}
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}
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}
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#include "dsp16ops.c"
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@ -88,7 +88,7 @@ protected:
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UINT8 m_c0;
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UINT8 m_c1;
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UINT8 m_c2;
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// Serial, parallel, etc.
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// Serial and parallel interfaces
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UINT16 m_sioc;
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UINT16 m_pioc;
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@ -108,7 +108,13 @@ protected:
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int m_icount;
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// operations
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void execute_one(const UINT16 op, UINT8& cycles, UINT8& pcAdvance);
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void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
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void* registerFromRTable(const UINT8& R);
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// helpers
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void* addressYL();
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//void writeYxRegister(const UINT16& value);
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};
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314
src/emu/cpu/dsp16/dsp16ops.c
Normal file
314
src/emu/cpu/dsp16/dsp16ops.c
Normal file
@ -0,0 +1,314 @@
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#include "dsp16.h"
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// The YL register is the lower half of the 32 bit Y register
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void* dsp16_device::addressYL()
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{
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return (((UINT8*)&m_y)+0x4);
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}
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void* dsp16_device::registerFromRTable(const UINT8 &R)
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{
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switch (R)
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{
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case 0x00: return (void*)&m_r0;
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case 0x01: return (void*)&m_r1;
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case 0x02: return (void*)&m_r2;
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case 0x03: return (void*)&m_r3;
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case 0x04: return (void*)&m_j;
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case 0x05: return (void*)&m_k;
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case 0x06: return (void*)&m_rb;
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case 0x07: return (void*)&m_re;
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case 0x08: return (void*)&m_pt;
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case 0x09: return (void*)&m_pr;
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case 0x0a: return (void*)&m_pi;
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case 0x0b: return (void*)&m_i;
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case 0x10: return (void*)&m_x;
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case 0x11: return (void*)&m_y;
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case 0x12: return (void*)addressYL();
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case 0x13: return (void*)&m_auc;
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case 0x14: return (void*)&m_psw;
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case 0x15: return (void*)&m_c0;
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case 0x16: return (void*)&m_c1;
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case 0x17: return (void*)&m_c2;
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case 0x18: return (void*)&m_sioc;
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//case 0x19: return (void*)&m_srta;
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//case 0x1a: return (void*)&m_sdx;
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//case 0x1b: return (void*)&m_tdms;
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case 0x1c: return (void*)&m_pioc;
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//case 0x1d: return (void*)&m_pdx0;
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//case 0x1e: return (void*)&m_pdx1;
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default: return NULL;
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}
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return NULL;
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}
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void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance)
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{
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cycles = 1;
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pcAdvance = 1;
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const UINT8 opcode = (op >> 11) & 0x1f;
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switch(opcode)
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{
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// Format 1: Multiply/ALU Read/Write Group
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case 0x06:
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{
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// F1, Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
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}
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case 0x04: case 0x1c:
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{
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// F1 Y=a0[1] | F1 Y=a1[1]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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break;
|
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}
|
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case 0x16:
|
||||
{
|
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// F1, x = Y
|
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//const UINT8 Y = (op & 0x000f);
|
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//const UINT8 S = (op & 0x0200) >> 9;
|
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//const UINT8 D = (op & 0x0400) >> 10;
|
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//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
case 0x17:
|
||||
{
|
||||
// F1, y[l] = Y
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
case 0x1f:
|
||||
{
|
||||
// F1, y = Y, x = *pt++[i]
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
case 0x19: case 0x1b:
|
||||
{
|
||||
// F1, y = a0|1, x = *pt++[i]
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
case 0x14:
|
||||
{
|
||||
// F1, Y = y[1]
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 1a: Multiply/ALU Read/Write Group (major typo in docs on p3-51)
|
||||
case 0x07:
|
||||
{
|
||||
// F1, At[1] = Y
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 aT = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 2: Multiply/ALU Read/Write Group
|
||||
case 0x15:
|
||||
{
|
||||
// F1, Z : y[1]
|
||||
//const UINT8 Z = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
case 0x1d:
|
||||
{
|
||||
// F1, Z : y, x=*pt++[i]
|
||||
//const UINT8 Z = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 2a: Multiply/ALU Read/Write Group
|
||||
case 0x05:
|
||||
{
|
||||
// F1, Z : aT[1]
|
||||
//const UINT8 Z = (op & 0x000f);
|
||||
//const UINT8 X = (op & 0x0010) >> 4;
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 aT = (op & 0x0400) >> 10;
|
||||
//const UINT8 F1 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 3: Special Functions
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
{
|
||||
// if|ifc CON F2
|
||||
//const UINT8 CON = (op & 0x001f);
|
||||
//const UINT8 S = (op & 0x0200) >> 9;
|
||||
//const UINT8 D = (op & 0x0400) >> 10;
|
||||
//const UINT8 F2 = (op & 0x01e0) >> 5;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 4: Branch Direct Group
|
||||
case 0x00: case 0x01:
|
||||
{
|
||||
// goto JA
|
||||
const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
|
||||
m_pc = JA;
|
||||
cycles = 2;
|
||||
pcAdvance = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x10: case 0x11:
|
||||
{
|
||||
// call JA
|
||||
//const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 5: Branch Indirect Group
|
||||
case 0x18:
|
||||
{
|
||||
// goto B
|
||||
//const UINT8 B = (op & 0x0700) >> 8;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 6: Contitional Branch Qualifier/Software Interrupt (icall)
|
||||
case 0x1a:
|
||||
{
|
||||
// if CON [goto/call/return]
|
||||
//const UINT8 CON = (op & 0x001f);
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 7: Data Move Group
|
||||
case 0x09: case 0x0b:
|
||||
{
|
||||
// R = aS
|
||||
//const UINT8 R = (op & 0x03f0) >> 4;
|
||||
//const UINT8 S = (op & 0x1000) >> 12;
|
||||
break;
|
||||
}
|
||||
case 0x08:
|
||||
{
|
||||
// aT = R
|
||||
//const UINT8 R = (op & 0x03f0) >> 4;
|
||||
//const UINT8 aT = (op & 0x0400) >> 10;
|
||||
break;
|
||||
}
|
||||
case 0x0f:
|
||||
{
|
||||
// R = Y
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 R = (op & 0x03f0) >> 4;
|
||||
break;
|
||||
}
|
||||
case 0x0c:
|
||||
{
|
||||
// Y = R
|
||||
//const UINT8 Y = (op & 0x000f);
|
||||
//const UINT8 R = (op & 0x03f0) >> 4;
|
||||
break;
|
||||
}
|
||||
case 0x0d:
|
||||
{
|
||||
// Z : R
|
||||
//const UINT8 Z = (op & 0x000f);
|
||||
//const UINT8 R = (op & 0x03f0) >> 4;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 8: Data Move (immediate operand - 2 words)
|
||||
case 0x0a:
|
||||
{
|
||||
// R = N
|
||||
const UINT8 R = (op & 0x03f0) >> 4;
|
||||
const UINT16 iVal = opcode_read(1);
|
||||
void* reg = registerFromRTable(R);
|
||||
if (reg == &m_auc || reg == &m_c0 || reg == &m_c1 || reg == &m_c2)
|
||||
{
|
||||
*(UINT8*)reg = iVal & 0x00ff; // 8 bit registers
|
||||
}
|
||||
else if (reg == &m_i)
|
||||
{
|
||||
*(UINT16*)reg = iVal & 0x0fff; // 12 bit register
|
||||
}
|
||||
else if (reg == &m_y || reg == addressYL())
|
||||
{
|
||||
*(UINT16*)reg = iVal; // Temporary
|
||||
//writeYxRegister(iVal); // TODO
|
||||
}
|
||||
else
|
||||
{
|
||||
*(UINT16*)reg = iVal; // The rest
|
||||
}
|
||||
|
||||
cycles = 2;
|
||||
pcAdvance = 2;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 9: Short Immediate Group
|
||||
case 0x02: case 0x03:
|
||||
{
|
||||
// R = M
|
||||
//const UINT8 M = (op & 0x00ff);
|
||||
//const UINT8 R = (op & 0x0e00) >> 9;
|
||||
break;
|
||||
}
|
||||
|
||||
// Format 10: do - redo
|
||||
case 0x0e:
|
||||
{
|
||||
// do|redo K
|
||||
//const UINT8 K = (op & 0x007f);
|
||||
//const UINT8 NI = (op & 0x0780) >> 7;
|
||||
break;
|
||||
}
|
||||
|
||||
// RESERVED
|
||||
case 0x1e:
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
// UNKNOWN
|
||||
default:
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user