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https://github.com/holub/mame
synced 2025-06-07 05:13:46 +03:00
t11: power fail trap is NMI, added bus error trap
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3928edfe97
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@ -52,6 +52,7 @@ t11_device::t11_device(const machine_config &mconfig, device_type type, const ch
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, m_cp_state(0)
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, m_vec_active(false)
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, m_pf_active(false)
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, m_berr_active(false)
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, m_hlt_active(false)
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, m_out_reset_func(*this)
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, m_in_iack_func(*this)
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@ -222,9 +223,14 @@ void t11_device::t11_check_irqs()
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return;
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}
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// PF has next-highest priority
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int priority = PSW & 0340;
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if (m_power_fail && priority != 0340)
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// non-maskable hardware traps
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if (m_bus_error)
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{
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m_bus_error = false;
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take_interrupt(T11_TIMEOUT);
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return;
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}
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else if (m_power_fail)
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{
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m_power_fail = false;
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take_interrupt(T11_PWRFAIL);
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@ -233,7 +239,7 @@ void t11_device::t11_check_irqs()
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// compare the priority of the CP interrupt to the PSW
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const struct irq_table_entry *irq = &irq_table[m_cp_state & 15];
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if (irq->priority > priority)
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if (irq->priority > (PSW & 0340))
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{
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// call the callback
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standard_irq_callback(m_cp_state & 15);
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@ -404,6 +410,7 @@ void t11_device::device_reset()
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m_wait_state = 0;
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m_power_fail = false;
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m_bus_error = false;
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m_ext_halt = false;
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}
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@ -447,6 +454,12 @@ void t11_device::execute_set_input(int irqline, int state)
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m_pf_active = (state != CLEAR_LINE);
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break;
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case BUS_ERROR:
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if (state != CLEAR_LINE && !m_berr_active)
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m_bus_error = true;
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m_berr_active = (state != CLEAR_LINE);
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break;
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case HLT_LINE:
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if (state != CLEAR_LINE && !m_hlt_active)
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m_ext_halt = true;
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@ -22,6 +22,7 @@ enum
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class t11_device : public cpu_device
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{
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public:
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// T11 input lines
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enum
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{
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CP0_LINE = 0, // -AI4 (at PI time)
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@ -33,8 +34,12 @@ public:
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HLT_LINE = 6 // -AI7 (at PI time)
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};
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// generic hardware traps
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static constexpr uint8_t POWER_FAIL = PF_LINE;
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static constexpr uint8_t BUS_ERROR = 8;
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// construction/destruction
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t11_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
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t11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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// configuration helpers
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void set_initial_mode(const uint16_t mode) { c_initial_mode = mode; }
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@ -63,8 +68,8 @@ protected:
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// device_execute_interface overrides
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virtual uint32_t execute_min_cycles() const noexcept override { return 12; }
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virtual uint32_t execute_max_cycles() const noexcept override { return 114; }
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virtual uint32_t execute_input_lines() const noexcept override { return 7; }
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virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PF_LINE || inputnum == HLT_LINE; }
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virtual uint32_t execute_input_lines() const noexcept override { return 8; }
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virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PF_LINE || inputnum == HLT_LINE || inputnum == BUS_ERROR; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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@ -89,8 +94,10 @@ protected:
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uint8_t m_cp_state;
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bool m_vec_active;
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bool m_pf_active;
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bool m_berr_active;
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bool m_hlt_active;
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bool m_power_fail;
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bool m_bus_error;
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bool m_ext_halt;
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int m_icount;
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memory_access<16, 1, 0, ENDIANNESS_LITTLE>::cache m_cache;
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@ -18,12 +18,13 @@ TODO:
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and/or T11 core timing itself is not 100% accurate.
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- verify actual XTAL, the label couldn't be seen
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- correct bus conflict between RAM and I/O
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- is ИМ-01Т extra RAM chip used at all?
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*******************************************************************************
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Hardware notes:
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- К1801ВМ1 CPU (PDP-11 derived) @ ~4.61MHz
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- 16KB ROM (2*К1809РЕ1), 2KB RAM(К1809РУ1)
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- 16KB ROM (2*К1809РЕ1), 2KB RAM(К1809РУ1) (4KB RAM for ИМ-01Т)
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- K1809BB1 (I/O, counter)
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- 4-digit VFD 7seg panel(cyan, green window overlay), beeper
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