Merge branch 'master' of https://github.com/mamedev/mame.git
This commit is contained in:
couriersud
commit
a38d5d5fe0
@ -16,8 +16,6 @@
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#include "e0c6200.h"
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#include "debugger.h"
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#include "e0c6200op.inc"
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const device_type EPSON_E0C6S46 = &device_creator<e0c6s46_device>;
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@ -18,8 +18,8 @@ public:
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// construction/destruction
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e0c6200_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, 0, program)
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, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
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, m_program_config("program", ENDIANNESS_BIG, 16, prgwidth, -1, program)
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, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
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, m_prgwidth(prgwidth)
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, m_datawidth(datawidth)
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{ }
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@ -10,9 +10,702 @@
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#include "debugger.h"
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#include "e0c6200.h"
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// opcode mnemonics
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enum e_mnemonics
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{
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em_JP, em_RETD, em_CALL, em_CALZ,
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em_LD, em_LBPX, em_ADC, em_CP, em_ADD, em_SUB, em_SBC, em_AND, em_OR, em_XOR,
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em_RLC, em_FAN, em_PSET, em_LDPX, em_LDPY, em_SET, em_RST, em_INC, em_DEC,
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em_RRC, em_ACPX, em_ACPY, em_SCPX, em_SCPY, em_PUSH, em_POP,
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em_RETS, em_RET, em_JPBA, em_HALT, em_SLP, em_NOP5, em_NOP7,
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em_NOT, em_SCF, em_SZF, em_SDF, em_EI, em_DI, em_RDF, em_RZF, em_RCF, em_ILL
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};
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static const char *const em_name[] =
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{
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"JP", "RETD", "CALL", "CALZ",
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"LD", "LBPX", "ADC", "CP", "ADD", "SUB", "SBC", "AND", "OR", "XOR",
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"RLC", "FAN", "PSET", "LDPX", "LDPY", "SET", "RST", "INC", "DEC",
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"RRC", "ACPX", "ACPY", "SCPX", "SCPY", "PUSH", "POP",
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"RETS", "RET", "JPBA", "HALT", "SLP", "NOP5", "NOP7",
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"NOT", "SCF", "SZF", "SDF", "EI", "DI", "RDF", "RZF", "RCF", "?"
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};
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#define _OVER DASMFLAG_STEP_OVER
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#define _OUT DASMFLAG_STEP_OUT
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static const UINT32 em_flags[] =
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{
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0, _OUT, _OVER, _OVER,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0,
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_OUT, _OUT, 0, _OVER, _OVER, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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// opcode params
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enum e_params
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{
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ep_S, ep_E, ep_I, ep_R0, ep_R2, ep_R4, ep_Q,
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ep_cC, ep_cNC, ep_cZ, ep_cNZ,
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ep_A, ep_B, ep_X, ep_Y, ep_MX, ep_MY, ep_XP, ep_XH, ep_XL, ep_YP, ep_YH, ep_YL,
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ep_P, ep_F, ep_MN, ep_SP, ep_SPH, ep_SPL
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};
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// 0-digit is number of bits per opcode parameter, 0 bits is literal,
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// 0x10-digit is for shift-right, 0x100-digit is special flag for r/q param
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static const UINT16 ep_bits[] =
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{
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8, 8, 4, 0x102, 0x122, 0x142, 0x102,
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0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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5, 0, 4, 0, 0, 0
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};
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// redirect for r/q param
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static const UINT8 ep_redirect_r[4] = { ep_A, ep_B, ep_MX, ep_MY };
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// literal opcode parameter
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static const char *const ep_name[] =
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{
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" ", " ", " ", " ", " ", " ", " ",
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"C", "NC", "Z", "NZ",
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"A", "B", "X", "Y", "MX", "MY", "XP", "XH", "XL", "YP", "YH", "YL",
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" ", "F", " ", "SP", "SPH", "SPL"
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};
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static char* decode_param(UINT16 opcode, int param, char* buffer)
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{
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int bits = ep_bits[param] & 0xf;
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int shift = ep_bits[param] >> 4 & 0xf;
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UINT16 opmask = opcode >> shift & ((1 << bits) - 1);
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// redirect r/q to A/B/MX/MY
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if (ep_bits[param] & 0x100)
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param = ep_redirect_r[opmask];
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// literal param
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if (ep_bits[param] == 0)
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{
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strcpy(buffer, ep_name[param]);
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return buffer;
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}
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// print value like how it's documented in the manual
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char val[10];
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if (bits > 4 || opmask > 9)
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sprintf(val, "%02XH", opmask);
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else
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sprintf(val, "%d", opmask);
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if (param == ep_MN)
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sprintf(buffer, "M%s", val);
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else
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strcpy(buffer, val);
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return buffer;
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}
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CPU_DISASSEMBLE(e0c6200)
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{
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return 2;
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UINT16 op = (oprom[1] | oprom[0] << 8) & 0xfff;
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int m = -1;
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int p1 = -1;
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int p2 = -1;
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// determine id for mnemonic and param(s)
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switch (op & 0xf00)
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{
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// JP s
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case 0x000:
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m = em_JP; p1 = ep_S;
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break;
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// RETD e
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case 0x100:
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m = em_RETD; p1 = ep_E;
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break;
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// JP C,s
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case 0x200:
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m = em_JP; p1 = ep_cC; p2 = ep_S;
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break;
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// JP NC,s
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case 0x300:
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m = em_JP; p1 = ep_cNC; p2 = ep_S;
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break;
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// CALL s
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case 0x400:
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m = em_CALL; p1 = ep_S;
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break;
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// CALZ s
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case 0x500:
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m = em_CALZ; p1 = ep_S;
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break;
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// JP Z,s
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case 0x600:
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m = em_JP; p1 = ep_cZ; p2 = ep_S;
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break;
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// JP NZ,s
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case 0x700:
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m = em_JP; p1 = ep_cNZ; p2 = ep_S;
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break;
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// LD Y,e
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case 0x800:
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m = em_LD; p1 = ep_Y; p2 = ep_E;
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break;
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// LBPX MX,e
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case 0x900:
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m = em_LBPX; p1 = ep_MX; p2 = ep_E;
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break;
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// LD X,e
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case 0xb00:
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m = em_LD; p1 = ep_X; p2 = ep_E;
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break;
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default:
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switch (op)
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{
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// RLC r
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case 0xaf0: case 0xaf5: case 0xafa: case 0xaff:
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m = em_RLC; p1 = ep_R0;
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break;
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// NOT r
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case 0xd0f: case 0xd1f: case 0xd2f: case 0xd3f:
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m = em_NOT; p1 = ep_R4;
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break;
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// LD XP,r
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case 0xe80: case 0xe81: case 0xe82: case 0xe83:
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m = em_LD; p1 = ep_XP; p2 = ep_R0;
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break;
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// LD XH,r
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case 0xe84: case 0xe85: case 0xe86: case 0xe87:
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m = em_LD; p1 = ep_XH; p2 = ep_R0;
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break;
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// LD XL,r
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case 0xe88: case 0xe89: case 0xe8a: case 0xe8b:
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m = em_LD; p1 = ep_XL; p2 = ep_R0;
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break;
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// RRC r
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case 0xe8c: case 0xe8d: case 0xe8e: case 0xe8f:
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m = em_RRC; p1 = ep_R0;
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break;
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// LD YP,r
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case 0xe90: case 0xe91: case 0xe92: case 0xe93:
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m = em_LD; p1 = ep_YP; p2 = ep_R0;
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break;
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// LD YH,r
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case 0xe94: case 0xe95: case 0xe96: case 0xe97:
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m = em_LD; p1 = ep_YH; p2 = ep_R0;
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break;
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// LD YL,r
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case 0xe98: case 0xe99: case 0xe9a: case 0xe9b:
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m = em_LD; p1 = ep_YL; p2 = ep_R0;
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break;
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// LD r,XP
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case 0xea0: case 0xea1: case 0xea2: case 0xea3:
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m = em_LD; p1 = ep_R0; p2 = ep_XP;
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break;
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// LD r,XH
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case 0xea4: case 0xea5: case 0xea6: case 0xea7:
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m = em_LD; p1 = ep_R0; p2 = ep_XH;
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break;
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// LD r,XL
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case 0xea8: case 0xea9: case 0xeaa: case 0xeab:
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m = em_LD; p1 = ep_R0; p2 = ep_XL;
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break;
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// LD r,YP
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case 0xeb0: case 0xeb1: case 0xeb2: case 0xeb3:
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m = em_LD; p1 = ep_R0; p2 = ep_YP;
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break;
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// LD r,YH
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case 0xeb4: case 0xeb5: case 0xeb6: case 0xeb7:
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m = em_LD; p1 = ep_R0; p2 = ep_YH;
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break;
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// LD r,YL
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case 0xeb8: case 0xeb9: case 0xeba: case 0xebb:
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m = em_LD; p1 = ep_R0; p2 = ep_YL;
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break;
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// INC X
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case 0xee0:
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m = em_INC; p1 = ep_X;
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break;
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// INC Y
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case 0xef0:
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m = em_INC; p1 = ep_Y;
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break;
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// ACPX MX,r
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case 0xf28: case 0xf29: case 0xf2a: case 0xf2b:
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m = em_ACPX; p1 = ep_MX; p2 = ep_R0;
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break;
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// ACPY MY,r
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case 0xf2c: case 0xf2d: case 0xf2e: case 0xf2f:
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m = em_ACPY; p1 = ep_MY; p2 = ep_R0;
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break;
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// SCPX MX,r
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case 0xf38: case 0xf39: case 0xf3a: case 0xf3b:
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m = em_SCPX; p1 = ep_MX; p2 = ep_R0;
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break;
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// SCPY MY,r
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case 0xf3c: case 0xf3d: case 0xf3e: case 0xf3f:
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m = em_SCPY; p1 = ep_MY; p2 = ep_R0;
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break;
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// SCF
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case 0xf41:
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m = em_SCF;
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break;
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||||
// SZF
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case 0xf42:
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m = em_SZF;
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break;
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||||
// SDF
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case 0xf44:
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m = em_SDF;
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break;
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// EI
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case 0xf48:
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m = em_EI;
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break;
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||||
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||||
// DI
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case 0xf57:
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m = em_DI;
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break;
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||||
|
||||
// RDF
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||||
case 0xf5b:
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m = em_RDF;
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break;
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||||
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// RZF
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case 0xf5d:
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m = em_RZF;
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||||
break;
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// RCF
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case 0xf5e:
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m = em_RCF;
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||||
break;
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||||
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||||
// PUSH r
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||||
case 0xfc0: case 0xfc1: case 0xfc2: case 0xfc3:
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m = em_PUSH; p1 = ep_R0;
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||||
break;
|
||||
|
||||
// PUSH XP
|
||||
case 0xfc4:
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||||
m = em_PUSH; p1 = ep_XP;
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||||
break;
|
||||
|
||||
// PUSH XH
|
||||
case 0xfc5:
|
||||
m = em_PUSH; p1 = ep_XH;
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||||
break;
|
||||
|
||||
// PUSH XL
|
||||
case 0xfc6:
|
||||
m = em_PUSH; p1 = ep_XL;
|
||||
break;
|
||||
|
||||
// PUSH YP
|
||||
case 0xfc7:
|
||||
m = em_PUSH; p1 = ep_YP;
|
||||
break;
|
||||
|
||||
// PUSH YH
|
||||
case 0xfc8:
|
||||
m = em_PUSH; p1 = ep_YH;
|
||||
break;
|
||||
|
||||
// PUSH YL
|
||||
case 0xfc9:
|
||||
m = em_PUSH; p1 = ep_YL;
|
||||
break;
|
||||
|
||||
// PUSH F
|
||||
case 0xfca:
|
||||
m = em_PUSH; p1 = ep_F;
|
||||
break;
|
||||
|
||||
// DEC SP
|
||||
case 0xfcb:
|
||||
m = em_DEC; p1 = ep_SP;
|
||||
break;
|
||||
|
||||
// POP r
|
||||
case 0xfd0: case 0xfd1: case 0xfd2: case 0xfd3:
|
||||
m = em_POP; p1 = ep_R0;
|
||||
break;
|
||||
|
||||
// POP XP
|
||||
case 0xfd4:
|
||||
m = em_POP; p1 = ep_XP;
|
||||
break;
|
||||
|
||||
// POP XH
|
||||
case 0xfd5:
|
||||
m = em_POP; p1 = ep_XH;
|
||||
break;
|
||||
|
||||
// POP XL
|
||||
case 0xfd6:
|
||||
m = em_POP; p1 = ep_XL;
|
||||
break;
|
||||
|
||||
// POP YP
|
||||
case 0xfd7:
|
||||
m = em_POP; p1 = ep_YP;
|
||||
break;
|
||||
|
||||
// POP YH
|
||||
case 0xfd8:
|
||||
m = em_POP; p1 = ep_YH;
|
||||
break;
|
||||
|
||||
// POP YL
|
||||
case 0xfd9:
|
||||
m = em_POP; p1 = ep_YL;
|
||||
break;
|
||||
|
||||
// POP F
|
||||
case 0xfda:
|
||||
m = em_POP; p1 = ep_F;
|
||||
break;
|
||||
|
||||
// INC SP
|
||||
case 0xfdb:
|
||||
m = em_INC; p1 = ep_SP;
|
||||
break;
|
||||
|
||||
// RETS
|
||||
case 0xfde:
|
||||
m = em_RETS;
|
||||
break;
|
||||
|
||||
// RET
|
||||
case 0xfdf:
|
||||
m = em_RET;
|
||||
break;
|
||||
|
||||
// LD SPH,r
|
||||
case 0xfe0: case 0xfe1: case 0xfe2: case 0xfe3:
|
||||
m = em_LD; p1 = ep_SPH; p2 = ep_R0;
|
||||
break;
|
||||
|
||||
// LD r,SPH
|
||||
case 0xfe4: case 0xfe5: case 0xfe6: case 0xfe7:
|
||||
m = em_LD; p1 = ep_R0; p2 = ep_SPH;
|
||||
break;
|
||||
|
||||
// JPBA
|
||||
case 0xfe8:
|
||||
m = em_JPBA;
|
||||
break;
|
||||
|
||||
// LD SPL,r
|
||||
case 0xff0: case 0xff1: case 0xff2: case 0xff3:
|
||||
m = em_LD; p1 = ep_SPL; p2 = ep_R0;
|
||||
break;
|
||||
|
||||
// LD r,SPL
|
||||
case 0xff4: case 0xff5: case 0xff6: case 0xff7:
|
||||
m = em_LD; p1 = ep_R0; p2 = ep_SPL;
|
||||
break;
|
||||
|
||||
// HALT
|
||||
case 0xff8:
|
||||
m = em_HALT;
|
||||
break;
|
||||
|
||||
// SLP
|
||||
case 0xff9:
|
||||
m = em_SLP;
|
||||
break;
|
||||
|
||||
// NOP5
|
||||
case 0xffb:
|
||||
m = em_NOP5;
|
||||
break;
|
||||
|
||||
// NOP7
|
||||
case 0xfff:
|
||||
m = em_NOP7;
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
switch (op & 0xff0)
|
||||
{
|
||||
|
||||
// ADC XH,i
|
||||
case 0xa00:
|
||||
m = em_ADC; p1 = ep_XH; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// ADC XL,i
|
||||
case 0xa10:
|
||||
m = em_ADC; p1 = ep_XL; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// ADC YH,i
|
||||
case 0xa20:
|
||||
m = em_ADC; p1 = ep_YH; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// ADC YL,i
|
||||
case 0xa30:
|
||||
m = em_ADC; p1 = ep_YL; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// CP XH,i
|
||||
case 0xa40:
|
||||
m = em_CP; p1 = ep_XH; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// CP XL,i
|
||||
case 0xa50:
|
||||
m = em_CP; p1 = ep_XL; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// CP YH,i
|
||||
case 0xa60:
|
||||
m = em_CP; p1 = ep_YH; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// CP YL,i
|
||||
case 0xa70:
|
||||
m = em_CP; p1 = ep_YL; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// ADD r,q
|
||||
case 0xa80:
|
||||
m = em_ADD; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// ADC r,q
|
||||
case 0xa90:
|
||||
m = em_ADC; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// SUB r,q
|
||||
case 0xaa0:
|
||||
m = em_SUB; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// SBC r,q
|
||||
case 0xab0:
|
||||
m = em_SBC; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// AND r,q
|
||||
case 0xac0:
|
||||
m = em_AND; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// OR r,q
|
||||
case 0xad0:
|
||||
m = em_OR; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// XOR r,q
|
||||
case 0xae0:
|
||||
m = em_XOR; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// ADD r,i
|
||||
case 0xc00: case 0xc10: case 0xc20: case 0xc30:
|
||||
m = em_ADD; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// ADC r,i
|
||||
case 0xc40: case 0xc50: case 0xc60: case 0xc70:
|
||||
m = em_ADC; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// AND r,i
|
||||
case 0xc80: case 0xc90: case 0xca0 : case 0xcb0:
|
||||
m = em_AND; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// OR r,i
|
||||
case 0xcc0: case 0xcd0: case 0xce0: case 0xcf0:
|
||||
m = em_OR; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// XOR r,i
|
||||
case 0xd00: case 0xd10: case 0xd20: case 0xd30:
|
||||
m = em_XOR; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// SBC r,i
|
||||
case 0xd40: case 0xd50: case 0xd60: case 0xd70:
|
||||
m = em_SBC; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// FAN r,i
|
||||
case 0xd80: case 0xd90: case 0xda0: case 0xdb0:
|
||||
m = em_FAN; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// CP r,i
|
||||
case 0xdc0: case 0xdd0: case 0xde0: case 0xdf0:
|
||||
m = em_CP; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// LD r,i
|
||||
case 0xe00: case 0xe10: case 0xe20: case 0xe30:
|
||||
m = em_LD; p1 = ep_R4; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// PSET p
|
||||
case 0xe40: case 0xe50:
|
||||
m = em_PSET; p1 = ep_P;
|
||||
break;
|
||||
|
||||
// LDPX MX,i
|
||||
case 0xe60:
|
||||
m = em_LDPX; p1 = ep_MX; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// LDPY MY,i
|
||||
case 0xe70:
|
||||
m = em_LDPY; p1 = ep_MY; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// LD r,q
|
||||
case 0xec0:
|
||||
m = em_LD; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// LDPX r,q
|
||||
case 0xee0:
|
||||
m = em_LDPX; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// LDPY r,q
|
||||
case 0xef0:
|
||||
m = em_LDPY; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// CP r,q
|
||||
case 0xf00:
|
||||
m = em_CP; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// FAN r,q
|
||||
case 0xf10:
|
||||
m = em_FAN; p1 = ep_R2; p2 = ep_Q;
|
||||
break;
|
||||
|
||||
// SET F,i
|
||||
case 0xf40:
|
||||
m = em_SET; p1 = ep_F; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// RST F,i
|
||||
case 0xf50:
|
||||
m = em_RST; p1 = ep_F; p2 = ep_I;
|
||||
break;
|
||||
|
||||
// INC Mn
|
||||
case 0xf60:
|
||||
m = em_INC; p1 = ep_MN;
|
||||
break;
|
||||
|
||||
// DEC Mn
|
||||
case 0xf70:
|
||||
m = em_DEC; p1 = ep_MN;
|
||||
break;
|
||||
|
||||
// LD Mn,A
|
||||
case 0xf80:
|
||||
m = em_LD; p1 = ep_MN; p2 = ep_A;
|
||||
break;
|
||||
|
||||
// LD Mn,B
|
||||
case 0xf90:
|
||||
m = em_LD; p1 = ep_MN; p2 = ep_B;
|
||||
break;
|
||||
|
||||
// LD A,Mn
|
||||
case 0xfa0:
|
||||
m = em_LD; p1 = ep_A; p2 = ep_MN;
|
||||
break;
|
||||
|
||||
// LD B,Mn
|
||||
case 0xfb0:
|
||||
m = em_LD; p1 = ep_B; p2 = ep_MN;
|
||||
break;
|
||||
|
||||
|
||||
// illegal opcode
|
||||
default:
|
||||
m = em_ILL;
|
||||
break;
|
||||
|
||||
|
||||
} // 0xff0
|
||||
break;
|
||||
|
||||
} // 0xfff
|
||||
break;
|
||||
|
||||
} // 0xf00 (big switch)
|
||||
|
||||
|
||||
// fetch mnemonic
|
||||
char *dst = buffer;
|
||||
dst += sprintf(dst, "%-6s", em_name[m]);
|
||||
|
||||
// fetch param(s)
|
||||
char pbuffer[10];
|
||||
if (p1 != -1)
|
||||
{
|
||||
dst += sprintf(dst, "%s", decode_param(op, p1, pbuffer));
|
||||
if (p2 != -1)
|
||||
{
|
||||
dst += sprintf(dst, ",%s", decode_param(op, p2, pbuffer));
|
||||
}
|
||||
}
|
||||
|
||||
return 1 | em_flags[m] | DASMFLAG_SUPPORTED;
|
||||
}
|
||||
|
||||
@ -1 +0,0 @@
|
||||
// E0C6200 opcode handlers
|
||||
@ -20,10 +20,10 @@
|
||||
typelist.append(*global_alloc(input_type_entry(IPT_##_type, IPG_##_group, (_player == 0) ? _player : (_player) - 1, (_player == 0) ? #_type : ("P" #_player "_" #_type), _name, _seq, _decseq, _incseq)));
|
||||
|
||||
/* These input port macros expand to a great deal of code and break compilers */
|
||||
#if defined(__GNUC__) && __GNUC__ == 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) || (__GNUC__ == 4 && __GNUC_MINOR__ == 4 && __GNUC_PATCHLEVEL__ >= 4)
|
||||
#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 4 || (__GNUC_MINOR__ == 4 && __GNUC_PATCHLEVEL__ >= 4))))
|
||||
#pragma GCC push_options
|
||||
#pragma GCC optimize ("O1")
|
||||
#endif
|
||||
#ifdef _MSC_VER
|
||||
#elif defined(_MSC_VER)
|
||||
#pragma optimize("", off)
|
||||
#endif
|
||||
|
||||
@ -829,6 +829,8 @@ void construct_core_types(simple_list<input_type_entry> &typelist)
|
||||
construct_core_types_OSD(typelist);
|
||||
construct_core_types_invalid(typelist);
|
||||
}
|
||||
#ifdef _MSC_VER
|
||||
#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 4 || (__GNUC_MINOR__ == 4 && __GNUC_PATCHLEVEL__ >= 4))))
|
||||
#pragma GCC pop_options
|
||||
#elif defined(_MSC_VER)
|
||||
#pragma optimize("", on)
|
||||
#endif
|
||||
|
||||
@ -601,16 +601,6 @@ s14001a_device::s14001a_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_config_complete - perform any
|
||||
// operations now that the configuration is
|
||||
// complete
|
||||
//-------------------------------------------------
|
||||
|
||||
void s14001a_device::device_config_complete()
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
@ -629,6 +619,27 @@ void s14001a_device::device_start()
|
||||
}
|
||||
|
||||
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() ? clock() : machine().sample_rate());
|
||||
|
||||
save_item(NAME(m_WordInput));
|
||||
save_item(NAME(m_LatchedWord));
|
||||
save_item(NAME(m_SyllableAddress));
|
||||
save_item(NAME(m_PhoneAddress));
|
||||
save_item(NAME(m_PlayParams));
|
||||
save_item(NAME(m_PhoneOffset));
|
||||
save_item(NAME(m_LengthCounter));
|
||||
save_item(NAME(m_RepeatCounter));
|
||||
save_item(NAME(m_OutputCounter));
|
||||
save_item(NAME(m_machineState));
|
||||
save_item(NAME(m_nextstate));
|
||||
save_item(NAME(m_laststate));
|
||||
save_item(NAME(m_resetState));
|
||||
save_item(NAME(m_oddeven));
|
||||
save_item(NAME(m_GlobalSilenceState));
|
||||
save_item(NAME(m_OldDelta));
|
||||
save_item(NAME(m_DACOutput));
|
||||
save_item(NAME(m_audioout));
|
||||
save_item(NAME(m_filtervals[8]));
|
||||
save_item(NAME(m_VSU1000_amp));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -27,7 +27,6 @@ public:
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
// sound stream update overrides
|
||||
|
||||
@ -1619,6 +1619,7 @@ struct raster_info
|
||||
UINT32 eff_fbz_mode; /* effective fbzMode value */
|
||||
UINT32 eff_tex_mode_0; /* effective textureMode value for TMU #0 */
|
||||
UINT32 eff_tex_mode_1; /* effective textureMode value for TMU #1 */
|
||||
UINT32 hash;
|
||||
};
|
||||
|
||||
|
||||
@ -2420,9 +2421,8 @@ do
|
||||
if (ALPHAMODE_ALPHABLEND(ALPHAMODE)) \
|
||||
{ \
|
||||
int dpix = dest[XX]; \
|
||||
int dr = (dpix >> 8) & 0xf8; \
|
||||
int dg = (dpix >> 3) & 0xfc; \
|
||||
int db = (dpix << 3) & 0xf8; \
|
||||
int dr, dg, db; \
|
||||
EXTRACT_565_TO_888(dpix, dr, dg, db); \
|
||||
int da = FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) ? depth[XX] : 0xff; \
|
||||
int sr = (RR); \
|
||||
int sg = (GG); \
|
||||
@ -2623,12 +2623,12 @@ do
|
||||
{ \
|
||||
case 0: /* fog table */ \
|
||||
{ \
|
||||
INT32 delta = (VV)->fbi.fogdelta[wfloat >> 10]; \
|
||||
INT32 delta = (VV)->fbi.fogdelta[fogdepth >> 10]; \
|
||||
INT32 deltaval; \
|
||||
\
|
||||
/* perform the multiply against lower 8 bits of wfloat */ \
|
||||
deltaval = (delta & (VV)->fbi.fogdelta_mask) * \
|
||||
((wfloat >> 2) & 0xff); \
|
||||
((fogdepth >> 2) & 0xff); \
|
||||
\
|
||||
/* fog zones allow for negating this value */ \
|
||||
if (FOGMODE_FOG_ZONES(FOGMODE) && (delta & 2)) \
|
||||
@ -2641,7 +2641,7 @@ do
|
||||
deltaval >>= 4; \
|
||||
\
|
||||
/* add to the blending factor */ \
|
||||
fogblend = (VV)->fbi.fogblend[wfloat >> 10] + deltaval; \
|
||||
fogblend = (VV)->fbi.fogblend[fogdepth >> 10] + deltaval; \
|
||||
break; \
|
||||
} \
|
||||
\
|
||||
@ -3040,7 +3040,7 @@ while (0)
|
||||
#define PIXEL_PIPELINE_BEGIN(VV, STATS, XX, YY, FBZCOLORPATH, FBZMODE, ITERZ, ITERW) \
|
||||
do \
|
||||
{ \
|
||||
INT32 depthval, wfloat; \
|
||||
INT32 depthval, wfloat, fogdepth, biasdepth; \
|
||||
INT32 prefogr, prefogg, prefogb; \
|
||||
INT32 r, g, b, a; \
|
||||
\
|
||||
@ -3080,33 +3080,27 @@ do
|
||||
wfloat = 0x0000; \
|
||||
else \
|
||||
{ \
|
||||
UINT32 temp = (UINT32)(ITERW); \
|
||||
if ((temp & 0xffff0000) == 0) \
|
||||
UINT32 temp = (UINT32)(ITERW); \
|
||||
if (!(temp & 0xffff0000)) \
|
||||
wfloat = 0xffff; \
|
||||
else \
|
||||
{ \
|
||||
int exp = count_leading_zeros(temp); \
|
||||
temp &=0x7fff0000; \
|
||||
wfloat = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
|
||||
} \
|
||||
} \
|
||||
fogdepth = wfloat; \
|
||||
/* add the bias for fog selection*/ \
|
||||
if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
|
||||
{ \
|
||||
wfloat += (INT16)(VV)->reg[zaColor].u; \
|
||||
CLAMP(wfloat, 0, 0xffff); \
|
||||
fogdepth += (INT16)(VV)->reg[zaColor].u; \
|
||||
CLAMP(fogdepth, 0, 0xffff); \
|
||||
} \
|
||||
\
|
||||
/* compute depth value (W or Z) for this pixel */ \
|
||||
if (FBZMODE_WBUFFER_SELECT(FBZMODE) == 0) \
|
||||
{ \
|
||||
CLAMPED_Z(ITERZ, FBZCOLORPATH, depthval); \
|
||||
/* add the bias */ \
|
||||
if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
|
||||
{ \
|
||||
depthval += (INT16)(VV)->reg[zaColor].u; \
|
||||
CLAMP(depthval, 0, 0xffff); \
|
||||
} \
|
||||
} \
|
||||
else if (FBZMODE_DEPTH_FLOAT_SELECT(FBZMODE) == 0) \
|
||||
depthval = wfloat; \
|
||||
@ -3116,25 +3110,28 @@ do
|
||||
depthval = 0x0000; \
|
||||
else \
|
||||
{ \
|
||||
UINT32 temp = (ITERZ) << 4; \
|
||||
if ((temp & 0xffff0000) == 0) \
|
||||
UINT32 temp = (ITERZ << 4); \
|
||||
if (!(temp & 0xffff0000)) \
|
||||
depthval = 0xffff; \
|
||||
else \
|
||||
{ \
|
||||
int exp = count_leading_zeros(temp); \
|
||||
temp &=0x7fff0000; \
|
||||
depthval = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
|
||||
} \
|
||||
} \
|
||||
/* add the bias */ \
|
||||
if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
|
||||
{ \
|
||||
depthval += (INT16)(VV)->reg[zaColor].u; \
|
||||
CLAMP(depthval, 0, 0xffff); \
|
||||
} \
|
||||
} \
|
||||
\
|
||||
\
|
||||
} \
|
||||
/* add the bias */ \
|
||||
biasdepth = depthval; \
|
||||
if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
|
||||
{ \
|
||||
biasdepth += (INT16)(VV)->reg[zaColor].u; \
|
||||
CLAMP(biasdepth, 0, 0xffff); \
|
||||
}
|
||||
|
||||
|
||||
#define DEPTH_TEST(VV, STATS, XX, FBZMODE) \
|
||||
do \
|
||||
{ \
|
||||
/* handle depth buffer testing */ \
|
||||
if (FBZMODE_ENABLE_DEPTHBUF(FBZMODE)) \
|
||||
{ \
|
||||
@ -3143,7 +3140,7 @@ do
|
||||
/* the source depth is either the iterated W/Z+bias or a */ \
|
||||
/* constant value */ \
|
||||
if (FBZMODE_DEPTH_SOURCE_COMPARE(FBZMODE) == 0) \
|
||||
depthsource = depthval; \
|
||||
depthsource = biasdepth; \
|
||||
else \
|
||||
depthsource = (UINT16)(VV)->reg[zaColor].u; \
|
||||
\
|
||||
@ -3205,7 +3202,9 @@ do
|
||||
case 7: /* depthOP = always */ \
|
||||
break; \
|
||||
} \
|
||||
}
|
||||
} \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
|
||||
#define PIXEL_PIPELINE_END(VV, STATS, DITHER, DITHER4, DITHER_LOOKUP, XX, dest, depth, FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, ITERZ, ITERW, ITERAXXX) \
|
||||
@ -3235,7 +3234,7 @@ do
|
||||
if (depth && FBZMODE_AUX_BUFFER_MASK(FBZMODE)) \
|
||||
{ \
|
||||
if (FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) == 0) \
|
||||
depth[XX] = depthval; \
|
||||
depth[XX] = biasdepth; \
|
||||
else \
|
||||
depth[XX] = a; \
|
||||
} \
|
||||
@ -3315,7 +3314,7 @@ do
|
||||
c_other.u = (VV)->reg[color1].u; \
|
||||
break; \
|
||||
\
|
||||
default: /* reserved */ \
|
||||
default: /* reserved - voodoo3 framebufferRGB */ \
|
||||
c_other.u = 0; \
|
||||
break; \
|
||||
} \
|
||||
@ -3647,9 +3646,11 @@ static void raster_##name(void *destbase, INT32 y, const poly_extent *extent, co
|
||||
rgb_union iterargb = { 0 }; \
|
||||
rgb_union texel = { 0 }; \
|
||||
\
|
||||
/* pixel pipeline part 1 handles depth testing and stippling */ \
|
||||
/* pixel pipeline part 1 handles depth setup and stippling */ \
|
||||
PIXEL_PIPELINE_BEGIN(v, stats, x, y, FBZCOLORPATH, FBZMODE, \
|
||||
iterz, iterw); \
|
||||
/* depth testing */ \
|
||||
DEPTH_TEST(v, stats, x, FBZMODE); \
|
||||
\
|
||||
/* run the texture pipeline on TMU1 to produce a value in texel */ \
|
||||
/* note that they set LOD min to 8 to "disable" a TMU */ \
|
||||
|
||||
@ -211,7 +211,7 @@ static TIMER_CALLBACK( stall_cpu_callback );
|
||||
static void stall_cpu(voodoo_state *v, int state, attotime current_time);
|
||||
static TIMER_CALLBACK( vblank_callback );
|
||||
static INT32 register_w(voodoo_state *v, offs_t offset, UINT32 data);
|
||||
static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask, int forcefront);
|
||||
static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask, bool lfb_3d);
|
||||
static INT32 texture_w(voodoo_state *v, offs_t offset, UINT32 data);
|
||||
static INT32 banshee_2d_w(voodoo_state *v, offs_t offset, UINT32 data);
|
||||
|
||||
@ -1725,7 +1725,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
/* loop over all registers and write them one at a time */
|
||||
for (i = 3; i <= 31; i++)
|
||||
if (command & (1 << i))
|
||||
cycles += register_w(v, bltSrcBaseAddr + (i - 3), *src++);
|
||||
cycles += register_w(v, banshee2D_clip0Min + (i - 3), *src++);
|
||||
break;
|
||||
|
||||
/*
|
||||
@ -1874,11 +1874,12 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
// Banshee/Voodoo3 2D register writes
|
||||
|
||||
/* loop over all registers and write them one at a time */
|
||||
target &= 0xff;
|
||||
for (i = 15; i <= 28; i++)
|
||||
{
|
||||
if (command & (1 << i))
|
||||
{
|
||||
cycles += banshee_2d_w(v, target & 0xff, *src);
|
||||
cycles += banshee_2d_w(v, target + (i - 15), *src);
|
||||
//logerror(" 2d reg: %03x = %08X\n", target & 0x7ff, *src);
|
||||
src++;
|
||||
}
|
||||
@ -1942,7 +1943,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
|
||||
/* loop over words */
|
||||
for (i = 0; i < count; i++)
|
||||
cycles += lfb_w(v, target++, *src++, 0xffffffff, FALSE);
|
||||
cycles += lfb_w(v, target++, *src++, 0xffffffff, true);
|
||||
|
||||
break;
|
||||
}
|
||||
@ -2931,7 +2932,7 @@ default_case:
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask, int forcefront)
|
||||
static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask, bool lfb_3d)
|
||||
{
|
||||
UINT16 *dest, *depth;
|
||||
UINT32 destmax, depthmax;
|
||||
@ -2942,6 +2943,29 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
/* statistics */
|
||||
v->stats.lfb_writes++;
|
||||
|
||||
// TODO: This direct write is not verified.
|
||||
// For direct lfb access just write the data
|
||||
if (!lfb_3d) {
|
||||
UINT32 bufoffs;
|
||||
/* compute X,Y */
|
||||
offset <<= 1;
|
||||
x = offset & ((1 << v->fbi.lfb_stride) - 1);
|
||||
y = (offset >> v->fbi.lfb_stride);
|
||||
dest = (UINT16 *)(v->fbi.ram + v->fbi.lfb_base*4);
|
||||
destmax = (v->fbi.mask + 1 - v->fbi.lfb_base*4) / 2;
|
||||
bufoffs = y * v->fbi.rowpixels + x;
|
||||
if (bufoffs >= destmax) {
|
||||
logerror("LFB_W: Buffer offset out of bounds x=%i y=%i lfb_3d=%i offset=%08X bufoffs=%08X data=%08X\n", x, y, lfb_3d, offset, (UINT32) bufoffs, data);
|
||||
return 0;
|
||||
}
|
||||
if (ACCESSING_BITS_0_15)
|
||||
dest[bufoffs + 0] = data&0xffff;
|
||||
if (ACCESSING_BITS_16_31)
|
||||
dest[bufoffs + 1] = data>>16;
|
||||
if (LOG_LFB) logerror("VOODOO.%d.LFB:write direct (%d,%d) = %08X & %08X\n", v->index, x, y, data, mem_mask);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* byte swizzling */
|
||||
if (LFBMODE_BYTE_SWIZZLE_WRITES(v->reg[lfbMode].u))
|
||||
{
|
||||
@ -3128,12 +3152,13 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
logerror("lfb_w: Unknown format\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* compute X,Y */
|
||||
x = (offset << 0) & ((1 << v->fbi.lfb_stride) - 1);
|
||||
y = (offset >> v->fbi.lfb_stride) & ((1 << v->fbi.lfb_stride) - 1);
|
||||
x = offset & ((1 << v->fbi.lfb_stride) - 1);
|
||||
y = (offset >> v->fbi.lfb_stride) & 0x3ff;
|
||||
|
||||
/* adjust the mask based on which half of the data is written */
|
||||
if (!ACCESSING_BITS_0_15)
|
||||
@ -3142,7 +3167,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
mask &= ~(0xf0 + LFB_DEPTH_PRESENT_MSW);
|
||||
|
||||
/* select the target buffer */
|
||||
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_WRITE_BUFFER_SELECT(v->reg[lfbMode].u);
|
||||
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : LFBMODE_WRITE_BUFFER_SELECT(v->reg[lfbMode].u);
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
@ -3250,12 +3275,14 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
stats_block *stats = &v->fbi.lfb_stats;
|
||||
INT64 iterw;
|
||||
if (LFBMODE_WRITE_W_SELECT(v->reg[lfbMode].u)) {
|
||||
iterw = (UINT32) (v->reg[zaColor].u & 0xffff) << 16;
|
||||
iterw = (UINT32) v->reg[zaColor].u << 16;
|
||||
} else {
|
||||
// The most significant fractional bits of 16.32 W are set to z
|
||||
iterw = (UINT32) sw[pix] << 16;
|
||||
}
|
||||
INT32 iterz = sw[pix] << 12;
|
||||
rgb_union color;
|
||||
rgb_union iterargb = { 0 };
|
||||
|
||||
/* apply clipping */
|
||||
if (FBZMODE_ENABLE_CLIPPING(v->reg[fbzMode].u))
|
||||
@ -3272,7 +3299,52 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
}
|
||||
|
||||
/* pixel pipeline part 1 handles depth testing and stippling */
|
||||
PIXEL_PIPELINE_BEGIN(v, stats, x, y, v->reg[fbzColorPath].u, v->reg[fbzMode].u, iterz, iterw);
|
||||
//PIXEL_PIPELINE_BEGIN(v, stats, x, y, v->reg[fbzColorPath].u, v->reg[fbzMode].u, iterz, iterw);
|
||||
// Start PIXEL_PIPE_BEGIN copy
|
||||
//#define PIXEL_PIPELINE_BEGIN(VV, STATS, XX, YY, FBZCOLORPATH, FBZMODE, ITERZ, ITERW)
|
||||
do
|
||||
{
|
||||
INT32 fogdepth, biasdepth;
|
||||
INT32 prefogr, prefogg, prefogb;
|
||||
INT32 r, g, b, a;
|
||||
|
||||
(stats)->pixels_in++;
|
||||
|
||||
/* apply clipping */
|
||||
/* note that for perf reasons, we assume the caller has done clipping */
|
||||
|
||||
/* handle stippling */
|
||||
if (FBZMODE_ENABLE_STIPPLE(v->reg[fbzMode].u))
|
||||
{
|
||||
/* rotate mode */
|
||||
if (FBZMODE_STIPPLE_PATTERN(v->reg[fbzMode].u) == 0)
|
||||
{
|
||||
v->reg[stipple].u = (v->reg[stipple].u << 1) | (v->reg[stipple].u >> 31);
|
||||
if ((v->reg[stipple].u & 0x80000000) == 0)
|
||||
{
|
||||
v->stats.total_stippled++;
|
||||
goto skipdrawdepth;
|
||||
}
|
||||
}
|
||||
|
||||
/* pattern mode */
|
||||
else
|
||||
{
|
||||
int stipple_index = ((y & 3) << 3) | (~x & 7);
|
||||
if (((v->reg[stipple].u >> stipple_index) & 1) == 0)
|
||||
{
|
||||
v->stats.total_stippled++;
|
||||
goto skipdrawdepth;
|
||||
}
|
||||
}
|
||||
}
|
||||
// End PIXEL_PIPELINE_BEGIN COPY
|
||||
|
||||
// Depth testing value for lfb pipeline writes is directly from write data, no biasing is used
|
||||
fogdepth = biasdepth = (UINT32) sw[pix];
|
||||
|
||||
/* Perform depth testing */
|
||||
DEPTH_TEST(v, stats, x, v->reg[fbzMode].u);
|
||||
|
||||
/* use the RGBA we stashed above */
|
||||
color.rgb.r = r = sr[pix];
|
||||
@ -3286,7 +3358,9 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
APPLY_ALPHATEST(v, stats, v->reg[alphaMode].u, color.rgb.a);
|
||||
|
||||
/* pixel pipeline part 2 handles color combine, fog, alpha, and final output */
|
||||
PIXEL_PIPELINE_END(v, stats, dither, dither4, dither_lookup, x, dest, depth, v->reg[fbzMode].u, v->reg[fbzColorPath].u, v->reg[alphaMode].u, v->reg[fogMode].u, iterz, iterw, v->reg[zaColor]);
|
||||
PIXEL_PIPELINE_END(v, stats, dither, dither4, dither_lookup, x, dest, depth,
|
||||
v->reg[fbzMode].u, v->reg[fbzColorPath].u, v->reg[alphaMode].u, v->reg[fogMode].u,
|
||||
iterz, iterw, iterargb);
|
||||
}
|
||||
nextpixel:
|
||||
/* advance our pointers */
|
||||
@ -3368,7 +3442,7 @@ static INT32 texture_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
{
|
||||
tbaseaddr = t->lodoffset[0] + offset*4;
|
||||
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 16-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 8-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
}
|
||||
|
||||
/* write the four bytes in little-endian order */
|
||||
@ -3520,7 +3594,7 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
mem_mask &= 0xffff0000;
|
||||
address &= 0xffffff;
|
||||
|
||||
cycles = lfb_w(v, address, data, mem_mask, FALSE);
|
||||
cycles = lfb_w(v, address, data, mem_mask, true);
|
||||
}
|
||||
}
|
||||
|
||||
@ -3646,7 +3720,7 @@ WRITE32_MEMBER( voodoo_device::voodoo_w )
|
||||
else if (offset & (0x800000/4))
|
||||
cycles = texture_w(v, offset, data);
|
||||
else
|
||||
cycles = lfb_w(v, offset, data, mem_mask, FALSE);
|
||||
cycles = lfb_w(v, offset, data, mem_mask, true);
|
||||
|
||||
/* if we ended up with cycles, mark the operation pending */
|
||||
if (cycles)
|
||||
@ -3916,7 +3990,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT32 lfb_r(voodoo_state *v, offs_t offset, int forcefront)
|
||||
static UINT32 lfb_r(voodoo_state *v, offs_t offset, bool lfb_3d)
|
||||
{
|
||||
UINT16 *buffer;
|
||||
UINT32 bufmax;
|
||||
@ -3928,43 +4002,54 @@ static UINT32 lfb_r(voodoo_state *v, offs_t offset, int forcefront)
|
||||
v->stats.lfb_reads++;
|
||||
|
||||
/* compute X,Y */
|
||||
x = (offset << 1) & 0x3fe;
|
||||
y = (offset >> 9) & 0x3ff;
|
||||
offset <<= 1;
|
||||
x = offset & ((1 << v->fbi.lfb_stride) - 1);
|
||||
y = (offset >> v->fbi.lfb_stride);
|
||||
|
||||
/* select the target buffer */
|
||||
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_READ_BUFFER_SELECT(v->reg[lfbMode].u);
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
|
||||
break;
|
||||
if (lfb_3d) {
|
||||
y &= 0x3ff;
|
||||
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : LFBMODE_READ_BUFFER_SELECT(v->reg[lfbMode].u);
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
|
||||
break;
|
||||
|
||||
case 1: /* back buffer */
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
|
||||
break;
|
||||
case 1: /* back buffer */
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
|
||||
break;
|
||||
|
||||
case 2: /* aux buffer */
|
||||
if (v->fbi.auxoffs == ~0)
|
||||
case 2: /* aux buffer */
|
||||
if (v->fbi.auxoffs == ~0)
|
||||
return 0xffffffff;
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.auxoffs) / 2;
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
return 0xffffffff;
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.auxoffs) / 2;
|
||||
break;
|
||||
}
|
||||
|
||||
default: /* reserved */
|
||||
return 0xffffffff;
|
||||
/* determine the screen Y */
|
||||
scry = y;
|
||||
if (LFBMODE_Y_ORIGIN(v->reg[lfbMode].u))
|
||||
scry = (v->fbi.yorigin - y) & 0x3ff;
|
||||
} else {
|
||||
// Direct lfb access
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.lfb_base*4);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.lfb_base*4) / 2;
|
||||
scry = y;
|
||||
}
|
||||
|
||||
/* determine the screen Y */
|
||||
scry = y;
|
||||
if (LFBMODE_Y_ORIGIN(v->reg[lfbMode].u))
|
||||
scry = (v->fbi.yorigin - y) & 0x3ff;
|
||||
|
||||
/* advance pointers to the proper row */
|
||||
bufoffs = scry * v->fbi.rowpixels + x;
|
||||
if (bufoffs >= bufmax)
|
||||
if (bufoffs >= bufmax) {
|
||||
logerror("LFB_R: Buffer offset out of bounds x=%i y=%i lfb_3d=%i offset=%08X bufoffs=%08X\n", x, y, lfb_3d, offset, (UINT32) bufoffs);
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
/* wait for any outstanding work to finish */
|
||||
poly_wait(v->poly, "LFB read");
|
||||
@ -4005,7 +4090,7 @@ READ32_MEMBER( voodoo_device::voodoo_r )
|
||||
if (!(offset & (0xc00000/4)))
|
||||
return register_r(v, offset);
|
||||
else if (!(offset & (0x800000/4)))
|
||||
return lfb_r(v, offset, FALSE);
|
||||
return lfb_r(v, offset, true);
|
||||
|
||||
return 0xffffffff;
|
||||
}
|
||||
@ -4098,17 +4183,18 @@ READ32_MEMBER( voodoo_banshee_device::banshee_r )
|
||||
else if (offset < 0x600000/4)
|
||||
result = register_r(v, offset & 0x1fffff/4);
|
||||
else if (offset < 0x800000/4)
|
||||
logerror("%s:banshee_r(TEX:%X)\n", machine().describe_context(), (offset*4) & 0x1fffff);
|
||||
logerror("%s:banshee_r(TEX0:%X)\n", machine().describe_context(), (offset*4) & 0x1fffff);
|
||||
else if (offset < 0xa00000/4)
|
||||
logerror("%s:banshee_r(TEX1:%X)\n", machine().describe_context(), (offset*4) & 0x1fffff);
|
||||
else if (offset < 0xc00000/4)
|
||||
logerror("%s:banshee_r(RES:%X)\n", machine().describe_context(), (offset*4) & 0x3fffff);
|
||||
logerror("%s:banshee_r(FLASH Bios ROM:%X)\n", machine().describe_context(), (offset*4) & 0x3fffff);
|
||||
else if (offset < 0x1000000/4)
|
||||
logerror("%s:banshee_r(YUV:%X)\n", machine().describe_context(), (offset*4) & 0x3fffff);
|
||||
else if (offset < 0x2000000/4)
|
||||
{
|
||||
UINT8 temp = v->fbi.lfb_stride;
|
||||
v->fbi.lfb_stride = 11;
|
||||
result = lfb_r(v, offset & 0xffffff/4, FALSE);
|
||||
v->fbi.lfb_stride = temp;
|
||||
result = lfb_r(v, offset & 0xffffff/4, true);
|
||||
} else {
|
||||
logerror("%s:banshee_r(%X) Access out of bounds\n", machine().describe_context(), offset*4);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
@ -4130,9 +4216,14 @@ READ32_MEMBER( voodoo_banshee_device::banshee_fb_r )
|
||||
#endif
|
||||
if (offset*4 <= v->fbi.mask)
|
||||
result = ((UINT32 *)v->fbi.ram)[offset];
|
||||
else
|
||||
logerror("%s:banshee_fb_r(%X) Access out of bounds\n", machine().describe_context(), offset*4);
|
||||
}
|
||||
else {
|
||||
if (LOG_LFB)
|
||||
logerror("%s:banshee_fb_r(%X) to lfb_r: %08X lfb_base=%08X\n", machine().describe_context(), offset*4, offset - v->fbi.lfb_base, v->fbi.lfb_base);
|
||||
result = lfb_r(v, offset - v->fbi.lfb_base, false);
|
||||
}
|
||||
else
|
||||
result = lfb_r(v, offset - v->fbi.lfb_base, FALSE);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -4657,17 +4748,18 @@ WRITE32_MEMBER( voodoo_banshee_device::banshee_w )
|
||||
else if (offset < 0x600000/4)
|
||||
register_w(v, offset & 0x1fffff/4, data);
|
||||
else if (offset < 0x800000/4)
|
||||
logerror("%s:banshee_w(TEX:%X) = %08X & %08X\n", machine().describe_context(), (offset*4) & 0x1fffff, data, mem_mask);
|
||||
logerror("%s:banshee_w(TEX0:%X) = %08X & %08X\n", machine().describe_context(), (offset*4) & 0x1fffff, data, mem_mask);
|
||||
else if (offset < 0xa00000/4)
|
||||
logerror("%s:banshee_w(TEX1:%X) = %08X & %08X\n", machine().describe_context(), (offset*4) & 0x1fffff, data, mem_mask);
|
||||
else if (offset < 0xc00000/4)
|
||||
logerror("%s:banshee_w(RES:%X) = %08X & %08X\n", machine().describe_context(), (offset*4) & 0x3fffff, data, mem_mask);
|
||||
logerror("%s:banshee_r(FLASH Bios ROM:%X)\n", machine().describe_context(), (offset*4) & 0x3fffff);
|
||||
else if (offset < 0x1000000/4)
|
||||
logerror("%s:banshee_w(YUV:%X) = %08X & %08X\n", machine().describe_context(), (offset*4) & 0x3fffff, data, mem_mask);
|
||||
else if (offset < 0x2000000/4)
|
||||
{
|
||||
UINT8 temp = v->fbi.lfb_stride;
|
||||
v->fbi.lfb_stride = 11;
|
||||
lfb_w(v, offset & 0xffffff/4, data, mem_mask, FALSE);
|
||||
v->fbi.lfb_stride = temp;
|
||||
lfb_w(v, offset & 0xffffff/4, data, mem_mask, true);
|
||||
} else {
|
||||
logerror("%s:banshee_w Address out of range %08X = %08X & %08X\n", machine().describe_context(), (offset*4), data, mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
@ -4691,13 +4783,15 @@ WRITE32_MEMBER( voodoo_banshee_device::banshee_fb_w )
|
||||
{
|
||||
if (offset*4 <= v->fbi.mask)
|
||||
COMBINE_DATA(&((UINT32 *)v->fbi.ram)[offset]);
|
||||
else
|
||||
logerror("%s:banshee_fb_w Out of bounds (%X) = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
|
||||
#if LOG_LFB
|
||||
logerror("%s:banshee_fb_w(%X) = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
lfb_w(v, offset - v->fbi.lfb_base, data, mem_mask, FALSE);
|
||||
lfb_w(v, offset - v->fbi.lfb_base, data, mem_mask, false);
|
||||
}
|
||||
|
||||
|
||||
@ -4828,7 +4922,7 @@ WRITE32_MEMBER( voodoo_banshee_device::banshee_io_w )
|
||||
}
|
||||
|
||||
case io_lfbMemoryConfig:
|
||||
v->fbi.lfb_base = (data & 0x1fff) << 10;
|
||||
v->fbi.lfb_base = (data & 0x1fff) << (12-2);
|
||||
v->fbi.lfb_stride = ((data >> 13) & 7) + 9;
|
||||
if (LOG_REGISTERS)
|
||||
logerror("%s:banshee_io_w(%s) = %08X & %08X\n", machine().describe_context(), banshee_io_reg_name[offset], data, mem_mask);
|
||||
@ -4870,7 +4964,7 @@ void voodoo_device::common_start_voodoo(UINT8 type)
|
||||
voodoo_state *v = get_safe_token(this);
|
||||
const raster_info *info;
|
||||
void *fbmem, *tmumem[2];
|
||||
UINT32 tmumem0;
|
||||
UINT32 tmumem0, tmumem1;
|
||||
int val;
|
||||
|
||||
/* validate configuration */
|
||||
@ -4993,6 +5087,7 @@ void voodoo_device::common_start_voodoo(UINT8 type)
|
||||
|
||||
/* allocate memory */
|
||||
tmumem0 = m_tmumem0;
|
||||
tmumem1 = m_tmumem1;
|
||||
if (v->type <= TYPE_VOODOO_2)
|
||||
{
|
||||
/* separate FB/TMU memory */
|
||||
@ -5005,6 +5100,8 @@ void voodoo_device::common_start_voodoo(UINT8 type)
|
||||
/* shared memory */
|
||||
tmumem[0] = tmumem[1] = fbmem = auto_alloc_array(machine(), UINT8, m_fbmem << 20);
|
||||
tmumem0 = m_fbmem;
|
||||
if (v->type == TYPE_VOODOO_3)
|
||||
tmumem1 = m_fbmem;
|
||||
}
|
||||
|
||||
/* set up frame buffer */
|
||||
@ -5016,9 +5113,9 @@ void voodoo_device::common_start_voodoo(UINT8 type)
|
||||
/* set up the TMUs */
|
||||
init_tmu(v, &v->tmu[0], &v->reg[0x100], tmumem[0], tmumem0 << 20);
|
||||
v->chipmask |= 0x02;
|
||||
if (m_tmumem1 != 0 || v->type == TYPE_VOODOO_3)
|
||||
if (tmumem1 != 0)
|
||||
{
|
||||
init_tmu(v, &v->tmu[1], &v->reg[0x200], tmumem[1], m_tmumem1 << 20);
|
||||
init_tmu(v, &v->tmu[1], &v->reg[0x200], tmumem[1], tmumem1 << 20);
|
||||
v->chipmask |= 0x04;
|
||||
v->tmu_config |= 0x40;
|
||||
}
|
||||
@ -5567,7 +5664,7 @@ static raster_info *add_rasterizer(voodoo_state *v, const raster_info *cinfo)
|
||||
v->raster_hash[hash] = info;
|
||||
|
||||
if (LOG_RASTERIZERS)
|
||||
printf("Adding rasterizer @ %p : %08X %08X %08X %08X %08X %08X (hash=%d)\n",
|
||||
printf("Adding rasterizer @ %p : cp=%08X am=%08X %08X fbzM=%08X tm0=%08X tm1=%08X (hash=%d)\n",
|
||||
info->callback,
|
||||
info->eff_color_path, info->eff_alpha_mode, info->eff_fog_mode, info->eff_fbz_mode,
|
||||
info->eff_tex_mode_0, info->eff_tex_mode_1, hash);
|
||||
@ -5627,6 +5724,7 @@ static raster_info *find_rasterizer(voodoo_state *v, int texcount)
|
||||
curinfo.polys = 0;
|
||||
curinfo.hits = 0;
|
||||
curinfo.next = 0;
|
||||
curinfo.hash = hash;
|
||||
|
||||
return add_rasterizer(v, &curinfo);
|
||||
}
|
||||
|
||||
@ -22,17 +22,14 @@ class berzerk_state : public driver_device
|
||||
public:
|
||||
berzerk_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_colorram(*this, "colorram"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_s14001a(*this, "speech"),
|
||||
m_ls181_10c(*this, "ls181_10c"),
|
||||
m_ls181_12c(*this, "ls181_12c"),
|
||||
m_custom(*this, "exidy"),
|
||||
m_screen(*this, "screen") { }
|
||||
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
required_shared_ptr<UINT8> m_colorram;
|
||||
m_screen(*this, "screen"),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_colorram(*this, "colorram") { }
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<s14001a_device> m_s14001a;
|
||||
@ -41,6 +38,9 @@ public:
|
||||
required_device<exidy_sound_device> m_custom;
|
||||
required_device<screen_device> m_screen;
|
||||
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
required_shared_ptr<UINT8> m_colorram;
|
||||
|
||||
UINT8 m_magicram_control;
|
||||
UINT8 m_last_shift_data;
|
||||
UINT8 m_intercept;
|
||||
@ -52,6 +52,7 @@ public:
|
||||
int m_p1_direction;
|
||||
int m_p2_counter_74ls161;
|
||||
int m_p2_direction;
|
||||
|
||||
DECLARE_READ8_MEMBER(led_on_r);
|
||||
DECLARE_WRITE8_MEMBER(led_on_w);
|
||||
DECLARE_READ8_MEMBER(led_off_r);
|
||||
@ -64,16 +65,19 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(magicram_w);
|
||||
DECLARE_WRITE8_MEMBER(magicram_control_w);
|
||||
DECLARE_READ8_MEMBER(intercept_v256_r);
|
||||
DECLARE_WRITE8_MEMBER(berzerk_audio_w);
|
||||
DECLARE_READ8_MEMBER(berzerk_audio_r);
|
||||
DECLARE_WRITE8_MEMBER(audio_w);
|
||||
DECLARE_READ8_MEMBER(audio_r);
|
||||
DECLARE_READ8_MEMBER(moonwarp_p1_r);
|
||||
DECLARE_READ8_MEMBER(moonwarp_p2_r);
|
||||
|
||||
DECLARE_DRIVER_INIT(moonwarp);
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
virtual void sound_reset();
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_berzerk(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
TIMER_CALLBACK_MEMBER(irq_callback);
|
||||
TIMER_CALLBACK_MEMBER(nmi_callback);
|
||||
void vpos_to_vsync_chain_counter(int vpos, UINT8 *counter, UINT8 *v256);
|
||||
@ -467,7 +471,7 @@ void berzerk_state::get_pens(rgb_t *pens)
|
||||
}
|
||||
|
||||
|
||||
UINT32 berzerk_state::screen_update_berzerk(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
UINT32 berzerk_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
rgb_t pens[NUM_PENS];
|
||||
offs_t offs;
|
||||
@ -514,7 +518,7 @@ UINT32 berzerk_state::screen_update_berzerk(screen_device &screen, bitmap_rgb32
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(berzerk_state::berzerk_audio_w)
|
||||
WRITE8_MEMBER(berzerk_state::audio_w)
|
||||
{
|
||||
int clock_divisor;
|
||||
|
||||
@ -568,7 +572,7 @@ WRITE8_MEMBER(berzerk_state::berzerk_audio_w)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(berzerk_state::berzerk_audio_r)
|
||||
READ8_MEMBER(berzerk_state::audio_r)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -591,7 +595,7 @@ void berzerk_state::sound_reset()
|
||||
{
|
||||
address_space &space = m_maincpu->space(AS_IO);
|
||||
/* clears the flip-flop controlling the volume and freq on the speech chip */
|
||||
berzerk_audio_w(space, 4, 0x40);
|
||||
audio_w(space, 4, 0x40);
|
||||
}
|
||||
|
||||
|
||||
@ -633,7 +637,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( berzerk_io_map, AS_IO, 8, berzerk_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x3f) AM_NOP
|
||||
AM_RANGE(0x40, 0x47) AM_READWRITE(berzerk_audio_r, berzerk_audio_w)
|
||||
AM_RANGE(0x40, 0x47) AM_READWRITE(audio_r, audio_w)
|
||||
AM_RANGE(0x48, 0x48) AM_READ_PORT("P1") AM_WRITENOP
|
||||
AM_RANGE(0x49, 0x49) AM_READ_PORT("SYSTEM") AM_WRITENOP
|
||||
AM_RANGE(0x4a, 0x4a) AM_READ_PORT("P2") AM_WRITENOP
|
||||
@ -1124,7 +1128,7 @@ static MACHINE_CONFIG_START( berzerk, berzerk_state )
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(berzerk_state, screen_update_berzerk)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(berzerk_state, screen_update)
|
||||
|
||||
/* audio hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
@ -1319,6 +1323,11 @@ DRIVER_INIT_MEMBER(berzerk_state,moonwarp)
|
||||
address_space &io = m_maincpu->space(AS_IO);
|
||||
io.install_read_handler (0x48, 0x48, read8_delegate(FUNC(berzerk_state::moonwarp_p1_r), this));
|
||||
io.install_read_handler (0x4a, 0x4a, read8_delegate(FUNC(berzerk_state::moonwarp_p2_r), this));
|
||||
|
||||
save_item(NAME(m_p1_counter_74ls161));
|
||||
save_item(NAME(m_p1_direction));
|
||||
save_item(NAME(m_p2_counter_74ls161));
|
||||
save_item(NAME(m_p2_direction));
|
||||
}
|
||||
|
||||
/*************************************
|
||||
@ -1327,10 +1336,10 @@ DRIVER_INIT_MEMBER(berzerk_state,moonwarp)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
GAME( 1980, berzerk, 0, berzerk, berzerk, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (set 1)", 0 )
|
||||
GAME( 1980, berzerk1, berzerk, berzerk, berzerk, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (set 2)", 0 )
|
||||
GAME( 1980, berzerkf, berzerk, berzerk, berzerkf, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (French Speech)", 0 )
|
||||
GAME( 1980, berzerkg, berzerk, berzerk, berzerkg, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (German Speech)", 0 )
|
||||
GAME( 1980, berzerks, berzerk, berzerk, berzerks, driver_device, 0, ROT0, "Stern Electronics (Sonic License)", "Berzerk (Spanish Speech)", 0 )
|
||||
GAME( 1981, frenzy, 0, frenzy, frenzy, driver_device, 0, ROT0, "Stern Electronics", "Frenzy", 0 )
|
||||
GAME( 1981, moonwarp, 0, frenzy, moonwarp, berzerk_state, moonwarp, ROT0, "Stern Electronics", "Moon War (prototype on Frenzy hardware)", 0)
|
||||
GAME( 1980, berzerk, 0, berzerk, berzerk, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1980, berzerk1, berzerk, berzerk, berzerk, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1980, berzerkf, berzerk, berzerk, berzerkf, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (French Speech)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1980, berzerkg, berzerk, berzerk, berzerkg, driver_device, 0, ROT0, "Stern Electronics", "Berzerk (German Speech)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1980, berzerks, berzerk, berzerk, berzerks, driver_device, 0, ROT0, "Stern Electronics (Sonic License)", "Berzerk (Spanish Speech)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1981, frenzy, 0, frenzy, frenzy, driver_device, 0, ROT0, "Stern Electronics", "Frenzy", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1981, moonwarp, 0, frenzy, moonwarp, berzerk_state, moonwarp, ROT0, "Stern Electronics", "Moon War (prototype on Frenzy hardware)", GAME_SUPPORTS_SAVE )
|
||||
|
||||
@ -124,9 +124,9 @@ static INPUT_PORTS_START( contra )
|
||||
PORT_DIPSETTING( 0x02, "3" )
|
||||
PORT_DIPSETTING( 0x01, "5" )
|
||||
PORT_DIPSETTING( 0x00, "7" )
|
||||
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3") /* Not Used according to manual */
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
|
||||
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
|
||||
PORT_DIPSETTING( 0x18, "30000 70000" )
|
||||
PORT_DIPSETTING( 0x10, "40000 80000" )
|
||||
@ -145,9 +145,9 @@ static INPUT_PORTS_START( contra )
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") /* Not Used according to manual */
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Single ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW3:2")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW3:3" )
|
||||
PORT_DIPNAME( 0x08, 0x08, "Sound" ) PORT_DIPLOCATION("SW3:4")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Mono ) )
|
||||
@ -156,6 +156,21 @@ INPUT_PORTS_END
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( gryzor )
|
||||
PORT_INCLUDE( contra )
|
||||
|
||||
PORT_MODIFY("DSW2")
|
||||
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3") /* Not Used according to manual, used in gryzor sets */
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
|
||||
|
||||
PORT_MODIFY("DSW3")
|
||||
PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") /* Not Used according to manual, used in gryzor sets */
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Single ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static const gfx_layout gfxlayout =
|
||||
{
|
||||
8,8,
|
||||
@ -279,6 +294,46 @@ ROM_START( contra1 )
|
||||
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
|
||||
ROM_END
|
||||
|
||||
ROM_START( contrae )
|
||||
ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
|
||||
ROM_LOAD( "633_e03.18a", 0x20000, 0x08000, CRC(7ebdb314) SHA1(b42c032cce7ae0c9b3eea6a41b7ffa5cb7fced5d) )
|
||||
ROM_CONTINUE( 0x08000, 0x08000 )
|
||||
ROM_LOAD( "633_e02.17a", 0x10000, 0x10000, CRC(9d5ebe66) SHA1(5218426e1494b4f6dec667f1ade7ada13aa04f2b) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
|
||||
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
|
||||
|
||||
// this PCB used official Konami riser-boards in place of the mask roms
|
||||
ROM_REGION( 0x80000, "gfx1", 0 )
|
||||
ROM_LOAD16_BYTE( "633_e04_a.7d", 0x00000, 0x10000, CRC(e027f330) SHA1(e3480c0ed9f5ed5df829e66eb72e01ea39d5fca3) )
|
||||
ROM_LOAD16_BYTE( "633_e04_b.7d", 0x20000, 0x10000, CRC(a71230f5) SHA1(c2c92b42a04adbb4c7ba3d4632b9a9db0555840e) )
|
||||
ROM_LOAD16_BYTE( "633_e04_c.7d", 0x40000, 0x10000, CRC(0b103d01) SHA1(95e7feb7103d71b43ba921b7a376a2faf642621b) )
|
||||
ROM_LOAD16_BYTE( "633_e04_d.7d", 0x60000, 0x10000, CRC(ab3faa60) SHA1(905c1eaa5fb46904058977582c9bb3132ba165f7) )
|
||||
ROM_LOAD16_BYTE( "633_e05_a.7f", 0x00001, 0x10000, CRC(81a70a77) SHA1(c7493474af0144c05d3d98b2f77a3dae2d8d7ca5) )
|
||||
ROM_LOAD16_BYTE( "633_e05_b.7f", 0x20001, 0x10000, CRC(55556f29) SHA1(ebd52abd4adb9c4302050579fa126fde49fb468d) )
|
||||
ROM_LOAD16_BYTE( "633_e05_c.7f", 0x40001, 0x10000, CRC(acba86bf) SHA1(c248c837b1f8093bcaf465b0c75b67f1f67a3f61) )
|
||||
ROM_LOAD16_BYTE( "633_e05_d.7f", 0x60001, 0x10000, CRC(59cf234d) SHA1(4a6bb30789e581c0600c55d8e8fba778e30ba299) )
|
||||
|
||||
ROM_REGION( 0x80000, "gfx2", 0 )
|
||||
ROM_LOAD16_BYTE( "633_e06_a.16d", 0x00000, 0x10000, CRC(030079c5) SHA1(3f93e05e9df0a9dde570b771e04b719cf0ace967) )
|
||||
ROM_LOAD16_BYTE( "633_e06_b.16d", 0x20000, 0x10000, CRC(e17d5807) SHA1(15ebbf62d026cc8ac75c9877304458cbc0c5d5e0) )
|
||||
ROM_LOAD16_BYTE( "633_e06_c.16d", 0x40000, 0x10000, CRC(7d6a28cd) SHA1(9fbbe0460406bb8b3e2e572c4d5a2f8be4ba9c2e) )
|
||||
ROM_LOAD16_BYTE( "633_e06_d.16d", 0x60000, 0x10000, CRC(83db378f) SHA1(b9a2235382836fe06868d3bbd45978653bf5c91d) )
|
||||
ROM_LOAD16_BYTE( "633_e07_a.16f", 0x00001, 0x10000, CRC(8fcd40e5) SHA1(980273dc9108cc546b2146ec1e9db5dd440c4bd2) )
|
||||
ROM_LOAD16_BYTE( "633_e07_b.16f", 0x20001, 0x10000, CRC(694e306e) SHA1(f077aefb2b1ed29b27ed02b094007fe6b50a06a1) )
|
||||
ROM_LOAD16_BYTE( "633_e07_c.16f", 0x40001, 0x10000, CRC(fb33f3ff) SHA1(c6f6035a1478e8d2cdab01ddf2ec07a834b79593) )
|
||||
ROM_LOAD16_BYTE( "633_e07_d.16f", 0x60001, 0x10000, CRC(cfab0988) SHA1(3961bcbc3093b787211ab2815914f90a89df78b1) )
|
||||
|
||||
ROM_REGION( 0x0500, "proms", 0 )
|
||||
ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
|
||||
ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
|
||||
ROM_LOAD( "633e10.18g", 0x0200, 0x0100, CRC(e782c494) SHA1(9459e721a4361fc4fbace3a017211f0199dee24d) ) /* 007121 #1 sprite lookup table */ // earlier rev
|
||||
ROM_LOAD( "633e11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
|
||||
|
||||
ROM_REGION( 0x0001, "pals", 0 )
|
||||
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
|
||||
ROM_END
|
||||
|
||||
ROM_START( contraj )
|
||||
ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
|
||||
ROM_LOAD( "633n03.18a", 0x20000, 0x08000, CRC(fedab568) SHA1(7fd4546335bdeef7f8326d4cbde7fa36d74e5cfc) )
|
||||
@ -506,13 +561,13 @@ ROM_START( contrabj1 )
|
||||
ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
|
||||
ROM_END
|
||||
|
||||
|
||||
GAME( 1987, contra, 0, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (US, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contra1, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (US, set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contraj, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (Japan, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contraj1, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (Japan, set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, gryzor, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Gryzor (set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, gryzor1, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Gryzor (set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrab, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (bootleg)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrabj, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (Japan bootleg, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrabj1, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (Japan bootleg, set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contra, 0, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (US / Asia, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contra1, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (US / Asia, set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrae, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (US / Asia, set 3)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contraj, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (Japan, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contraj1, contra, contra, contra, driver_device, 0, ROT90, "Konami", "Contra (Japan, set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, gryzor, contra, contra, gryzor, driver_device, 0, ROT90, "Konami", "Gryzor (set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, gryzor1, contra, contra, gryzor, driver_device, 0, ROT90, "Konami", "Gryzor (set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrab, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (bootleg)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrabj, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (Japan bootleg, set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1987, contrabj1, contra, contra, contra, driver_device, 0, ROT90, "bootleg", "Contra (Japan bootleg, set 2)", GAME_SUPPORTS_SAVE )
|
||||
|
||||
@ -6,11 +6,25 @@
|
||||
Supported Games PCB-ID
|
||||
----------------------------------
|
||||
Mosaic F-E1-32-009
|
||||
Royal Poker 2 F-E1-32N-COM9e
|
||||
|
||||
driver by Pierpaolo Prazzoli
|
||||
|
||||
*********************************************************************/
|
||||
|
||||
/*
|
||||
royalpk2 : to get 'secret. OK.'
|
||||
|
||||
0002D92C: MOV L18, L29
|
||||
0002D92E: CMPI L18, $1
|
||||
0002D930: BNE $2d94c
|
||||
|
||||
go 2d92c
|
||||
do l29 = 1
|
||||
f5
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/e132xs/e132xs.h"
|
||||
#include "machine/eepromser.h"
|
||||
@ -26,7 +40,7 @@ public:
|
||||
m_videoram(*this, "videoram"){ }
|
||||
|
||||
/* devices */
|
||||
required_device<e132xn_device> m_maincpu;
|
||||
required_device<hyperstone_device> m_maincpu;
|
||||
|
||||
/* memory pointers */
|
||||
required_shared_ptr<UINT32> m_videoram;
|
||||
@ -134,6 +148,9 @@ static INPUT_PORTS_START( mosaicf2 )
|
||||
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( mosaicf2, mosaicf2_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
@ -143,6 +160,8 @@ static MACHINE_CONFIG_START( mosaicf2, mosaicf2_state )
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", mosaicf2_state, irq0_line_hold)
|
||||
|
||||
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
|
||||
MCFG_EEPROM_ERASE_TIME(attotime::from_usec(1))
|
||||
MCFG_EEPROM_WRITE_TIME(attotime::from_usec(1))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -167,6 +186,85 @@ static MACHINE_CONFIG_START( mosaicf2, mosaicf2_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( royalpk2 )
|
||||
PORT_START("P1")
|
||||
|
||||
PORT_START("SYSTEM_P2")
|
||||
PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
PORT_BIT( 0xff7fffff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||
|
||||
PORT_START( "EEPROMIN" )
|
||||
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read)
|
||||
|
||||
PORT_START( "EEPROMOUT" )
|
||||
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, di_write)
|
||||
|
||||
PORT_START( "EEPROMCLK" )
|
||||
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, clk_write)
|
||||
|
||||
PORT_START( "EEPROMCS" )
|
||||
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( royalpk2_map, AS_PROGRAM, 32, mosaicf2_state )
|
||||
AM_RANGE(0x00000000, 0x003fffff) AM_RAM
|
||||
AM_RANGE(0x40000000, 0x4003ffff) AM_RAM AM_SHARE("videoram")
|
||||
AM_RANGE(0x80000000, 0x807fffff) AM_ROM AM_REGION("user2",0)
|
||||
AM_RANGE(0xfff00000, 0xffffffff) AM_ROM AM_REGION("user1",0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( royalpk2_io, AS_IO, 32, mosaicf2_state )
|
||||
AM_RANGE(0x4900, 0x4903) AM_READ_PORT("SYSTEM_P2")
|
||||
|
||||
AM_RANGE(0x4a00, 0x4a03) AM_READ_PORT("EEPROMIN")
|
||||
|
||||
AM_RANGE(0x6800, 0x6803) AM_WRITE_PORT("EEPROMCLK")
|
||||
AM_RANGE(0x6900, 0x6903) AM_WRITE_PORT("EEPROMCS")
|
||||
AM_RANGE(0x6a00, 0x6a03) AM_WRITE_PORT("EEPROMOUT")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static MACHINE_CONFIG_START( royalpk2, mosaicf2_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", GMS30C2132, XTAL_50MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(royalpk2_map)
|
||||
MCFG_CPU_IO_MAP(royalpk2_io)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", mosaicf2_state, irq1_line_hold)
|
||||
|
||||
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
|
||||
MCFG_EEPROM_ERASE_TIME(attotime::from_usec(1))
|
||||
MCFG_EEPROM_WRITE_TIME(attotime::from_usec(1))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
|
||||
MCFG_SCREEN_SIZE(512, 512)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(mosaicf2_state, screen_update_mosaicf2)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_PALETTE_ADD_RRRRRGGGGGBBBBB("palette")
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
|
||||
|
||||
// MCFG_YM2151_ADD("ymsnd", XTAL_14_31818MHz/4) /* 3.579545 MHz */
|
||||
// MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
// MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
|
||||
MCFG_OKIM6295_ADD("oki", XTAL_14_31818MHz/8, OKIM6295_PIN7_HIGH) /* 1.7897725 MHz */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
|
||||
// there is a 16c550 for communication
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Mosaic (c) 1999 F2 System
|
||||
@ -221,6 +319,9 @@ DRAML & DRAMU are GM71C18163CJ6
|
||||
|
||||
ROM1 & SND are stardard 27C040 and/or 27C020 eproms
|
||||
L00-L03 & U00-U03 are 29F1610ML Flash roms
|
||||
|
||||
|
||||
todo: royalpk2 layout (it's very different)
|
||||
*/
|
||||
|
||||
ROM_START( mosaicf2 )
|
||||
@ -242,4 +343,21 @@ ROM_START( mosaicf2 )
|
||||
ROM_LOAD( "snd.bin", 0x000000, 0x040000, CRC(4584589c) SHA1(5f9824724f840767c3dc1dc04b203ddf3d78b84c) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( royalpk2 )
|
||||
ROM_REGION32_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* Hyperstone CPU Code */
|
||||
/* 0 - 0x80000 empty */
|
||||
ROM_LOAD( "prog1", 0x80000, 0x080000, CRC(e1546304) SHA1(b628b347ba7fbbae948e98e72aa5ea190c5d0f2b) )
|
||||
|
||||
ROM_REGION32_BE( 0x800000, "user2", 0 ) /* gfx data */
|
||||
ROM_LOAD32_WORD_SWAP( "1.u00", 0x000000, 0x200000, CRC(b397a805) SHA1(3fafa8533c793f41d0567b76667d3f3478eb9c1d) )
|
||||
ROM_LOAD32_WORD_SWAP( "2.l00", 0x000002, 0x200000, CRC(83a67d20) SHA1(9bf4c3da0cd1aab2488f260f694493d8ee25883e) )
|
||||
ROM_LOAD32_WORD_SWAP( "3.u01", 0x400000, 0x200000, CRC(f7b9d508) SHA1(5d98687c6cf158df8134d88d3726778d3762b411) )
|
||||
ROM_LOAD32_WORD_SWAP( "4.l01", 0x400002, 0x200000, CRC(dcff4960) SHA1(f742c7a3b62262c4b0210db9df03f51b3f600bf2) )
|
||||
|
||||
ROM_REGION( 0x80000, "oki", 0 ) /* Oki Samples */
|
||||
ROM_LOAD( "snd2", 0x000000, 0x080000, CRC(f25e3315) SHA1(ce5350ecba6769b17bb01d82b55f26ded4d51773) )
|
||||
ROM_END
|
||||
|
||||
|
||||
GAME( 1999, mosaicf2, 0, mosaicf2, mosaicf2, driver_device, 0, ROT0, "F2 System", "Mosaic (F2 System)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1999, royalpk2, 0, royalpk2, royalpk2, driver_device, 0, ROT0, "F2 System", "Royal Poker 2 (Network version 3.12)", GAME_NOT_WORKING )
|
||||
|
||||
@ -1,6 +1,9 @@
|
||||
/* Unknown Gambling game with 186 CPU */
|
||||
/***********************************************************************************
|
||||
|
||||
/*
|
||||
Multi Game - EGD
|
||||
Poker - Roulette - Black Jack - Bingo
|
||||
|
||||
************************************************************************************
|
||||
|
||||
80186xl20 Xtal 40Mhz
|
||||
At89c52 (not dumped) with external 32K ram?? Xtal 11.xxx18Mhz
|
||||
@ -31,10 +34,11 @@ In order to get the game to run, follow these steps:
|
||||
- reset machine (press 'F3')
|
||||
|
||||
TODO:
|
||||
- inputs needs overhaul, namely fix coins and games enable (right now only Bingo 10 is enabled);
|
||||
- watchdog (service mode claims that there's one at the end of the aforementioned procedure);
|
||||
- fix the poker game (casino 10). seems lack of watchdog.
|
||||
- sound;
|
||||
*/
|
||||
|
||||
***********************************************************************************/
|
||||
|
||||
|
||||
|
||||
@ -253,9 +257,9 @@ static ADDRESS_MAP_START( gambl186_io, AS_IO, 16, gambl186_state )
|
||||
AM_RANGE(0x0504, 0x0505) AM_READ_PORT("IN2")
|
||||
|
||||
//AM_RANGE(0x0500, 0x050f) AM_READ(unk_r)
|
||||
AM_RANGE(0x0580, 0x0581) AM_READ_PORT("DSW0")
|
||||
AM_RANGE(0x0582, 0x0583) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x0584, 0x0585) AM_READ_PORT("DSW2") AM_WRITENOP // ???
|
||||
AM_RANGE(0x0580, 0x0581) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x0582, 0x0583) AM_READ_PORT("JOY")
|
||||
AM_RANGE(0x0584, 0x0585) AM_READ_PORT("DSW0") AM_WRITENOP // Watchdog: bit 8
|
||||
AM_RANGE(0x0600, 0x0603) AM_WRITENOP // lamps
|
||||
AM_RANGE(0x0680, 0x0683) AM_READWRITE(comms_r, comms_w)
|
||||
AM_RANGE(0x0700, 0x0701) AM_WRITE(data_bank_w)
|
||||
@ -265,274 +269,78 @@ ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( gambl186 )
|
||||
PORT_START("IN0")
|
||||
PORT_DIPNAME( 0x01, 0x01, "0-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("-") // Unknown meaning
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("-") PORT_CODE(KEYCODE_2) // Unknown meaning
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "1-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, "1-2" )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN5 ) PORT_CODE(KEYCODE_9)
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN3 )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN6 ) PORT_CODE(KEYCODE_0)
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_COIN4 )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Key") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "2-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
/* TODO: order isn't honored */
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN3 )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN4 )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_COIN5 )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_COIN6 )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
|
||||
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("- Aux") PORT_CODE(KEYCODE_3) // Unknown meaning
|
||||
PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("JOY")
|
||||
PORT_BIT( 0x01ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
|
||||
PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("DSW0")
|
||||
PORT_DIPNAME( 0x01, 0x01, "0-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, "0-2" )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_SERVICE(0x1000, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPNAME( 0x2000, 0x0000, "Casino 10 Game" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, "Bookkeeping" ) PORT_DIPLOCATION("SW1:2")
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, "SW1-1" ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "1-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, "1-2" )
|
||||
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, "SW2-4" ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, "SW2-3" ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, "SW2-2" ) PORT_DIPLOCATION("SW2:2")
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, "VGA Mode" ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPSETTING( 0x0800, "640x480" )
|
||||
PORT_DIPSETTING( 0x0000, "640x240" )
|
||||
PORT_DIPNAME( 0x1000, 0x0000, "Roulette Game" ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, "SW2-6" ) PORT_DIPLOCATION("SW2:6")
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x4000, 0x0000, "Black Jack Game" ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "2-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, "2-2" )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_SERVICE(0x1000, IP_ACTIVE_LOW )
|
||||
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, "Bookkeeping" )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, "SW2-8" ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
@ -541,7 +349,7 @@ INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( gambl186, gambl186_state )
|
||||
MCFG_CPU_ADD("maincpu", I80186, XTAL_40MHz/2)
|
||||
MCFG_CPU_ADD("maincpu", I80186, XTAL_40MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(gambl186_map)
|
||||
MCFG_CPU_IO_MAP(gambl186_io)
|
||||
|
||||
@ -552,7 +360,6 @@ MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
|
||||
ROM_START( gambl186 )
|
||||
ROM_REGION( 0x100000, "data", 0 )
|
||||
ROM_LOAD16_BYTE( "ie398.u11", 0x00000, 0x80000, CRC(86ad7cab) SHA1(b701c3701db630d218a9b1700f216f795a1b1272) )
|
||||
@ -580,6 +387,5 @@ ROM_START( gambl186a )
|
||||
ROM_END
|
||||
|
||||
|
||||
/* TODO: proper title, at least sub-label all games inside it. */
|
||||
GAME( 1997, gambl186, 0, gambl186, gambl186, driver_device, 0, ROT0, "EGD", "Multi Game - Bingo 10 (V398)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
GAME( 199?, gambl186a, gambl186, gambl186, gambl186, driver_device, 0, ROT0, "EGD", "Multi Game - Bingo 10 (V399)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
GAME( 1997, gambl186, 0, gambl186, gambl186, driver_device, 0, ROT0, "EGD", "Multi Game (V398)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
GAME( 199?, gambl186a, gambl186, gambl186, gambl186, driver_device, 0, ROT0, "EGD", "Multi Game (V399)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
|
||||
@ -148,7 +148,6 @@ static MACHINE_CONFIG_START( gtfore, iteagle_state )
|
||||
MCFG_ITEAGLE_EEPROM_ADD( ":pci:0a.0")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
|
||||
MCFG_SCREEN_REFRESH_RATE(59)
|
||||
MCFG_SCREEN_SIZE(512, 384)
|
||||
MCFG_SCREEN_UPDATE_DEVICE(":pci:09.0", voodoo_pci_device, screen_update)
|
||||
|
||||
@ -6364,6 +6364,7 @@ ddribble // GX690 (c) 1986
|
||||
ddribblep // GX690 (c) 1986
|
||||
contra // GX633 (c) 1987
|
||||
contra1 // GX633 (c) 1987
|
||||
contrae // GX633 (c) 1987
|
||||
contraj // GX633 (c) 1987 (Japan)
|
||||
contraj1 // GX633 (c) 1987 (Japan)
|
||||
gryzor // GX633 (c) 1987
|
||||
@ -10915,6 +10916,7 @@ wheelfir // (c) 199? TCH
|
||||
littlerb // (c) 1993 TCH
|
||||
tattack // (c) 198? Shonan
|
||||
mosaicf2 // (c) 1999 F2 System
|
||||
royalpk2 //
|
||||
finalgdr // (c) 2001 Semicom
|
||||
mrkicker // (c) 2001 Semicom
|
||||
wivernwg // (c) 2001 Semicom
|
||||
|
||||
@ -645,10 +645,15 @@ static GFXDECODE_START( spectrum )
|
||||
GFXDECODE_ENTRY( "maincpu", 0x3d00, spectrum_charlayout, 0, 8 )
|
||||
GFXDECODE_END
|
||||
|
||||
void spectrum_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
{
|
||||
m_maincpu->set_input_line(0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(spectrum_state::spec_interrupt)
|
||||
{
|
||||
device.execute().set_input_line(0, HOLD_LINE);
|
||||
m_maincpu->set_input_line(0, HOLD_LINE);
|
||||
timer_set(attotime::from_ticks(32, m_maincpu->clock()), 0, 0);
|
||||
}
|
||||
|
||||
DEVICE_IMAGE_LOAD_MEMBER(spectrum_state, spectrum_cart)
|
||||
|
||||
@ -275,16 +275,25 @@ ROM_START( vt240 )
|
||||
|
||||
ROM_REGION( 0x20000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_DEFAULT_BIOS( "vt240" )
|
||||
ROM_SYSTEM_BIOS( 0, "vt240o", "VT240 older" ) // has "VV2211 STATUS" in rom, V2.1?
|
||||
// according to the schematics an even older set exists, variation 'E1' with roms:
|
||||
// e100/8085: 23-003e6
|
||||
// e20: 23-001e6
|
||||
// e22: 23-002e6
|
||||
// e19: 23-048e5
|
||||
// e21: 23-049e5
|
||||
// but according to the Field Change Order below, the initial release is V2.1, so the above must be a prototype.
|
||||
// DOL for v2.1 to v2.2 change: http://web.archive.org/web/20060905145200/http://cmcnabb.cc.vt.edu/dec94mds/vt240dol.txt
|
||||
ROM_SYSTEM_BIOS( 0, "vt240v21", "VT240 V2.1" ) // initial factory release, FCO says this was 8 Feburary 1985
|
||||
ROMX_LOAD( "23-006e6-00.e20", 0x00000, 0x8000, CRC(79C11D82) SHA1(5A6FE5B75B6504A161F2C9B148C0FE9F19770837), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROMX_LOAD( "23-004e6-00.e22", 0x00001, 0x8000, CRC(EBA10FEF) SHA1(C0EE4D8E4EEB70066F03F3D17A7E2F2BD0B5F8AD), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROMX_LOAD( "23-007e6-00.e19", 0x10000, 0x8000, CRC(D18A2AB8) SHA1(37F448A332FC50298007ED39C8BF1AB1EB6D4CAE), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROMX_LOAD( "23-005e6-00.e21", 0x10001, 0x8000, CRC(558D0285) SHA1(E96A49BF9D55D8AB879D9B39AA380368C5C9ADE0), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROM_SYSTEM_BIOS( 1, "vt240", "VT240 newer" ) // has "VV2222 UPDATE" in rom, V2.2?
|
||||
ROM_SYSTEM_BIOS( 1, "vt240", "VT240 V2.2" ) // Revised version, December 1985
|
||||
ROMX_LOAD( "23-058e6.e20", 0x00000, 0x8000, CRC(D2A56B90) SHA1(39CBB26134D7D8BA308DF3A93228918A5945B45F), ROM_SKIP(1) | ROM_BIOS(2))
|
||||
ROMX_LOAD( "23-056e6.e22", 0x00001, 0x8000, CRC(C46E13C3) SHA1(0F2801FA7483D1F97708143CD81AE0816BF9A435), ROM_SKIP(1) | ROM_BIOS(2))
|
||||
ROMX_LOAD( "23-059e6.e19", 0x10000, 0x8000, CRC(F8393346) SHA1(1E28DAF1B7F2BDABC47CE2F6FA99EF038B275A29), ROM_SKIP(1) | ROM_BIOS(2))
|
||||
ROMX_LOAD( "23-057e6.e21", 0x10001, 0x8000, CRC(7CE9DCE9) SHA1(5A105E5BDCA13910B3B79CC23567CE2DC36B844D), ROM_SKIP(1) | ROM_BIOS(2))
|
||||
// E39, E85, E131 are empty.
|
||||
|
||||
ROM_REGION( 0x1000, "proms", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "23-351a1.e149", 0x0000, 0x0020, NO_DUMP) // 82s123; DRAM RAS/CAS Timing PROM
|
||||
@ -316,4 +325,5 @@ DRIVER_INIT_MEMBER(vt240_state,vt240)
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1983, vt240, 0, 0, mc7105, vt240, vt240_state, vt240, "Digital Equipment Corporation", "VT240", GAME_NOT_WORKING | GAME_NO_SOUND)
|
||||
//COMP( 1983, vt241, 0, 0, vt220, vt220, driver_device, 0, "Digital Equipment Corporation", "VT241", GAME_NOT_WORKING | GAME_NO_SOUND)
|
||||
// NOTE: the only difference between VT240 and VT241 is the latter comes with a VR241 Color monitor, while the former comes with a mono display; the ROMs and operation are identical.
|
||||
COMP( 1983, mc7105, 0, 0, mc7105, vt240, vt240_state, vt240, "Elektronika", "MC7105", GAME_NOT_WORKING | GAME_NO_SOUND)
|
||||
|
||||
@ -106,9 +106,11 @@ MACHINE_CONFIG_END
|
||||
ROM_START( vt320 )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_DEFAULT_BIOS( "vt320" )
|
||||
ROM_SYSTEM_BIOS( 0, "vt320o", "VT320 older version" )
|
||||
ROMX_LOAD( "23-054e7.e9", 0x0000, 0x10000, CRC(be98f9a4) SHA1(b8044d42ffaadb734fbd047fbca9c8aadeb0bf6c), ROM_BIOS(1))
|
||||
ROM_SYSTEM_BIOS( 1, "vt320", "VT320 newer version" )
|
||||
//DOL: http://web.archive.org/web/20060905115711/http://cmcnabb.cc.vt.edu/dec94mds/vt320dol.txt
|
||||
ROM_SYSTEM_BIOS( 0, "vt320v11", "VT320 V1.1" )
|
||||
// 23-054E7 below can also appear (same contents?) as 23-048E7 which is a mask rom
|
||||
ROMX_LOAD( "23-054e7.e9", 0x0000, 0x10000, CRC(be98f9a4) SHA1(b8044d42ffaadb734fbd047fbca9c8aadeb0bf6c), ROM_BIOS(1)) // EPROM
|
||||
ROM_SYSTEM_BIOS( 1, "vt320", "VT320 V1.2" )
|
||||
ROMX_LOAD( "23-104e7.e9", 0x0000, 0x10000, CRC(5f419b5a) SHA1(dbc429b32d6baefd8a56862717d6e7fea1fb0c1c), ROM_BIOS(2))
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -242,6 +242,7 @@ protected:
|
||||
void ts2068_hires_scanline(bitmap_ind16 &bitmap, int y, int borderlines);
|
||||
void ts2068_64col_scanline(bitmap_ind16 &bitmap, int y, int borderlines, unsigned short inkcolor);
|
||||
void ts2068_lores_scanline(bitmap_ind16 &bitmap, int y, int borderlines, int screen);
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -21,7 +21,7 @@
|
||||
***************************************************************************/
|
||||
VIDEO_START_MEMBER(spectrum_state,spectrum)
|
||||
{
|
||||
m_frame_invert_count = 25;
|
||||
m_frame_invert_count = 16;
|
||||
m_frame_number = 0;
|
||||
m_flash_invert = 0;
|
||||
|
||||
@ -37,7 +37,7 @@ VIDEO_START_MEMBER(spectrum_state,spectrum)
|
||||
|
||||
VIDEO_START_MEMBER(spectrum_state,spectrum_128)
|
||||
{
|
||||
m_frame_invert_count = 25;
|
||||
m_frame_invert_count = 16;
|
||||
m_frame_number = 0;
|
||||
m_flash_invert = 0;
|
||||
|
||||
|
||||
@ -84,6 +84,7 @@ CPU_DISASSEMBLE( ds5002fp );
|
||||
CPU_DISASSEMBLE( dsp16a );
|
||||
CPU_DISASSEMBLE( dsp32c );
|
||||
CPU_DISASSEMBLE( dsp56k );
|
||||
CPU_DISASSEMBLE( e0c6200 );
|
||||
CPU_DISASSEMBLE( esrip );
|
||||
CPU_DISASSEMBLE( f8 );
|
||||
CPU_DISASSEMBLE( g65816_generic );
|
||||
@ -231,13 +232,14 @@ static const dasm_table_entry dasm_table[] =
|
||||
{ "dsp16a", _16le, -1, CPU_DISASSEMBLE_NAME(dsp16a) },
|
||||
{ "dsp32c", _32le, 0, CPU_DISASSEMBLE_NAME(dsp32c) },
|
||||
{ "dsp56k", _16le, -1, CPU_DISASSEMBLE_NAME(dsp56k) },
|
||||
{ "e0c6200", _16be, -1, CPU_DISASSEMBLE_NAME(e0c6200) },
|
||||
{ "esrip", _64be, 0, CPU_DISASSEMBLE_NAME(esrip) },
|
||||
{ "f8", _8bit, 0, CPU_DISASSEMBLE_NAME(f8) },
|
||||
{ "g65816", _8bit, 0, CPU_DISASSEMBLE_NAME(g65816_generic) },
|
||||
{ "h6280", _8bit, 0, CPU_DISASSEMBLE_NAME(h6280) },
|
||||
// { "h8", _16be, 0, CPU_DISASSEMBLE_NAME(h8) },
|
||||
// { "h8_24", _16be, 0, CPU_DISASSEMBLE_NAME(h8_24) },
|
||||
// { "h8_32", _16be, 0, CPU_DISASSEMBLE_NAME(h8_32) },
|
||||
// { "h8", _16be, 0, CPU_DISASSEMBLE_NAME(h8) },
|
||||
// { "h8_24", _16be, 0, CPU_DISASSEMBLE_NAME(h8_24) },
|
||||
// { "h8_32", _16be, 0, CPU_DISASSEMBLE_NAME(h8_32) },
|
||||
{ "hc11", _8bit, 0, CPU_DISASSEMBLE_NAME(mb88) },
|
||||
{ "hcd62121", _16be, 0, CPU_DISASSEMBLE_NAME(hcd62121) },
|
||||
{ "hd61700", _8bit, 0, CPU_DISASSEMBLE_NAME(hd61700) },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user