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atlantis/vegas: Fixed DCS audio banking for DENVER and DSIO DCS audio.

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This commit is contained in:
Ted Green 2017-12-14 15:07:05 -07:00
parent ed2502fb4b
commit a3b35dd621
4 changed files with 51 additions and 46 deletions
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67
src/mame/audio/dcs.cpp
View File

@ -245,9 +245,9 @@ enum
#define DSIO_LED ((m_dsio.reg[1] >> 13) & 1) #define DSIO_LED ((m_dsio.reg[1] >> 13) & 1)
#define DSIO_MUTE ((m_dsio.reg[1] >> 14) & 1) #define DSIO_MUTE ((m_dsio.reg[1] >> 14) & 1)
#define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff) #define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x1fff)
#define DSIO_BANK_END 0x7ff #define DSIO_BANK_END 0x3ff
/* these macros are used to reference the DENVER ASIC */ /* these macros are used to reference the DENVER ASIC */
#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */ #define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
@ -256,9 +256,9 @@ enum
#define DENV_LED ((m_dsio.reg[1] >> 13) & 1) #define DENV_LED ((m_dsio.reg[1] >> 13) & 1)
#define DENV_MUTE ((m_dsio.reg[1] >> 14) & 1) #define DENV_MUTE ((m_dsio.reg[1] >> 14) & 1)
#define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff) #define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x1fff)
#define DENV_BANK_END 0xfff #define DENV_BANK_END 0x3ff
/************************************* /*************************************
* *
@ -394,7 +394,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_rambank_map, AS_PROGRAM, 16, dcs_audio_device ) static ADDRESS_MAP_START( dsio_rambank_map, AS_PROGRAM, 16, dcs_audio_device )
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000 + DSIO_BANK_END) AM_RAMBANK("databank") AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("databank")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, dcs_audio_device ) static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, dcs_audio_device )
@ -430,7 +430,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(denver_rambank_map, AS_PROGRAM, 16, dcs_audio_device) static ADDRESS_MAP_START(denver_rambank_map, AS_PROGRAM, 16, dcs_audio_device)
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000 + DENV_BANK_END) AM_RAMBANK("databank") AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("databank")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -456,8 +456,8 @@ void dcs_audio_device::dcs_boot()
switch (m_rev) switch (m_rev)
{ {
/* rev 1/1.5: use the last set data bank to boot from */ /* rev 1/1.5: use the last set data bank to boot from */
case 1: case REV_DCS1:
case 15: case REV_DCS1P5:
{ {
/* determine the base */ /* determine the base */
// max_banks = m_bootrom_words / 0x1000; // max_banks = m_bootrom_words / 0x1000;
@ -475,7 +475,7 @@ void dcs_audio_device::dcs_boot()
} }
/* rev 2: use the ROM page in the SDRC to boot from */ /* rev 2: use the ROM page in the SDRC to boot from */
case 2: case REV_DCS2:
{ {
/* determine the base */ /* determine the base */
uint16_t* base; uint16_t* base;
@ -502,8 +502,8 @@ void dcs_audio_device::dcs_boot()
} }
/* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */ /* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */
case 3: case REV_DSIO:
case 4: case REV_DENV:
m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_dsio.start_on_next_write = 0; m_dsio.start_on_next_write = 0;
break; break;
@ -527,24 +527,24 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
switch (m_rev) switch (m_rev)
{ {
/* rev 1/1.5: just reset the bank to 0 */ /* rev 1/1.5: just reset the bank to 0 */
case 1: case REV_DCS1:
case 15: case REV_DCS1P5:
m_sounddata_bank = 0; m_sounddata_bank = 0;
m_data_bank->set_entry(0); m_data_bank->set_entry(0);
break; break;
/* rev 2: reset the SDRC ASIC */ /* rev 2: reset the SDRC ASIC */
case 2: case REV_DCS2:
sdrc_reset(); sdrc_reset();
break; break;
/* rev 3: reset the DSIO ASIC */ /* rev 3: reset the DSIO ASIC */
case 3: case REV_DSIO:
dsio_reset(); dsio_reset();
break; break;
/* rev 4: reset the Denver ASIC */ /* rev 4: reset the Denver ASIC */
case 4: case REV_DENV:
denver_reset(); denver_reset();
break; break;
} }
@ -641,10 +641,10 @@ void dcs_audio_device::dcs_register_state()
if (m_sram != nullptr) if (m_sram != nullptr)
save_pointer(NAME(m_sram), 0x8000*4 / sizeof(m_sram[0])); save_pointer(NAME(m_sram), 0x8000*4 / sizeof(m_sram[0]));
if (m_rev == 2) if (m_rev == REV_DCS2)
machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::sdrc_remap_memory), this)); machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::sdrc_remap_memory), this));
if (m_rev == 4) if (m_rev == REV_DENV)
machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::denver_postload), this)); machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::denver_postload), this));
} }
@ -751,7 +751,7 @@ void dcs_audio_device::device_start()
m_bootrom_words = machine().root_device().memregion("dcs")->bytes() / 2; m_bootrom_words = machine().root_device().memregion("dcs")->bytes() / 2;
m_sounddata = m_bootrom; m_sounddata = m_bootrom;
m_sounddata_words = m_bootrom_words; m_sounddata_words = m_bootrom_words;
if (m_rev == 1) if (m_rev == REV_DCS1)
{ {
m_sounddata_banks = m_sounddata_words / 0x1000; m_sounddata_banks = m_sounddata_words / 0x1000;
m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, 0x1000*2); m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, 0x1000*2);
@ -797,18 +797,18 @@ void dcs2_audio_device::device_start()
/* find the DCS CPU and the sound ROMs */ /* find the DCS CPU and the sound ROMs */
m_cpu = subdevice<adsp21xx_device>("dcs2"); m_cpu = subdevice<adsp21xx_device>("dcs2");
m_rev = 2; m_rev = REV_DCS2;
soundbank_words = 0x1000; soundbank_words = 0x1000;
if (m_cpu == nullptr) if (m_cpu == nullptr)
{ {
m_cpu = subdevice<adsp21xx_device>("dsio"); m_cpu = subdevice<adsp21xx_device>("dsio");
m_rev = 3; m_rev = REV_DSIO;
soundbank_words = DSIO_BANK_END + 1; soundbank_words = DSIO_BANK_END + 1;
} }
if (m_cpu == nullptr) if (m_cpu == nullptr)
{ {
m_cpu = subdevice<adsp21xx_device>("denver"); m_cpu = subdevice<adsp21xx_device>("denver");
m_rev = 4; m_rev = REV_DENV;
soundbank_words = DENV_BANK_END + 1; soundbank_words = DENV_BANK_END + 1;
} }
if (m_cpu != nullptr && !m_cpu->started()) if (m_cpu != nullptr && !m_cpu->started())
@ -841,11 +841,12 @@ void dcs2_audio_device::device_start()
m_sounddata_words = m_bootrom_words; m_sounddata_words = m_bootrom_words;
} }
m_sounddata_banks = m_sounddata_words / soundbank_words; m_sounddata_banks = m_sounddata_words / soundbank_words;
if (m_rev != 2) if (m_rev != REV_DCS2)
{ {
if (m_ram_map) if (m_ram_map)
m_ram_map->set_bank(0); m_ram_map->set_bank(0);
m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words * 2); m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words * 2);
logerror("device_start: audio ram banks: %x size: %x\n", m_sounddata_banks, soundbank_words);
} }
@ -879,7 +880,7 @@ void dcs2_audio_device::device_start()
void dcs_audio_device::install_speedup(void) void dcs_audio_device::install_speedup(void)
{ {
if (m_polling_offset) { if (m_polling_offset) {
if (m_rev < 3) { if (m_rev < REV_DSIO) {
m_cpu->space(AS_DATA).install_readwrite_handler(m_polling_offset, m_polling_offset, read16_delegate(FUNC(dcs_audio_device::dcs_polling_r), this), write16_delegate(FUNC(dcs_audio_device::dcs_polling_w), this)); m_cpu->space(AS_DATA).install_readwrite_handler(m_polling_offset, m_polling_offset, read16_delegate(FUNC(dcs_audio_device::dcs_polling_r), this), write16_delegate(FUNC(dcs_audio_device::dcs_polling_w), this));
} }
else { else {
@ -920,7 +921,7 @@ WRITE16_MEMBER( dcs_audio_device::dcs_dataram_w )
WRITE16_MEMBER( dcs_audio_device::dcs_data_bank_select_w ) WRITE16_MEMBER( dcs_audio_device::dcs_data_bank_select_w )
{ {
if (m_rev != 15) if (m_rev != REV_DCS1P5)
m_sounddata_bank = data & 0x7ff; m_sounddata_bank = data & 0x7ff;
else else
m_sounddata_bank = (m_sounddata_bank & 0xff00) | (data & 0xff); m_sounddata_bank = (m_sounddata_bank & 0xff00) | (data & 0xff);
@ -929,7 +930,7 @@ WRITE16_MEMBER( dcs_audio_device::dcs_data_bank_select_w )
/* bit 11 = sound board led */ /* bit 11 = sound board led */
#if 0 #if 0
if (m_rev != 15) if (m_rev != REV_DCS1P5)
output().set_led_value(2, data & 0x800); output().set_led_value(2, data & 0x800);
#endif #endif
} }
@ -1268,7 +1269,7 @@ READ16_MEMBER( dcs_audio_device::denver_r )
// SDRC Revision // SDRC Revision
result = 0x0003; result = 0x0003;
} }
if (LOG_DCS_IO) logerror("%04X: denver_r 0x%x = %04x\n", space.device().safe_pc(), offset, result); if (LOG_DCS_IO) logerror("%04X: denver_r %s 0x%x = %04x\n", space.device().safe_pc(), denver_regname[offset], offset, result);
return result; return result;
} }
@ -1315,7 +1316,7 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
m_fifo_reset_w(1); m_fifo_reset_w(1);
break; break;
} }
if (LOG_DCS_IO) logerror("%04X: denver_w 0x%x = %04x\n", space.device().safe_pc(), offset, data); if (LOG_DCS_IO) logerror("%04X: denver_w %s 0x%x = %04x\n", space.device().safe_pc(), denver_regname[offset], offset, data);
} }
@ -1431,7 +1432,7 @@ int dcs_audio_device::control_r()
/* only boost for DCS2 boards */ /* only boost for DCS2 boards */
if (!m_auto_ack && !m_transfer.hle_enabled) if (!m_auto_ack && !m_transfer.hle_enabled)
machine().scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5)); machine().scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5));
if ( /* m_rev == 1 || */ m_rev == 15) // == 1 check breaks mk3 if ( /* m_rev == REV_DSC1 || */ m_rev == REV_DCS1P5) // == 1 check breaks mk3
return IS_OUTPUT_FULL() ? 0x80 : 0x00; return IS_OUTPUT_FULL() ? 0x80 : 0x00;
return m_latch_control; return m_latch_control;
} }
@ -1654,7 +1655,7 @@ int dcs_audio_device::data2_r()
{ {
if (LOG_DCS_IO) if (LOG_DCS_IO)
logerror("%08X dcs:data2_r = %04X\n", machine().device("maincpu")->safe_pc(), m_output_control); logerror("%08X dcs:data2_r = %04X\n", machine().device("maincpu")->safe_pc(), m_output_control);
if (m_rev >= 3) { if (m_rev >= REV_DSIO) {
// Not sure about this but allows sf2049 and roadburn to pass audio initialization tests at boot // Not sure about this but allows sf2049 and roadburn to pass audio initialization tests at boot
return m_output_control << 8; return m_output_control << 8;
} }
@ -1816,7 +1817,7 @@ READ16_MEMBER( dcs_audio_device::adsp_control_r )
break; break;
case IDMA_CONTROL_REG: case IDMA_CONTROL_REG:
if (m_rev == 3 || m_rev == 4) if (m_rev == REV_DSIO || m_rev == REV_DENV)
result = downcast<adsp2181_device *>(m_cpu)->idma_addr_r(); result = downcast<adsp2181_device *>(m_cpu)->idma_addr_r();
break; break;
@ -1843,7 +1844,7 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
{ {
case SYSCONTROL_REG: case SYSCONTROL_REG:
/* bit 9 forces a reset (not on 2181) */ /* bit 9 forces a reset (not on 2181) */
if ((data & 0x0200) && !(m_rev == 3 || m_rev == 4)) if ((data & 0x0200) && !(m_rev == REV_DSIO || m_rev == REV_DENV))
{ {
logerror("%04X:Rebooting DCS due to SYSCONTROL write = %04X\n", space.device().safe_pc(), data); logerror("%04X:Rebooting DCS due to SYSCONTROL write = %04X\n", space.device().safe_pc(), data);
m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
@ -1915,7 +1916,7 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
break; break;
case IDMA_CONTROL_REG: case IDMA_CONTROL_REG:
if (m_rev == 3 || m_rev == 4) if (m_rev == REV_DSIO || m_rev == REV_DENV)
downcast<adsp2181_device *>(m_cpu)->idma_addr_w(data); downcast<adsp2181_device *>(m_cpu)->idma_addr_w(data);
break; break;
} }

5
src/mame/audio/dcs.h
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@ -119,6 +119,11 @@ protected:
virtual void device_reset() override; virtual void device_reset() override;
void add_mconfig_dcs(machine_config &config); void add_mconfig_dcs(machine_config &config);
// Formerly DCS1=1 DCS1P5=15 DCS2=2 DSIO=3 DENV=4
enum { REV_DCS1, REV_DCS1P5, REV_DCS2, REV_DSIO, REV_DENV };
static constexpr const char *const denver_regname[4] =
{ "SDRC_ROM", "SDRC_IO", "RAM_PAGE", "VER/FIFO_RESET" };
struct sdrc_state struct sdrc_state
{ {
uint16_t reg[4]; uint16_t reg[4];

6
src/mame/drivers/atlantis.cpp
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@ -21,6 +21,7 @@
* Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668) * Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668)
* TL16c552 dual UART * TL16c552 dual UART
* ADSP-2181 based DCS2 audio (unclear which variant) * ADSP-2181 based DCS2 audio (unclear which variant)
* Micron MT48LC1M16A1 1Mx16 SDRAM, 2X (4MB) for audio
* ICS AV9110 Serially Programmable Frequency Generator. Programmed through ADSP FL0,FL1,FL2 pins. * ICS AV9110 Serially Programmable Frequency Generator. Programmed through ADSP FL0,FL1,FL2 pins.
* Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated * Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated
* Maxim MAX192 8 channel 10 bit serial ADC * Maxim MAX192 8 channel 10 bit serial ADC
@ -814,7 +815,7 @@ static MACHINE_CONFIG_START( mwskins )
MCFG_M48T37_RESET_HANDLER(WRITELINE(atlantis_state, watchdog_reset)) MCFG_M48T37_RESET_HANDLER(WRITELINE(atlantis_state, watchdog_reset))
MCFG_M48T37_IRQ_HANDLER(WRITELINE(atlantis_state, watchdog_irq)) MCFG_M48T37_IRQ_HANDLER(WRITELINE(atlantis_state, watchdog_irq))
MCFG_IDE_PCI_ADD(PCI_ID_IDE, 0x10950646, 0x05, 0x0) MCFG_IDE_PCI_ADD(PCI_ID_IDE, 0x10950646, 0x07, 0x0)
MCFG_IDE_PCI_IRQ_HANDLER(DEVWRITELINE(":", atlantis_state, ide_irq)) MCFG_IDE_PCI_IRQ_HANDLER(DEVWRITELINE(":", atlantis_state, ide_irq))
// The pci-ide by default expects the system controller to be pci:00.0 so need to fix here // The pci-ide by default expects the system controller to be pci:00.0 so need to fix here
MCFG_DEVICE_MODIFY(PCI_ID_IDE":ide") MCFG_DEVICE_MODIFY(PCI_ID_IDE":ide")
@ -833,9 +834,8 @@ static MACHINE_CONFIG_START( mwskins )
MCFG_SCREEN_UPDATE_DEVICE("zeus2", zeus2_device, screen_update) MCFG_SCREEN_UPDATE_DEVICE("zeus2", zeus2_device, screen_update)
/* sound hardware */ /* sound hardware */
//MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DSIO, 0)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(8) MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x200d) MCFG_DCS2_AUDIO_POLLING_OFFSET(0x200d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)

19
src/mame/drivers/vegas.cpp
View File

@ -1334,12 +1334,11 @@ static INPUT_PORTS_START( warfa )
PORT_DIPNAME( 0x0002, 0x0002, "Quantum 3dfx card rev" ) PORT_DIPNAME( 0x0002, 0x0002, "Quantum 3dfx card rev" )
PORT_DIPSETTING( 0x0002, "4" ) PORT_DIPSETTING( 0x0002, "4" )
PORT_DIPSETTING( 0x0000, "?" ) PORT_DIPSETTING( 0x0000, "?" )
PORT_DIPNAME( 0x0040, 0x0040, "Boot ROM Test" ) PORT_DIPNAME( 0x00c0, 0x00c0, "Test Mode" )
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00c0, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0040, "Disk-based Test" )
PORT_DIPNAME( 0x0080, 0x0080, "Boot ROM Test v1.3" ) PORT_DIPSETTING( 0x0080, "EPROM-based Test" )
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, "Interactive Diagnostics" )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0xc000, 0x4000, "Resolution" ) PORT_DIPNAME( 0xc000, 0x4000, "Resolution" )
PORT_DIPSETTING( 0xc000, "Standard Res 512x256" ) PORT_DIPSETTING( 0xc000, "Standard Res 512x256" )
PORT_DIPSETTING( 0x4000, "Medium Res 512x384" ) PORT_DIPSETTING( 0x4000, "Medium Res 512x384" )
@ -1605,7 +1604,7 @@ static INPUT_PORTS_START( cartfury )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("View 1") PORT_PLAYER(1) /* view 1 */ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("View 1") PORT_PLAYER(1) /* view 1 */
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("View 2") PORT_PLAYER(1) /* view 2 */ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("View 2") PORT_PLAYER(1) /* view 2 */
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("View 3") PORT_PLAYER(1) /* view 3 */ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("View 3") PORT_PLAYER(1) /* view 3 */
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Music") PORT_PLAYER(1) /* music */ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Boost") PORT_PLAYER(1) /* boost */
PORT_BIT( 0x0f00, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, vegas_state, gearshift_r, "GEAR" ) PORT_BIT( 0x0f00, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, vegas_state, gearshift_r, "GEAR" )
PORT_START("GEAR") PORT_START("GEAR")
@ -1928,7 +1927,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049 , denver ) static MACHINE_CONFIG_DERIVED( sf2049 , denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(16) MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x200d) MCFG_DCS2_AUDIO_POLLING_OFFSET(0x200d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
@ -1942,7 +1941,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049se, denver ) static MACHINE_CONFIG_DERIVED( sf2049se, denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(16) MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK) MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK)
@ -1955,7 +1954,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049te, denver ) static MACHINE_CONFIG_DERIVED( sf2049te, denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(16) MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK) MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK)