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Fixed split timer mode

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* Credit: Jim Stolis
* No interrupts for timer 0 modes 0,1,2 while timer 1 in mode 3
This commit is contained in:
Couriersud 2008-10-24 17:45:42 +00:00
parent 1b7cfe0da2
commit a4059f19ad
1 changed files with 10 additions and 7 deletions
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17
src/emu/cpu/i8051/i8051.c
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@ -844,6 +844,7 @@ INLINE void update_timer_t0(int cycles)
INLINE void update_timer_t1(int cycles)
{
int mode = (GET_M1_1<<1) | GET_M1_0;
int mode_0 = (GET_M0_1<<1) | GET_M0_0;
UINT32 count = 0;
if (GET_TR1)
@ -867,8 +868,6 @@ INLINE void update_timer_t1(int cycles)
count = ((TH1<<5) | ( TL1 & 0x1f ) );
count += delta;
overflow = count & 0xffffe000; /* Check for overflow */
if ( overflow )
SET_TF1(1);
TH1 = (count>>5) & 0xff;
TL1 = count & 0x1f ;
break;
@ -876,10 +875,6 @@ INLINE void update_timer_t1(int cycles)
count = ((TH1<<8) | TL1);
count += delta;
overflow = count & 0xffff0000; /* Check for overflow */
if ( overflow )
{
SET_TF1(1);
}
TH1 = (count>>8) & 0xff;
TL1 = count & 0xff;
break;
@ -888,7 +883,6 @@ INLINE void update_timer_t1(int cycles)
overflow = count & 0xffffff00; /* Check for overflow */
if ( overflow )
{
SET_TF1(1);
count += TH1; /* Reload timer */
}
/* Update new values of the counter */
@ -899,7 +893,16 @@ INLINE void update_timer_t1(int cycles)
break;
}
if (overflow)
{
/* Timer 1 may still be used in modes 0, 1, and 2, while timer 0
* is in mode 3. With one important exception: No interrupts
* will be generated by timer 1 while timer 0 is using the TF1
* overflow flag
*/
if (mode_0 != 3)
SET_TF1(1);
transmit_receive(1);
}
}
}