srcclean in preparation for branching release
This commit is contained in:
Vas Crabb
parent
2441cc0f8d
commit
a425bd5d90
@ -157,11 +157,11 @@ u8 swim1_device::ism_read(offs_t offset)
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{
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ism_sync();
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// static const char *const names[] = {
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// "data", "mark", "crc", "param", "phases", "setup", "status", "handshake"
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// };
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// static const char *const names[] = {
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// "data", "mark", "crc", "param", "phases", "setup", "status", "handshake"
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// };
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// logerror("read ism %s\n", names[offset & 7]);
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// logerror("read ism %s\n", names[offset & 7]);
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switch(offset & 7) {
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case 0x0: { // data
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u16 r = ism_fifo_pop();
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@ -1979,7 +1979,7 @@ std::vector<uint32_t> a2_nib_format::generate_levels_from_nibbles(const std::vec
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const auto trailing_padding_size = count_trailing_padding(nibbles);
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const auto trailing_FF_count =
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count_leading_FFs(nibbles.rbegin() + trailing_padding_size,
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nibbles.rend());
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nibbles.rend());
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const auto wrapped_FF_count = leading_FF_count + trailing_FF_count;
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const bool wrapped_FF_are_syncs = wrapped_FF_count >= min_sync_bytes;
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@ -2042,11 +2042,11 @@ bool a2_nib_format::load(io_generic *io, uint32_t form_factor, const std::vector
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std::vector<uint8_t> nibbles(nibbles_per_track);
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for (unsigned track = 0; track < nr_tracks; ++track) {
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io_generic_read(io, &nibbles[0],
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track * nibbles_per_track, nibbles_per_track);
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track * nibbles_per_track, nibbles_per_track);
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auto levels = generate_levels_from_nibbles(nibbles);
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generate_track_from_levels(track, 0,
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levels,
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0, image);
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levels,
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0, image);
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}
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image->set_form_variant(floppy_image::FF_525, floppy_image::SSSD);
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@ -1010,39 +1010,39 @@ void firebeat_spu_state::rf5c400_map(address_map& map)
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IRQ2: Executes one command stored in a different buffer from IRQ1.
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The buffer can contain up to 8 commands.
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The command index counter increments after each IRQ2 call.
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If there is no command in the slot at the current counter then it just increments without executing a command.
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The command index counter increments after each IRQ2 call.
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If there is no command in the slot at the current counter then it just increments without executing a command.
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Timing matters. In particular if the speed of the IRQ 2 calls is too fast then the volume and frequency animations will be wrong.
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The most common issue with bad timing is keysounds will be cut off.
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pop'n music Animelo 2 also has an issue when playing CHA-LA HEAD CHA-LA where one of the beginning keysounds will stay on a
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very high pitched frequency. The lower(?) the IRQ 2 frequency, the longer the keysound stays played it seems.
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Timing matters. In particular if the speed of the IRQ 2 calls is too fast then the volume and frequency animations will be wrong.
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The most common issue with bad timing is keysounds will be cut off.
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pop'n music Animelo 2 also has an issue when playing CHA-LA HEAD CHA-LA where one of the beginning keysounds will stay on a
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very high pitched frequency. The lower(?) the IRQ 2 frequency, the longer the keysound stays played it seems.
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For beatmania III:
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cmd[0] = nop
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cmd[1] = 0x91bc -> Send stop command for all rf5c400 channels that are done playing
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cmd[2] = 0x310a -> Error checking? Sending some kind of state to main CPU???
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cmd[3] = 0x29c6 -> Increment a timer for each running DMA(ATA command?)
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Each timer must count up to 0x02e8 (744) before it will move on to the next DMA, which I believe is the time out counter.
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For beatmania III:
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cmd[0] = nop
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cmd[1] = 0x91bc -> Send stop command for all rf5c400 channels that are done playing
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cmd[2] = 0x310a -> Error checking? Sending some kind of state to main CPU???
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cmd[3] = 0x29c6 -> Increment a timer for each running DMA(ATA command?)
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Each timer must count up to 0x02e8 (744) before it will move on to the next DMA, which I believe is the time out counter.
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In another part of the program (0x363c for a21jca03.bin) is the following code for determining when to start and stop the DMA:
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In another part of the program (0x363c for a21jca03.bin) is the following code for determining when to start and stop the DMA:
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start_dma();
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while (get_dma_timer() < dma_max_timer) {
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if (irq6_called_flag) {
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break;
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}
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}
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end_dma();
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start_dma();
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while (get_dma_timer() < dma_max_timer) {
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if (irq6_called_flag) {
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break;
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}
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}
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end_dma();
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irq6_called_flag is set only when IRQ6 is called.
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get_dma_timer is the timer that is incremented by 0x29c6.
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cmd[4] = 0x94de -> Animates rf5c400 channel volumes
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cmd[5] = 0x7b2c -> Send some kind of buffer status flags to spu_status_led_w. Related to IRQ4 since commands come from PPC to set buffer data
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cmd[6] = 0x977e -> Animates rf5c400 channel frequencies
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cmd[7] = 0x9204 -> Sends current state of rf5c400 channels as well as a list (bitmask integer) of usable channels up to main CPU memory.
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Also sends a flag to to spu_status_led_w that shows if there are available SE slots.
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If there are no available SE slots then it will set bit 3 to .
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irq6_called_flag is set only when IRQ6 is called.
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get_dma_timer is the timer that is incremented by 0x29c6.
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cmd[4] = 0x94de -> Animates rf5c400 channel volumes
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cmd[5] = 0x7b2c -> Send some kind of buffer status flags to spu_status_led_w. Related to IRQ4 since commands come from PPC to set buffer data
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cmd[6] = 0x977e -> Animates rf5c400 channel frequencies
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cmd[7] = 0x9204 -> Sends current state of rf5c400 channels as well as a list (bitmask integer) of usable channels up to main CPU memory.
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Also sends a flag to to spu_status_led_w that shows if there are available SE slots.
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If there are no available SE slots then it will set bit 3 to .
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IRQ4: Dual-port RAM mailbox (when PPC writes to 0x3FE)
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Handles commands from PPC (bytes 0x00 and 0x01)
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@ -4,12 +4,12 @@
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Insight Enterprises Z80 Single Board Computer
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Possibly a prototype or part of a larger system. A video with more
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info is available at https://www.youtube.com/watch?v=_z1kBb-Zwpg.
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Possibly a prototype or part of a larger system. A video with more
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info is available at https://www.youtube.com/watch?v=_z1kBb-Zwpg.
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TODO:
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- Verify device hookup
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- Figure out what's at 0x20, 0x21, 0x3c, 0x3d
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- Figure out what's at 0x20, 0x21, 0x3c, 0x3d
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- Hook up FDC
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- Hook up CRT8002 (video attributes)
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- Much more
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@ -81,15 +81,15 @@ void iez80_state::mem_map(address_map &map)
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void iez80_state::io_map(address_map &map)
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{
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map.global_mask(0xff);
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// map(0x20, 0x20).lr8([this]() { return machine().rand(); }, "unk20");
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// map(0x21, 0x21).lr8([this]() { return machine().rand(); }, "unk21");
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// map(0x20, 0x20).lr8([this]() { return machine().rand(); }, "unk20");
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// map(0x21, 0x21).lr8([this]() { return machine().rand(); }, "unk21");
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map(0x24, 0x27).rw("pio", FUNC(z80pio_device::read), FUNC(z80pio_device::write));
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map(0x28, 0x2b).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
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map(0x2c, 0x2f).rw("dart1", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
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map(0x32, 0x32).rw("dma", FUNC(z80dma_device::read), FUNC(z80dma_device::write));
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map(0x38, 0x3b).rw("dart2", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
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// map(0x3c, 0x3c).lr8([this]() { return machine().rand(); }, "unk3c");
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// map(0x3d, 0x3d).lr8([this]() { return machine().rand(); }, "unk3d");
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// map(0x3c, 0x3c).lr8([this]() { return machine().rand(); }, "unk3c");
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// map(0x3d, 0x3d).lr8([this]() { return machine().rand(); }, "unk3d");
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map(0x40, 0x4f).rw("crtc", FUNC(crt5037_device::read), FUNC(crt5037_device::write));
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}
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@ -1045,9 +1045,9 @@ void shoottv_state::shoottv_map(address_map &map)
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void itech32_state::pubball_map(address_map &map)
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{
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itech020_map(map);
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map(0x300000, 0x300003).w(FUNC(itech32_state::color_w<0>)).umask32(0x00ff00ff);
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map(0x380000, 0x380003).w(FUNC(itech32_state::color_w<1>)).umask32(0x00ff00ff);
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itech020_map(map);
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map(0x300000, 0x300003).w(FUNC(itech32_state::color_w<0>)).umask32(0x00ff00ff);
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map(0x380000, 0x380003).w(FUNC(itech32_state::color_w<1>)).umask32(0x00ff00ff);
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}
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@ -4645,13 +4645,13 @@ ROM_START( gtclasscs ) /* Version 1.00S for the 3 tier type PCB with short ROM
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ROM_END
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/***************************************************************************
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The ROM images for both sets below were found by analyzing the contents
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of archived source-code CDs acquired at auction. This is why the ROM
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definitions in question are not sized to a power of two, as most ROM
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dumps typically are.
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However, the provided dump of Power Up Baseball has been proven to
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work as-is on a properly-configured itech32 board, and passes all
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relevant ROM tests, and so can be considered authoritative.
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The ROM images for both sets below were found by analyzing the contents
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of archived source-code CDs acquired at auction. This is why the ROM
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definitions in question are not sized to a power of two, as most ROM
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dumps typically are.
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However, the provided dump of Power Up Baseball has been proven to
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work as-is on a properly-configured itech32 board, and passes all
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relevant ROM tests, and so can be considered authoritative.
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****************************************************************************/
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ROM_START( shoottv )
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@ -2,28 +2,28 @@
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// copyright-holders:Angelo Salese
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/******************************************************************************
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Jungle (c) 2001 Yonshi
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Jungle (c) 2001 Yonshi
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TODO:
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- with a clean NVRAM MAME needs to be soft reset after init or the game
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will trip a '1111 exception' (caused by invalid opcode executed at
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0x102, incomplete decryption most likely);
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- Likewise anything in the 0x100-0x1f7 range doesn't seem valid at all;
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- game sometimes expects 1+ coins even if player has available points
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(and freezing with "COIN" text blinking), very unlikely to be intended
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behaviour?
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- system setting screen shows the following settings that don't seem to be
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affected by dips:
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* Min. Bet (always 1),
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* Credit X Ticket Mode (always Cencel (sic)),
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* Max. 10 Mode (always Max. 10);
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- sound doesn't seem to work 100% correctly (i.e. coin sound only seems
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to work from 3rd coin on, lots of invalid sample msgs in error.log).
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fwiw there's no extra OKI bank in the ROM, must be either invalid
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decryption or fancy OKI status readback instead.
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TODO:
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- with a clean NVRAM MAME needs to be soft reset after init or the game
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will trip a '1111 exception' (caused by invalid opcode executed at
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0x102, incomplete decryption most likely);
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- Likewise anything in the 0x100-0x1f7 range doesn't seem valid at all;
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- game sometimes expects 1+ coins even if player has available points
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(and freezing with "COIN" text blinking), very unlikely to be intended
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behaviour?
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- system setting screen shows the following settings that don't seem to be
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affected by dips:
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* Min. Bet (always 1),
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* Credit X Ticket Mode (always Cencel (sic)),
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* Max. 10 Mode (always Max. 10);
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- sound doesn't seem to work 100% correctly (i.e. coin sound only seems
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to work from 3rd coin on, lots of invalid sample msgs in error.log).
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fwiw there's no extra OKI bank in the ROM, must be either invalid
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decryption or fancy OKI status readback instead.
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Latter may be confirmed by video display stalling at the end of a
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normal round, OSD coin counter gets updated after the BGM completes
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playback.
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normal round, OSD coin counter gets updated after the BGM completes
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playback.
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- outputs (lamps & ticket dispenser at very least);
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===============================================================================
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@ -775,7 +775,7 @@ ROM_START( loopingv )
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ROM_LOAD( "i-o.11a", 0x2800, 0x1000, CRC(61c74c79) SHA1(9f34d18a919446dd76857b851cea23fc1526f3c2) ) // speech
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ROM_REGION( 0x0400, "mcu", 0 ) // COP420 microcontroller code
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_REGION( 0x1000, "gfx1", 0 )
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ROM_LOAD( "log2.8a", 0x0000, 0x800, CRC(ef3284ac) SHA1(8719c9df8c972a56c306b3c707aaa53092ffa2d6) )
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@ -799,7 +799,7 @@ ROM_START( loopingva )
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ROM_LOAD( "i-o.11a", 0x2800, 0x1000, CRC(61c74c79) SHA1(9f34d18a919446dd76857b851cea23fc1526f3c2) )
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ROM_REGION( 0x0400, "mcu", 0 ) // COP420 microcontroller code
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_REGION( 0x1000, "gfx1", 0 )
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ROM_LOAD( "log2.8a", 0x0000, 0x800, CRC(ef3284ac) SHA1(8719c9df8c972a56c306b3c707aaa53092ffa2d6) )
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@ -825,7 +825,7 @@ ROM_START( looping )
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ROM_LOAD( "loopa11.bin", 0x2800, 0x1000, CRC(61c74c79) SHA1(9f34d18a919446dd76857b851cea23fc1526f3c2) ) // speech
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ROM_REGION( 0x0400, "mcu", 0 ) // COP420 microcontroller code
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) ) // taken from the other sets
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) ) // taken from the other sets
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ROM_REGION( 0x1000, "gfx1", 0 )
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ROM_LOAD( "loopaa8.bin", 0x0000, 0x800, CRC(ef3284ac) SHA1(8719c9df8c972a56c306b3c707aaa53092ffa2d6) )
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@ -848,7 +848,7 @@ ROM_START( skybump )
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ROM_LOAD( "snd.11a", 0x2800, 0x1000, CRC(61c74c79) SHA1(9f34d18a919446dd76857b851cea23fc1526f3c2) )
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ROM_REGION( 0x0400, "mcu", 0 ) // COP420 microcontroller code
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_LOAD( "cop.bin", 0x0000, 0x0400, CRC(d47fecec) SHA1(7eeedcb40f4cd50e1e259c6b01744a3fc97b60aa) )
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ROM_REGION( 0x1000, "gfx1", 0 )
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ROM_LOAD( "vid.8a", 0x0000, 0x800, CRC(459ccc55) SHA1(747f6789605b48be9e22f779f9e3f6c98ad4e594) )
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@ -5,37 +5,37 @@
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LSI M-THREE
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Models:
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- M-THREE/100 (SA400, 5.25" single sided)
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- M-THREE/110 (SA410, 5.25" single sided)
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- M-THREE/150 (SA450, 5.25" double sided)
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- M-THREE/160 (SA460, 5.25" double sided)
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- M-THREE/200 (SA800, 8" single sided)
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- M-THREE/250 (SA850, 8" double sided) [emulated by default]
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- M-THREE/320 (SA800, 8" single sided, Winchester 5 MB)
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- M-THREE/325 (SA850, 8" double sided, Winchester 5 MB)
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- M-THREE/340 (SA800, 8" single sided, Winchester 10 MB)
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- M-THREE/345 (SA850, 8" double sided, Winchester 10 MB)
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- M-THREE/100 (SA400, 5.25" single sided)
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- M-THREE/110 (SA410, 5.25" single sided)
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- M-THREE/150 (SA450, 5.25" double sided)
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- M-THREE/160 (SA460, 5.25" double sided)
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- M-THREE/200 (SA800, 8" single sided)
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- M-THREE/250 (SA850, 8" double sided) [emulated by default]
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- M-THREE/320 (SA800, 8" single sided, Winchester 5 MB)
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- M-THREE/325 (SA850, 8" double sided, Winchester 5 MB)
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- M-THREE/340 (SA800, 8" single sided, Winchester 10 MB)
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- M-THREE/345 (SA850, 8" double sided, Winchester 10 MB)
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Hardware:
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- Z80
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- 64 KB RAM
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- Z80 CTC
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- 2x D8255AC PPI
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- D8251A
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- MC6845P CRTC
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- FD1793 FDC
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- 64 KB RAM
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- Z80 CTC
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- 2x D8255AC PPI
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- D8251A
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- MC6845P CRTC
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- FD1793 FDC
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TODO:
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- Initial PC is currently hacked to f000
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- Verify/fix floppy hookup (CPU needs to be overclocked?)
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- Printer interface
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- Buzzer
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- Map the rest of the keys, verify existing keys
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- Verify/fix floppy hookup (CPU needs to be overclocked?)
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- Printer interface
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- Buzzer
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- Map the rest of the keys, verify existing keys
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Notes:
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- No offical software available, but a custom version of CP/M
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- Y to boot from floppy, ESC to enter monitor, any other key to
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boot from IDE
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- Y to boot from floppy, ESC to enter monitor, any other key to
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boot from IDE
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***************************************************************************/
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@ -11,7 +11,7 @@
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There are 4 sound options,
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1: AY3-8930 on the mainboard.
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2: "Digital Sound Board" sound ROM + NEC D7759 on the romcard.
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3: "FM & Digital Sound Board" sound ROM + NEC D7759 & YM2413 (3.579Mhz) on the romcard.
|
||||
3: "FM & Digital Sound Board" sound ROM + NEC D7759 & YM2413 (3.579Mhz) on the romcard.
|
||||
4: "E.S.P. Board" sound ROMS + OKI M6376, + NEC C1892
|
||||
** later ESP boards also have a sub-board marked "RAM Protection Board"
|
||||
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
TODO: Implement flashing (our only datasheet has that section
|
||||
completely illegible)
|
||||
|
||||
This is a simulation of code running on an NEC D78042GF-090
|
||||
This is a simulation of code running on an NEC D78042GF-090
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
@ -1155,10 +1155,10 @@ WRITE_LINE_MEMBER(macadb_device::adb_linechange_w)
|
||||
if (m_adb_datasize > 0)
|
||||
{
|
||||
LOGMASKED(LOG_LINESTATE, "Device has %d bytes of data:\n", m_adb_datasize);
|
||||
for (int i = 0; i < m_adb_datasize; i++)
|
||||
{
|
||||
LOGMASKED(LOG_LINESTATE, " %02x\n", m_adb_buffer[i]);
|
||||
}
|
||||
for (int i = 0; i < m_adb_datasize; i++)
|
||||
{
|
||||
LOGMASKED(LOG_LINESTATE, " %02x\n", m_adb_buffer[i]);
|
||||
}
|
||||
m_adb_linestate = LST_TSTOPSTART; // T1t
|
||||
m_adb_timer->adjust(attotime::from_ticks(324/4, adb_timebase));
|
||||
m_adb_stream_ptr = 0;
|
||||
|
||||
@ -214,7 +214,7 @@ WRITE_LINE_MEMBER(mspactwin_state::flipscreen_w)
|
||||
{
|
||||
m_flipscreen = state;
|
||||
m_bg_tilemap->set_flip(m_flipscreen * ( TILEMAP_FLIPX + TILEMAP_FLIPY ) );
|
||||
// logerror("Flip: %02x\n", state);
|
||||
// logerror("Flip: %02x\n", state);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -341,7 +341,7 @@ static const std::map<std::string, const gdb_register_map &> gdb_register_maps =
|
||||
{ "r4600", gdb_register_map_r4600 },
|
||||
{ "ppc601", gdb_register_map_ppc601 },
|
||||
{ "m68020pmmu", gdb_register_map_m68020pmmu },
|
||||
{ "m68000", gdb_register_map_m68000 },
|
||||
{ "m68000", gdb_register_map_m68000 },
|
||||
{ "z80", gdb_register_map_z80 },
|
||||
{ "m6502", gdb_register_map_m6502 },
|
||||
{ "n2a03", gdb_register_map_m6502 },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user