From a49a951ae9024bb1b1f0e187d1389b4560e83096 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Mon, 20 Aug 2012 11:18:56 +0000 Subject: [PATCH] -i386: xlat implementation fix [Alegend45] --- src/emu/cpu/i386/i386op16.c | 18 ++++++++++++++++-- src/emu/cpu/i386/i386op32.c | 18 ++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c index 2e293363d91..35236a5bd0b 100644 --- a/src/emu/cpu/i386/i386op16.c +++ b/src/emu/cpu/i386/i386op16.c @@ -3674,9 +3674,23 @@ static void I386OP(xlat16)(i386_state *cpustate) // Opcode 0xd7 { UINT32 ea; if( cpustate->segment_prefix ) { - ea = i386_translate(cpustate, cpustate->segment_override, REG16(BX) + REG8(AL), 0 ); + if(cpustate->address_size) + { + ea = i386_translate(cpustate, cpustate->segment_override, REG32(BX) + REG8(AL), 0 ); + } + else + { + ea = i386_translate(cpustate, cpustate->segment_override, REG16(EBX) + REG8(AL), 0 ); + } } else { - ea = i386_translate(cpustate, DS, REG16(BX) + REG8(AL), 0 ); + if(cpustate->address_size) + { + ea = i386_translate(cpustate, DS, REG32(BX) + REG8(AL), 0 ); + } + else + { + ea = i386_translate(cpustate, DS, REG16(EBX) + REG8(AL), 0 ); + } } REG8(AL) = READ8(cpustate,ea); CYCLES(cpustate,CYCLES_XLAT); diff --git a/src/emu/cpu/i386/i386op32.c b/src/emu/cpu/i386/i386op32.c index 07999e8a428..393d58b6455 100644 --- a/src/emu/cpu/i386/i386op32.c +++ b/src/emu/cpu/i386/i386op32.c @@ -3472,9 +3472,23 @@ static void I386OP(xlat32)(i386_state *cpustate) // Opcode 0xd7 { UINT32 ea; if( cpustate->segment_prefix ) { - ea = i386_translate(cpustate, cpustate->segment_override, REG32(EBX) + REG8(AL), 0 ); + if(cpustate->address_size) + { + ea = i386_translate(cpustate, cpustate->segment_override, REG16(BX) + REG8(AL), 0 ); + } + else + { + ea = i386_translate(cpustate, cpustate->segment_override, REG32(EBX) + REG8(AL), 0 ); + } } else { - ea = i386_translate(cpustate, DS, REG32(EBX) + REG8(AL), 0 ); + if(cpustate->address_size) + { + ea = i386_translate(cpustate, DS, REG16(BX) + REG8(AL), 0 ); + } + else + { + ea = i386_translate(cpustate, DS, REG32(EBX) + REG8(AL), 0 ); + } } REG8(AL) = READ8(cpustate,ea); CYCLES(cpustate,CYCLES_XLAT);