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https://github.com/holub/mame
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Added new driver for NSM TMS9995 based hardware. [Roberto Fresca]
New games marked as GAME_NOT_WORKING ------------------------------------ NSM Poker (TMS9995) [Roberto Fresca, Team Europe]
This commit is contained in:
Roberto Fresca
parent
ea3e48934c
commit
a4ad950160
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -2013,6 +2013,7 @@ src/mame/drivers/nmg5.c svneol=native#text/plain
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src/mame/drivers/nmk16.c svneol=native#text/plain
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src/mame/drivers/norautp.c svneol=native#text/plain
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src/mame/drivers/nova2001.c svneol=native#text/plain
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src/mame/drivers/nsmpoker.c svneol=native#text/plain
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src/mame/drivers/nss.c svneol=native#text/plain
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src/mame/drivers/nwk-tr.c svneol=native#text/plain
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src/mame/drivers/nycaptor.c svneol=native#text/plain
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432
src/mame/drivers/nsmpoker.c
Normal file
432
src/mame/drivers/nsmpoker.c
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@ -0,0 +1,432 @@
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/******************************************************************************
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NSM TMS9995 BASED HARDWARE
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--------------------------
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Driver by Roberto Fresca.
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Games running on this hardware:
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* NSM Poker, 198?, NSM.
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*******************************************************************************
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Hardware Notes:
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---------------
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CPU: 1x TMS9995.
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Sound: 1x AY8912.
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ROMs: 5x Eproms.
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RAMs: 5x 2116 (2kx8) SRAM.
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one 1400bit(?!) "write rom".
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Clock: 1x 22.1184 MHz. Xtal.
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No bprom, no gals, no pals....
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*******************************************************************************
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*** Game Notes ***
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*******************************************************************************
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DRIVER UPDATES:
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[2010-10-07]
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- Initial release.
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- Added technical notes.
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TODO:
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*******************************************************************************/
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#define MASTER_CLOCK XTAL_22_1184MHz
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#include "emu.h"
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#include "cpu/tms9900/tms9900.h"
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#include "sound/ay8910.h"
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/*************************
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* Video Hardware *
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*************************/
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static UINT8 *videoram;
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static UINT8 *colorram;
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static tilemap_t *bg_tilemap;
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static WRITE8_HANDLER( nsmpoker_videoram_w )
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{
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videoram[offset] = data;
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tilemap_mark_tile_dirty(bg_tilemap, offset);
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}
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static WRITE8_HANDLER( nsmpoker_colorram_w )
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{
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colorram[offset] = data;
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tilemap_mark_tile_dirty(bg_tilemap, offset);
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}
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static TILE_GET_INFO( get_bg_tile_info )
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{
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/* - bits -
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7654 3210
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---- ---- bank select.
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---- ---- color code.
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---- ---- seems unused.
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*/
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// int attr = colorram[tile_index];
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int code = videoram[tile_index];
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// int bank = (attr & 0x08) >> 3;
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// int color = (attr & 0x03);
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SET_TILE_INFO( 0 /* bank */, code, 0 /* color */, 0);
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}
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static VIDEO_START( nsmpoker )
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{
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bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
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}
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static VIDEO_UPDATE( nsmpoker )
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{
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tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
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return 0;
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}
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static PALETTE_INIT( nsmpoker )
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{
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}
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/**************************
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* Read / Write Handlers *
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**************************/
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static INTERRUPT_GEN( nsmpoker_interrupt )
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{
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cpu_set_input_line_and_vector(device, 0, ASSERT_LINE, 3);//2=nmi 3,4,5,6
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}
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//static WRITE8_HANDLER( debug_w )
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//{
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// popmessage("written : %02X", data);
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//}
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static READ8_HANDLER( debug_r )
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{
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return mame_rand(space->machine) & 0xff;
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}
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/*************************
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* Memory Map Information *
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*************************/
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static ADDRESS_MAP_START( nsmpoker_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_ROM
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AM_RANGE(0x9000, 0xafff) AM_RAM // OK... cleared at beginning.
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AM_RANGE(0xb000, 0xcfff) AM_ROM // WRONG... just to map the last rom somewhere.
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AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(nsmpoker_videoram_w) AM_BASE(&videoram) // WRONG... just a placeholder.
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AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(nsmpoker_colorram_w) AM_BASE(&colorram) // WRONG... just a placeholder.
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( nsmpoker_portmap, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0xf0, 0xf0) AM_READ(debug_r) // kind of trap at begining
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ADDRESS_MAP_END
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/* I/O byte R/W
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-----------------
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unknown writes:
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*/
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/*************************
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* Input Ports *
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*************************/
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static INPUT_PORTS_START( nsmpoker )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8")
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8")
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("IN2-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("IN2-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("IN2-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("IN2-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("IN2-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8")
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PORT_START("IN3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8")
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PORT_START("IN4")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8")
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PORT_START("DSW1")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW2")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW3")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW4")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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/*************************
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* Graphics Layouts *
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*************************/
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/* Only to see possible tiles... */
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static const gfx_layout charlayout =
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{
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8, 8,
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RGN_FRAC(1,4),
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4,
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{ 0, RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) }, /* bitplanes are separated */
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{ 0, 1, 2, 3, 4, 5, 6, 7 },
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{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
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8*8 /* every char takes 8 consecutive bytes */
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};
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static const gfx_layout tilelayout =
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{
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8, 8,
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RGN_FRAC(4,4),
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1,
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{ 0 },
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{ 0, 1, 2, 3, 4, 5, 6, 7 },
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{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
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8*8 /* every char takes 8 consecutive bytes */
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||||
};
|
||||
|
||||
|
||||
/******************************
|
||||
* Graphics Decode Information *
|
||||
******************************/
|
||||
|
||||
static GFXDECODE_START( nsmpoker )
|
||||
GFXDECODE_ENTRY( "maincpu", 0, charlayout, 0, 16 )
|
||||
GFXDECODE_ENTRY( "maincpu", 0, tilelayout, 0, 16 )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
/*************************
|
||||
* Machine Drivers *
|
||||
*************************/
|
||||
|
||||
static MACHINE_CONFIG_START( nsmpoker, driver_device )
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("maincpu", TMS9995, MASTER_CLOCK/2) /* guess */
|
||||
MDRV_CPU_PROGRAM_MAP(nsmpoker_map)
|
||||
MDRV_CPU_IO_MAP(nsmpoker_portmap)
|
||||
MDRV_CPU_VBLANK_INT("screen", nsmpoker_interrupt)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60)
|
||||
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
||||
MDRV_SCREEN_SIZE(32*8, 32*8)
|
||||
MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1)
|
||||
|
||||
MDRV_GFXDECODE(nsmpoker)
|
||||
|
||||
MDRV_PALETTE_INIT(nsmpoker)
|
||||
MDRV_PALETTE_LENGTH(8)
|
||||
|
||||
MDRV_VIDEO_START(nsmpoker)
|
||||
MDRV_VIDEO_UPDATE(nsmpoker)
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
/*************************
|
||||
* Rom Load *
|
||||
*************************/
|
||||
|
||||
ROM_START( nsmpoker )
|
||||
// ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
// ROM_LOAD( "113_277.6e", 0x0000, 0x2000, CRC(247ad554) SHA1(5cfdfb95920d7e89e3e485a06d0099191e8d41a0) )
|
||||
|
||||
// ROM_REGION( 0x8000, "gfx1", 0 )
|
||||
// ROM_LOAD( "113_278.6g", 0x0000, 0x2000, CRC(08eb7305) SHA1(4e555aa481c6b4476b71909ddabf405dd6f767ed) )
|
||||
// ROM_LOAD( "113_279.5g", 0x2000, 0x2000, CRC(ac6ab327) SHA1(1012dc581b2be7df5e079ace44a721d17d21366a) )
|
||||
// ROM_LOAD( "113_280.3g", 0x4000, 0x2000, CRC(9b9be79d) SHA1(8301e74c4869d04eba680d156de9edaadd7ff83b) )
|
||||
// ROM_LOAD( "113_281.2g", 0x6000, 0x2000, CRC(4b9b448a) SHA1(3ca1f5714cf5535d2ea1e7e03bca456c89af222c) )
|
||||
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD( "113_277.6e", 0x0000, 0x2000, CRC(247ad554) SHA1(5cfdfb95920d7e89e3e485a06d0099191e8d41a0) )
|
||||
ROM_LOAD( "113_278.6g", 0x2000, 0x2000, CRC(08eb7305) SHA1(4e555aa481c6b4476b71909ddabf405dd6f767ed) )
|
||||
ROM_LOAD( "113_279.5g", 0x4000, 0x2000, CRC(ac6ab327) SHA1(1012dc581b2be7df5e079ace44a721d17d21366a) )
|
||||
ROM_LOAD( "113_280.3g", 0x6000, 0x2000, CRC(9b9be79d) SHA1(8301e74c4869d04eba680d156de9edaadd7ff83b) )
|
||||
ROM_LOAD( "113_281.2g", 0xb000, 0x2000, CRC(4b9b448a) SHA1(3ca1f5714cf5535d2ea1e7e03bca456c89af222c) )
|
||||
ROM_END
|
||||
|
||||
|
||||
/*************************
|
||||
* Game Drivers *
|
||||
*************************/
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS */
|
||||
GAME( 198?, nsmpoker, 0, nsmpoker, nsmpoker, 0, ROT0, "NSM", "NSM Poker (TMS9995)", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
@ -1594,6 +1594,7 @@ $(MAMEOBJ)/misc.a: \
|
||||
$(DRIVERS)/neptunp2.o \
|
||||
$(DRIVERS)/news.o $(VIDEO)/news.o \
|
||||
$(DRIVERS)/norautp.o $(AUDIO)/norautp.o \
|
||||
$(DRIVERS)/nsmpoker.o \
|
||||
$(DRIVERS)/oneshot.o $(VIDEO)/oneshot.o \
|
||||
$(DRIVERS)/onetwo.o \
|
||||
$(DRIVERS)/othello.o \
|
||||
|
||||
@ -10462,4 +10462,7 @@ Other Sun games
|
||||
DRIVER( swisspkr ) /* (c) Golden Games 1990 */
|
||||
DRIVER( moviecrd ) /* (c) Golden Games 1998 */
|
||||
|
||||
/* NSM */
|
||||
DRIVER( nsmpoker )
|
||||
|
||||
#endif /* DRIVER_RECURSIVE */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user