-cpu/cp1610, cubeqcpu, dsp32, e0c6s46, hd61700: Removed MCFG macros. [Ryan Holtz]

-video/hd44352: Removed MCFG macros. [Ryan Holtz]

-drivers/cubeqst, pb1000, tabag1, unichamp: Removed MACHINE_CONFIG macros. [Ryan Holtz]
This commit is contained in:
mooglyguy 2018-12-16 09:50:16 +01:00
parent 56bb41208a
commit a5116d59f0
12 changed files with 174 additions and 283 deletions

View File

@ -6,12 +6,6 @@
#pragma once
#define MCFG_APEXC_TAPE_READ_CB(_devcb) \
downcast<apexc_cpu_device &>(*device).set_tape_read_cb(DEVCB_##_devcb);
#define MCFG_APEXC_TAPE_PUNCH_CB(_devcb) \
downcast<apexc_cpu_device &>(*device).set_tape_punch_cb(DEVCB_##_devcb);
enum
{
APEXC_CR =1, /* control register */

View File

@ -19,10 +19,6 @@
#define CP1610_RESET INPUT_LINE_RESET /* Non-Maskable */
#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
#define MCFG_CP1610_BEXT_CALLBACK(_read) \
downcast<cp1610_cpu_device *>(device)->set_bext_callback(DEVCB_##_read);
class cp1610_cpu_device : public cpu_device
{
public:
@ -36,10 +32,7 @@ public:
// construction/destruction
cp1610_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template <class Object> devcb_base &set_bext_callback(Object &&rd)
{
return m_read_bext.set_callback(std::forward<Object>(rd));
}
auto bext() { return m_read_bext.bind(); }
protected:
// device-level overrides

View File

@ -12,24 +12,6 @@
#define MAME_CPU_CUBEQCPU_CUBEQCPU_H
/***************************************************************************
CONFIGURATION STRUCTURE
***************************************************************************/
#define MCFG_CQUESTSND_CONFIG(_dac_w, _sound_tag) \
downcast<cquestsnd_cpu_device &>(*device).set_dac_w(DEVCB_##_dac_w); \
downcast<cquestsnd_cpu_device &>(*device).set_sound_region(_sound_tag);
#define MCFG_CQUESTROT_CONFIG(_linedata_w) \
downcast<cquestrot_cpu_device &>(*device).set_linedata_w(DEVCB_##_linedata_w );
#define MCFG_CQUESTLIN_CONFIG(_linedata_r) \
downcast<cquestlin_cpu_device &>(*device).set_linedata_r(DEVCB_##_linedata_r );
/***************************************************************************
PUBLIC FUNCTIONS
***************************************************************************/
@ -41,7 +23,7 @@ public:
cquestsnd_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
template <class Object> devcb_base &set_dac_w(Object &&cb) { return m_dac_w.set_callback(std::forward<Object>(cb)); }
auto dac_w() { return m_dac_w.bind(); }
void set_sound_region(const char *tag) { m_sound_region_tag = tag; }
DECLARE_WRITE16_MEMBER(sndram_w);
@ -132,7 +114,7 @@ public:
cquestrot_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
template <class Object> devcb_base &set_linedata_w(Object &&cb) { return m_linedata_w.set_callback(std::forward<Object>(cb)); }
auto linedata_w() { return m_linedata_w.bind(); }
DECLARE_READ16_MEMBER(linedata_r);
DECLARE_WRITE16_MEMBER(rotram_w);
@ -244,7 +226,7 @@ public:
cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
template <class Object> devcb_base &set_linedata_r(Object &&cb) { return m_linedata_r.set_callback(std::forward<Object>(cb)); }
auto linedata_r() { return m_linedata_r.bind(); }
DECLARE_WRITE16_MEMBER( linedata_w );
void cubeqcpu_swap_line_banks();

View File

@ -30,9 +30,6 @@ const int DSP32_OUTPUT_PDF = 0x02;
// TYPE DEFINITIONS
//**************************************************************************
#define MCFG_DSP32C_OUTPUT_CALLBACK(_write) \
downcast<dsp32c_device &>(*device).set_output_pins_callback(DEVCB_##_write);
// ======================> dsp32c_device
class dsp32c_device : public cpu_device
@ -41,7 +38,6 @@ public:
// construction/destruction
dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_output_pins_callback(Object &&cb) { return m_output_pins_changed.set_callback(std::forward<Object>(cb)); }
auto out_cb() { return m_output_pins_changed.bind(); }
// public interfaces

View File

@ -52,11 +52,15 @@ e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, d
: e0c6200_cpu_device(mconfig, E0C6S46, tag, owner, clock, address_map_constructor(FUNC(e0c6s46_device::e0c6s46_program), this), address_map_constructor(FUNC(e0c6s46_device::e0c6s46_data), this))
, m_vram1(*this, "vram1")
, m_vram2(*this, "vram2"), m_osc(0), m_svd(0), m_lcd_control(0), m_lcd_contrast(0)
, m_write_r0(*this), m_write_r1(*this), m_write_r2(*this), m_write_r3(*this), m_write_r4(*this)
, m_read_p0(*this), m_read_p1(*this), m_read_p2(*this), m_read_p3(*this)
, m_write_p0(*this), m_write_p1(*this), m_write_p2(*this), m_write_p3(*this), m_r_dir(0), m_p_dir(0), m_p_pullup(0), m_dfk0(0), m_256_src_pulse(0), m_core_256_handle(nullptr),
m_watchdog_count(0), m_clktimer_count(0), m_stopwatch_on(0), m_swl_cur_pulse(0), m_swl_slice(0), m_swl_count(0), m_swh_count(0), m_prgtimer_select(0), m_prgtimer_on(0), m_prgtimer_src_pulse(0),
m_prgtimer_cur_pulse(0), m_prgtimer_count(0), m_prgtimer_reload(0), m_prgtimer_handle(nullptr), m_bz_43_on(0), m_bz_freq(0), m_bz_envelope(0), m_bz_duty_ratio(0), m_bz_1shot_on(0), m_bz_1shot_running(false), m_bz_1shot_count(0), m_bz_pulse(0), m_buzzer_handle(nullptr)
, m_write_r{{*this}, {*this}, {*this}, {*this}, {*this}}
, m_read_p{{*this}, {*this}, {*this}, {*this}}
, m_write_p{{*this}, {*this}, {*this}, {*this}}
, m_r_dir(0), m_p_dir(0), m_p_pullup(0), m_dfk0(0), m_256_src_pulse(0), m_core_256_handle(nullptr)
, m_watchdog_count(0), m_clktimer_count(0), m_stopwatch_on(0), m_swl_cur_pulse(0), m_swl_slice(0)
, m_swl_count(0), m_swh_count(0), m_prgtimer_select(0), m_prgtimer_on(0), m_prgtimer_src_pulse(0)
, m_prgtimer_cur_pulse(0), m_prgtimer_count(0), m_prgtimer_reload(0), m_prgtimer_handle(nullptr)
, m_bz_43_on(0), m_bz_freq(0), m_bz_envelope(0), m_bz_duty_ratio(0), m_bz_1shot_on(0)
, m_bz_1shot_running(false), m_bz_1shot_count(0), m_bz_pulse(0), m_buzzer_handle(nullptr)
{ }
@ -70,20 +74,14 @@ void e0c6s46_device::device_start()
e0c6200_cpu_device::device_start();
// find ports
m_write_r0.resolve_safe();
m_write_r1.resolve_safe();
m_write_r2.resolve_safe();
m_write_r3.resolve_safe();
m_write_r4.resolve_safe();
for (int i = 0; i < 5; i++)
m_write_r[i].resolve_safe();
m_read_p0.resolve_safe(0);
m_read_p1.resolve_safe(0);
m_read_p2.resolve_safe(0);
m_read_p3.resolve_safe(0);
m_write_p0.resolve_safe();
m_write_p1.resolve_safe();
m_write_p2.resolve_safe();
m_write_p3.resolve_safe();
for (int i = 0; i < 4; i++)
{
m_read_p[i].resolve_safe(0);
m_write_p[i].resolve_safe();
}
m_pixel_update_cb.bind_relative_to(*owner());
@ -308,10 +306,10 @@ void e0c6s46_device::write_r(u8 port, u8 data)
switch (port)
{
case 0: m_write_r0(port, out, 0xff); break;
case 1: m_write_r1(port, out, 0xff); break;
case 2: m_write_r2(port, out, 0xff); break;
case 3: m_write_r3(port, out, 0xff); break; // TODO: R33 PTCLK/_SRDY
case 0: m_write_r[0](port, out, 0xff); break;
case 1: m_write_r[1](port, out, 0xff); break;
case 2: m_write_r[2](port, out, 0xff); break;
case 3: m_write_r[3](port, out, 0xff); break; // TODO: R33 PTCLK/_SRDY
// R4x: special output
case 4:
@ -332,7 +330,7 @@ void e0c6s46_device::write_r4_out()
// R42: FOUT or _BZ
// R43: BZ(buzzer)
u8 out = (m_port_r[4] & 2) | (m_bz_pulse << 3) | (m_bz_pulse << 2 ^ 4);
m_write_r4(4, out, 0xff);
m_write_r[4](4, out, 0xff);
}
@ -347,13 +345,7 @@ void e0c6s46_device::write_p(u8 port, u8 data)
if (!(m_p_dir >> port & 1))
return;
switch (port)
{
case 0: m_write_p0(port, data, 0xff); break;
case 1: m_write_p1(port, data, 0xff); break;
case 2: m_write_p2(port, data, 0xff); break;
case 3: m_write_p3(port, data, 0xff); break;
}
m_write_p[port](port, data, 0xff);
}
u8 e0c6s46_device::read_p(u8 port)
@ -362,14 +354,7 @@ u8 e0c6s46_device::read_p(u8 port)
if (m_p_dir >> port & 1)
return m_port_p[port];
switch (port)
{
case 0: return m_read_p0(port, 0xff);
case 1: return m_read_p1(port, 0xff);
case 2: return m_read_p2(port, 0xff);
case 3: return m_read_p3(port, 0xff);
}
m_read_p[port](port, 0xff);
return 0;
}

View File

@ -11,13 +11,6 @@
#include "e0c6200.h"
// I/O ports setup
// 5 4-bit R output ports
#define MCFG_E0C6S46_WRITE_R_CB(R, _devcb) \
downcast<e0c6s46_device &>(*device).set_write_r##R##_callback(DEVCB_##_devcb);
enum
{
E0C6S46_PORT_R0X = 0,
@ -27,12 +20,6 @@ enum
E0C6S46_PORT_R4X
};
// 4 4-bit P I/O ports
#define MCFG_E0C6S46_READ_P_CB(R, _devcb) \
downcast<hmcs40_cpu_device &>(*device).set_read_r##P##_callback(DEVCB_##_devcb);
#define MCFG_E0C6S46_WRITE_P_CB(R, _devcb) \
downcast<e0c6s46_device &>(*device).set_write_r##P##_callback(DEVCB_##_devcb);
enum
{
E0C6S46_PORT_P0X = 0,
@ -56,9 +43,6 @@ enum
// lcd driver
#define MCFG_E0C6S46_PIXEL_UPDATE_CB(_class, _method) \
downcast<e0c6s46_device &>(*device).set_pixel_update_cb(e0c6s46_device::pixel_update_delegate(&_class::_method, #_class "::" #_method, this));
#define E0C6S46_PIXEL_UPDATE(name) void name(bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int seg, int com, int state)
@ -69,23 +53,24 @@ public:
e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// configuration helpers
template <class Object> devcb_base &set_write_r0_callback(Object &&cb) { return m_write_r0.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_r1_callback(Object &&cb) { return m_write_r1.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_r2_callback(Object &&cb) { return m_write_r2.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_r3_callback(Object &&cb) { return m_write_r3.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_r4_callback(Object &&cb) { return m_write_r4.set_callback(std::forward<Object>(cb)); }
// 5 4-bit R output ports
template <std::size_t Port> auto write_r() { return m_write_r[Port].bind(); }
template <class Object> devcb_base &set_read_p0_callback(Object &&cb) { return m_read_p0.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_read_p1_callback(Object &&cb) { return m_read_p1.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_read_p2_callback(Object &&cb) { return m_read_p2.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_read_p3_callback(Object &&cb) { return m_read_p3.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_p0_callback(Object &&cb) { return m_write_p0.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_p1_callback(Object &&cb) { return m_write_p1.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_p2_callback(Object &&cb) { return m_write_p2.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_write_p3_callback(Object &&cb) { return m_write_p3.set_callback(std::forward<Object>(cb)); }
// 4 4-bit P I/O ports
template <std::size_t Port> auto read_p() { return m_read_p[Port].bind(); }
template <std::size_t Port> auto write_p() { return m_write_p[Port].bind(); }
template <typename Object> void set_pixel_update_cb(Object &&cb) { m_pixel_update_cb = std::forward<Object>(cb); }
void set_pixel_update_cb(pixel_update_delegate callback) { m_pixel_update_cb = callback; }
template <class FunctionClass> void set_pixel_update_cb(const char *devname,
void (FunctionClass::*callback)(bitmap_ind16 &, const rectangle &, int, int, int, int), const char *name)
{
set_pixel_update_cb(pixel_update_delegate(callback, name, devname, static_cast<FunctionClass *>(nullptr)));
}
template <class FunctionClass> void set_pixel_update_cb(void (FunctionClass::*callback)(bitmap_ind16 &, const rectangle &, int, int, int, int),
const char *name)
{
set_pixel_update_cb(pixel_update_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
}
DECLARE_READ8_MEMBER(io_r);
DECLARE_WRITE8_MEMBER(io_w);
@ -120,9 +105,9 @@ private:
pixel_update_delegate m_pixel_update_cb;
// i/o ports
devcb_write8 m_write_r0, m_write_r1, m_write_r2, m_write_r3, m_write_r4;
devcb_read8 m_read_p0, m_read_p1, m_read_p2, m_read_p3;
devcb_write8 m_write_p0, m_write_p1, m_write_p2, m_write_p3;
devcb_write8 m_write_r[5];
devcb_read8 m_read_p[4];
devcb_write8 m_write_p[4];
void write_r(u8 port, u8 data);
void write_r4_out();
void write_p(u8 port, u8 data);

View File

@ -11,32 +11,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_HD61700_LCD_CTRL_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_lcd_ctrl_callback(DEVCB_##_devcb);
#define MCFG_HD61700_LCD_WRITE_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_lcd_write_callback(DEVCB_##_devcb);
#define MCFG_HD61700_LCD_READ_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_lcd_read_callback(DEVCB_##_devcb);
#define MCFG_HD61700_KB_WRITE_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_kb_write_callback(DEVCB_##_devcb);
#define MCFG_HD61700_KB_READ_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_kb_read_callback(DEVCB_##_devcb);
#define MCFG_HD61700_PORT_WRITE_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_port_write_callback(DEVCB_##_devcb);
#define MCFG_HD61700_PORT_READ_CB(_devcb) \
downcast<hd61700_cpu_device &>(*device).set_port_read_callback(DEVCB_##_devcb);
//**************************************************************************
// DEFINITIONS
//**************************************************************************
@ -61,13 +35,13 @@ public:
// construction/destruction
hd61700_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class Object> devcb_base &set_lcd_ctrl_callback(Object &&cb) { return m_lcd_ctrl_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_lcd_write_callback(Object &&cb) { return m_lcd_write_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_lcd_read_callback(Object &&cb) { return m_lcd_read_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_kb_write_callback(Object &&cb) { return m_kb_write_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_kb_read_callback(Object &&cb) { return m_kb_read_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_port_write_callback(Object &&cb) { return m_port_write_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_port_read_callback(Object &&cb) { return m_port_read_cb.set_callback(std::forward<Object>(cb)); }
auto lcd_ctrl() { return m_lcd_ctrl_cb.bind(); }
auto lcd_write() { return m_lcd_write_cb.bind(); }
auto lcd_read() { return m_lcd_read_cb.bind(); }
auto kb_write() { return m_kb_write_cb.bind(); }
auto kb_read() { return m_kb_read_cb.bind(); }
auto port_write() { return m_port_write_cb.bind(); }
auto port_read() { return m_port_read_cb.bind(); }
protected:
// device-level overrides

View File

@ -11,11 +11,6 @@
#pragma once
#define MCFG_HD44352_ON_CB(_devcb) \
downcast<hd44352_device &>(*device).set_on_callback(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -28,7 +23,7 @@ public:
// construction/destruction
hd44352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_on_callback(Object &&cb) { return m_on_cb.set_callback(std::forward<Object>(cb)); }
auto on_cb() { return m_on_cb.bind(); }
// device interface
uint8_t data_read();

View File

@ -524,76 +524,74 @@ WRITE16_MEMBER( cubeqst_state::sound_dac_w )
*
*************************************/
MACHINE_CONFIG_START(cubeqst_state::cubeqst)
MCFG_DEVICE_ADD("main_cpu", M68000, XTAL(16'000'000) / 2)
MCFG_DEVICE_PROGRAM_MAP(m68k_program_map)
void cubeqst_state::cubeqst(machine_config &config)
{
M68000(config, m_maincpu, XTAL(16'000'000) / 2);
m_maincpu->set_addrmap(AS_PROGRAM, &cubeqst_state::m68k_program_map);
MCFG_DEVICE_ADD("rotate_cpu", CQUESTROT, XTAL(10'000'000) / 2)
MCFG_DEVICE_PROGRAM_MAP(rotate_map)
MCFG_CQUESTROT_CONFIG( WRITE16( "line_cpu", cquestlin_cpu_device, linedata_w ) )
CQUESTROT(config, m_rotatecpu, XTAL(10'000'000) / 2);
m_rotatecpu->set_addrmap(AS_PROGRAM, &cubeqst_state::rotate_map);
m_rotatecpu->linedata_w().set(m_linecpu, FUNC(cquestlin_cpu_device::linedata_w));
MCFG_DEVICE_ADD("line_cpu", CQUESTLIN, XTAL(10'000'000) / 2)
MCFG_DEVICE_PROGRAM_MAP(line_sound_map)
MCFG_CQUESTLIN_CONFIG( READ16( "rotate_cpu", cquestrot_cpu_device, linedata_r ) )
CQUESTLIN(config, m_linecpu, XTAL(10'000'000) / 2);
m_linecpu->set_addrmap(AS_PROGRAM, &cubeqst_state::line_sound_map);
m_linecpu->linedata_r().set(m_rotatecpu, FUNC(cquestrot_cpu_device::linedata_r));
MCFG_DEVICE_ADD("sound_cpu", CQUESTSND, XTAL(10'000'000) / 2)
MCFG_DEVICE_PROGRAM_MAP(line_sound_map)
MCFG_CQUESTSND_CONFIG( WRITE16( *this, cubeqst_state, sound_dac_w ), "soundproms" )
CQUESTSND(config, m_soundcpu, XTAL(10'000'000) / 2);
m_soundcpu->set_addrmap(AS_PROGRAM, &cubeqst_state::line_sound_map);
m_soundcpu->dac_w().set(FUNC(cubeqst_state::sound_dac_w));
m_soundcpu->set_sound_region("soundproms");
MCFG_QUANTUM_TIME(attotime::from_hz(48000))
config.m_minimum_quantum = attotime::from_hz(48000);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_LASERDISC_SIMUTREK_ADD("laserdisc")
MCFG_LASERDISC_OVERLAY_DRIVER(CUBEQST_HBLANK, CUBEQST_VCOUNT, cubeqst_state, screen_update_cubeqst)
MCFG_LASERDISC_OVERLAY_CLIP(0, 320-1, 0, 256-8)
MCFG_LASERDISC_OVERLAY_POSITION(0.002f, -0.018f)
MCFG_LASERDISC_OVERLAY_SCALE(1.0f, 1.030f)
SIMUTREK_SPECIAL(config, m_laserdisc, 0);
m_laserdisc->set_overlay(CUBEQST_HBLANK, CUBEQST_VCOUNT, FUNC(cubeqst_state::screen_update_cubeqst));
m_laserdisc->set_overlay_clip(0, 320-1, 0, 256-8);
m_laserdisc->set_overlay_position(0.002f, -0.018f);
m_laserdisc->set_overlay_scale(1.0f, 1.030f);
m_laserdisc->set_screen(m_screen);
MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, cubeqst_state, vblank_irq))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_video_attributes(VIDEO_SELF_RENDER);
m_screen->set_raw(XTAL(14'318'181)*2, 910, 0, 704, 525, 44, 524);
m_screen->set_screen_update("laserdisc", FUNC(laserdisc_device::screen_update));
m_screen->screen_vblank().set(FUNC(cubeqst_state::vblank_irq));
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
MCFG_DEVICE_MODIFY("laserdisc")
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
m_laserdisc->add_route(0, "lspeaker", 1.0);
m_laserdisc->add_route(1, "rspeaker", 1.0);
MCFG_DEVICE_ADD("rdac0", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c22 (34) + tl074cn.1b (53) + r10k.rn1 (30)
MCFG_DEVICE_ADD("ldac0", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c13 (34) + tl074cn.3b (53) + r10k.rn3 (30)
MCFG_DEVICE_ADD("rdac1", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c21 (34) + tl074cn.1c (53) + r10k.rn2 (30)
MCFG_DEVICE_ADD("ldac1", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c12 (34) + tl074cn.3c (53) + r10k.rn4 (30)
MCFG_DEVICE_ADD("rdac2", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c20 (34) + tl074cn.1c (53) + r10k.rn2 (30)
MCFG_DEVICE_ADD("ldac2", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c11 (34) + tl074cn.3c (53) + r10k.rn4 (30)
MCFG_DEVICE_ADD("rdac3", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c19 (34) + tl074cn.1b (53) + r10k.rn1 (30)
MCFG_DEVICE_ADD("ldac3", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c10 (34) + tl074cn.3b (53) + r10k.rn3 (30)
MCFG_DEVICE_ADD("rdac4", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c18 (34) + tl074cn.1c (53) + r10k.rn2 (30)
MCFG_DEVICE_ADD("ldac4", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c9 (34) + tl074cn.3c (53) + r10k.rn4 (30)
MCFG_DEVICE_ADD("rdac5", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c17 (34) + tl074cn.1b (53) + r10k.rn1 (30)
MCFG_DEVICE_ADD("ldac5", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c8 (34) + tl074cn.3b (53) + r10k.rn3 (30)
MCFG_DEVICE_ADD("rdac6", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c16 (34) + tl074cn.1c (53) + r10k.rn2 (30)
MCFG_DEVICE_ADD("ldac6", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c7 (34) + tl074cn.3c (53) + r10k.rn4 (30)
MCFG_DEVICE_ADD("rdac7", AD7521, 0) MCFG_SOUND_ROUTE(0, "rspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c15 (34) + tl074cn.1b (53) + r10k.rn1 (30)
MCFG_DEVICE_ADD("ldac7", AD7521, 0) MCFG_SOUND_ROUTE(0, "lspeaker", 0.125) // ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c6 (34) + tl074cn.3b (53) + r10k.rn3 (30)
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE(0, "rdac0", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac0", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac0", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac0", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac2", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac2", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac3", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac3", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac3", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac3", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac4", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac4", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac4", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac4", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac5", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac5", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac5", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac5", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac6", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac6", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac6", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac6", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac7", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac7", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "ldac7", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac7", -1.0, DAC_VREF_NEG_INPUT)
MACHINE_CONFIG_END
for (int i = 0; i < 8; i++)
{
// ad7521jn.2d (59) + cd4051be.1d (24) + 1500pf.c22 (34) + tl074cn.1b (53) + r10k.rn1 (30)
AD7521(config, m_dacs[i*2+0], 0).add_route(0, "rspeaker", 0.125);
// ad7521jn.2d (59) + cd4051be.3d (24) + 1500pf.c13 (34) + tl074cn.3b (53) + r10k.rn3 (30)
AD7521(config, m_dacs[i*2+1], 0).add_route(0, "lspeaker", 0.125);
}
voltage_regulator_device &vref(VOLTAGE_REGULATOR(config, "vref", 0));
vref.set_output(5.0);
vref.add_route(0, "rdac0", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac0", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac0", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac0", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac1", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac1", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac1", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac1", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac2", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac2", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac2", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac2", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac3", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac3", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac3", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac3", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac4", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac4", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac4", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac4", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac5", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac5", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac5", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac5", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac6", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac6", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac6", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac6", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "rdac7", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "rdac7", -1.0, DAC_VREF_NEG_INPUT);
vref.add_route(0, "ldac7", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "ldac7", -1.0, DAC_VREF_NEG_INPUT);
}
/*************************************

View File

@ -482,57 +482,56 @@ void pb1000_state::machine_start()
m_kb_timer->adjust(attotime::from_hz(192), 0, attotime::from_hz(192));
}
MACHINE_CONFIG_START(pb1000_state::pb1000)
void pb1000_state::pb1000(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", HD61700, 910000)
MCFG_DEVICE_PROGRAM_MAP(pb1000_mem)
MCFG_HD61700_LCD_CTRL_CB(WRITE8(*this, pb1000_state, lcd_control))
MCFG_HD61700_LCD_READ_CB(READ8(*this, pb1000_state, lcd_data_r))
MCFG_HD61700_LCD_WRITE_CB(WRITE8(*this, pb1000_state, lcd_data_w))
MCFG_HD61700_KB_READ_CB(READ16(*this, pb1000_state, pb1000_kb_r))
MCFG_HD61700_KB_WRITE_CB(WRITE8(*this, pb1000_state, kb_matrix_w))
MCFG_HD61700_PORT_READ_CB(READ8(*this, pb1000_state, pb1000_port_r))
MCFG_HD61700_PORT_WRITE_CB(WRITE8(*this, pb1000_state, port_w))
HD61700(config, m_maincpu, 910000);
m_maincpu->set_addrmap(AS_PROGRAM, &pb1000_state::pb1000_mem);
m_maincpu->lcd_ctrl().set(FUNC(pb1000_state::lcd_control));
m_maincpu->lcd_read().set(FUNC(pb1000_state::lcd_data_r));
m_maincpu->lcd_write().set(FUNC(pb1000_state::lcd_data_w));
m_maincpu->kb_read().set(FUNC(pb1000_state::pb1000_kb_r));
m_maincpu->kb_write().set(FUNC(pb1000_state::kb_matrix_w));
m_maincpu->port_read().set(FUNC(pb1000_state::pb1000_port_r));
m_maincpu->port_write().set(FUNC(pb1000_state::port_w));
/* video hardware */
MCFG_SCREEN_ADD("screen", LCD)
MCFG_SCREEN_REFRESH_RATE(50)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_UPDATE_DEVICE("hd44352", hd44352_device, screen_update)
MCFG_SCREEN_SIZE(192, 32)
MCFG_SCREEN_VISIBLE_AREA(0, 192-1, 0, 32-1)
MCFG_SCREEN_PALETTE("palette")
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
screen.set_refresh_hz(50);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
screen.set_screen_update("hd44352", FUNC(hd44352_device::screen_update));
screen.set_size(192, 32);
screen.set_visarea(0, 192-1, 0, 32-1);
screen.set_palette("palette");
MCFG_PALETTE_ADD("palette", 2)
MCFG_PALETTE_INIT_OWNER(pb1000_state, pb1000)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_pb1000)
PALETTE(config, "palette", 2).set_init(FUNC(pb1000_state::palette_init_pb1000));
GFXDECODE(config, "gfxdecode", "palette", gfx_pb1000);
MCFG_DEVICE_ADD("hd44352", HD44352, 910000)
MCFG_HD44352_ON_CB(INPUTLINE("maincpu", HD61700_ON_INT))
HD44352(config, m_hd44352, 910000);
m_hd44352->on_cb().set_inputline("maincpu", HD61700_ON_INT);
NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0);
NVRAM(config, "nvram2", nvram_device::DEFAULT_ALL_0);
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD( "beeper", BEEP, 3250 )
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
MACHINE_CONFIG_END
BEEP(config, m_beeper, 3250).add_route(ALL_OUTPUTS, "mono", 1.00);
}
MACHINE_CONFIG_START(pb1000_state::pb2000c)
void pb1000_state::pb2000c(machine_config &config)
{
pb1000(config);
/* basic machine hardware */
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(pb2000c_mem)
MCFG_HD61700_KB_READ_CB(READ16(*this, pb1000_state, pb2000c_kb_r))
MCFG_HD61700_PORT_READ_CB(READ8(*this, pb1000_state, pb2000c_port_r))
m_maincpu->set_addrmap(AS_PROGRAM, &pb1000_state::pb2000c_mem);
m_maincpu->kb_read().set(FUNC(pb1000_state::pb2000c_kb_r));
m_maincpu->port_read().set(FUNC(pb1000_state::pb2000c_port_r));
MCFG_GENERIC_CARTSLOT_ADD("cardslot1", generic_plain_slot, "pb2000c_card")
MCFG_GENERIC_CARTSLOT_ADD("cardslot2", generic_plain_slot, "pb2000c_card")
GENERIC_CARTSLOT(config, m_card1, generic_plain_slot, "pb2000c_card");
GENERIC_CARTSLOT(config, m_card2, generic_plain_slot, "pb2000c_card");
/* Software lists */
MCFG_SOFTWARE_LIST_ADD("card_list", "pb2000c")
MACHINE_CONFIG_END
SOFTWARE_LIST(config, "card_list").set_original("pb2000c");
}
/* ROM definition */

View File

@ -135,31 +135,29 @@ INPUT_PORTS_END
***************************************************************************/
MACHINE_CONFIG_START(tamag1_state::tama)
void tamag1_state::tama(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", E0C6S46, 32.768_kHz_XTAL)
MCFG_E0C6S46_PIXEL_UPDATE_CB(tamag1_state, pixel_update)
MCFG_E0C6S46_WRITE_R_CB(4, WRITE8(*this, tamag1_state, speaker_w))
E0C6S46(config, m_maincpu, 32.768_kHz_XTAL);
m_maincpu->set_pixel_update_cb(FUNC(tamag1_state::pixel_update));
m_maincpu->write_r<4>().set(FUNC(tamag1_state::speaker_w));
/* video hardware */
MCFG_SCREEN_ADD("screen", LCD)
MCFG_SCREEN_REFRESH_RATE(32.768_kHz_XTAL/1024)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(40, 16)
MCFG_SCREEN_VISIBLE_AREA(0, 32-1, 0, 16-1)
MCFG_SCREEN_UPDATE_DEVICE("maincpu", e0c6s46_device, screen_update)
MCFG_SCREEN_PALETTE("palette")
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
screen.set_refresh_hz(32.768_kHz_XTAL/1024);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(40, 16);
screen.set_visarea(0, 32-1, 0, 16-1);
screen.set_screen_update("maincpu", FUNC(e0c6s46_device::screen_update));
screen.set_palette("palette");
config.set_default_layout(layout_tama);
MCFG_PALETTE_ADD("palette", 2)
MCFG_PALETTE_INIT_OWNER(tamag1_state, tama)
PALETTE(config, "palette", 2).set_init(FUNC(tamag1_state::palette_init_tama));
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.25);
}

View File

@ -65,7 +65,7 @@ public:
void init_unichamp();
private:
required_device<cpu_device> m_maincpu;
required_device<cp1610_cpu_device> m_maincpu;
required_device<gic_device> m_gic;
required_device<generic_slot_device> m_cart;
@ -238,34 +238,29 @@ WRITE16_MEMBER( unichamp_state::unichamp_trapl_w )
logerror("trapl_w(%x) = %x\n",offset,data);
}
MACHINE_CONFIG_START(unichamp_state::unichamp)
void unichamp_state::unichamp(machine_config &config)
{
/* basic machine hardware */
//The CPU is really clocked this way:
//MCFG_DEVICE_ADD("maincpu", CP1610, XTAL(3'579'545)/4)
//But since it is only running 7752/29868 th's of the time...
//TODO find a more accurate method? (the emulation will be the same though)
MCFG_DEVICE_ADD("maincpu", CP1610, (7752.0/29868.0)*XTAL(3'579'545)/4)
CP1610(config, m_maincpu, (7752.0/29868.0)*XTAL(3'579'545)/4);
m_maincpu->set_addrmap(AS_PROGRAM, &unichamp_state::unichamp_mem);
m_maincpu->bext().set(FUNC(unichamp_state::bext_r));
MCFG_DEVICE_PROGRAM_MAP(unichamp_mem)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_CP1610_BEXT_CALLBACK(READ8(*this, unichamp_state, bext_r))
config.m_minimum_quantum = attotime::from_hz(60);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS( XTAL(3'579'545),
gic_device::LINE_CLOCKS,
gic_device::START_ACTIVE_SCAN,
gic_device::END_ACTIVE_SCAN,
gic_device::LINES,
gic_device::START_Y,
gic_device::START_Y + gic_device::SCREEN_HEIGHT )
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_raw(XTAL(3'579'545),
gic_device::LINE_CLOCKS, gic_device::START_ACTIVE_SCAN, gic_device::END_ACTIVE_SCAN,
gic_device::LINES, gic_device::START_Y, gic_device::START_Y + gic_device::SCREEN_HEIGHT);
screen.set_screen_update(FUNC(unichamp_state::screen_update_unichamp));
screen.set_palette("palette");
MCFG_SCREEN_UPDATE_DRIVER(unichamp_state, screen_update_unichamp)
MCFG_SCREEN_PALETTE("palette")
MCFG_PALETTE_ADD("palette", 4)
MCFG_PALETTE_INIT_OWNER(unichamp_state, unichamp)
PALETTE(config, "palette", 4).set_init(FUNC(unichamp_state::palette_init_unichamp));
/* sound hardware */
SPEAKER(config, "mono").front_center();
@ -275,12 +270,9 @@ MACHINE_CONFIG_START(unichamp_state::unichamp)
m_gic->add_route(ALL_OUTPUTS, "mono", 0.40);
/* cartridge */
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_linear_slot, "unichamp_cart")
MCFG_GENERIC_EXTENSIONS("bin,rom")
MCFG_SOFTWARE_LIST_ADD("cart_list", "unichamp")
MACHINE_CONFIG_END
GENERIC_CARTSLOT(config, m_cart, generic_linear_slot, "unichamp_cart", "bin,rom");
SOFTWARE_LIST(config, "cart_list").set_original("unichamp");
}
ROM_START(unichamp)
ROM_REGION(0x1000,"maincpu", ROMREGION_ERASEFF)