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Removing old and duplicate code for genesis/megadrive from MAME (part 2): updated bootlegs to use latest genesis code and finally removed src/mame/drivers/genesis.c!

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This commit is contained in:
Fabio Priuli 2009-10-09 08:54:02 +00:00
parent b921124c9e
commit a52fce206d
10 changed files with 193 additions and 1005 deletions
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1
.gitattributes vendored
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@ -1582,7 +1582,6 @@ src/mame/drivers/gauntlet.c svneol=native#text/plain
src/mame/drivers/gberet.c svneol=native#text/plain src/mame/drivers/gberet.c svneol=native#text/plain
src/mame/drivers/gbusters.c svneol=native#text/plain src/mame/drivers/gbusters.c svneol=native#text/plain
src/mame/drivers/gcpinbal.c svneol=native#text/plain src/mame/drivers/gcpinbal.c svneol=native#text/plain
src/mame/drivers/genesis.c svneol=native#text/plain
src/mame/drivers/getrivia.c svneol=native#text/plain src/mame/drivers/getrivia.c svneol=native#text/plain
src/mame/drivers/ghosteo.c svneol=native#text/plain src/mame/drivers/ghosteo.c svneol=native#text/plain
src/mame/drivers/gijoe.c svneol=native#text/plain src/mame/drivers/gijoe.c svneol=native#text/plain

457
src/mame/drivers/genesis.c
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@ -1,457 +0,0 @@
/* Some Generic Sega Genesis stuff used by Megatech / Megaplay etc. */
/*
Genesis hardware games are in
megatech.c
megaplay.c
gene_sm.c
segac2.c
*/
#include "driver.h"
#include "cpu/z80/z80.h"
#include "cpu/m68000/m68000.h"
#include "sound/2612intf.h"
#include "sound/sn76496.h"
#include "genesis.h"
#define MASTER_CLOCK 53693100
/******************** Sega Genesis ******************************/
/* Genesis based */
static UINT32 z80_68000_latch = 0;
static UINT32 z80_latch_bitcount = 0;
/* interrupt states */
static UINT8 irq2_int; /* INT2 */
static UINT8 scanline_int; /* INT4 - programmable */
static UINT8 vblank_int; /* INT6 - on every VBLANK */
static emu_timer * scan_timer;
static int z80running;
UINT16 *genesis_68k_ram;
UINT8 *genesis_z80_ram;
/******************************************************************************
Interrupt handling
*******************************************************************************
The Genesis uses 2 Different Interrupts, IRQ4 and IRQ6.
The C2 system uses IRQ2 as well.
IRQ6 = Vblank, this happens after the last visible line of the display has
been drawn (after line 224)
IRQ4 = H-Int, this happens based upon the value in H-Int Counter. If the
Horizontal Interrupt is enabled and the Counter Value = 0 there
will be a Level 4 Interrupt Triggered
IRQ2 = sound int, generated by the YM3438
--------
More H-Counter Information:
Providing Horizontal Interrupts are active the H-Counter will be loaded
with the value stored in register #10 (0x0A) at the following times:
(1) At the top of the display, before drawing the first line
(2) When the counter has expired
(3) During the VBlank Period (lines 224-261)
The Counter is decreased by 1 after every line.
******************************************************************************/
/* call this whenever the interrupt state has changed */
static void update_interrupts(running_machine *machine)
{
cputag_set_input_line(machine, "maincpu", 2, irq2_int ? ASSERT_LINE : CLEAR_LINE);
cputag_set_input_line(machine, "maincpu", 4, scanline_int ? ASSERT_LINE : CLEAR_LINE);
cputag_set_input_line(machine, "maincpu", 6, vblank_int ? ASSERT_LINE : CLEAR_LINE);
}
/* timer callback to turn off the IRQ4 signal after a short while */
static TIMER_CALLBACK( vdp_int4_off )
{
scanline_int = 0;
update_interrupts(machine);
}
/* timer callback to handle reloading the H counter and generate IRQ4 */
static TIMER_CALLBACK( vdp_reload_counter )
{
int scanline = param;
/* generate an int if they're enabled */
if (genesis_vdp_regs[0] & 0x10)/* && !(misc_io_data[7] & 0x10))*/
if (scanline != 0 || genesis_vdp_regs[10] == 0)
{
scanline_int = 1;
update_interrupts(machine);
timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, scanline + 1, 0), NULL, 0, vdp_int4_off);
}
/* advance to the next scanline */
/* behavior 2: 0 count means interrupt after one scanline */
/* (this behavior matches the Sega C2 emulator) */
scanline += genesis_vdp_regs[10] + 1;
if (scanline >= 224)
scanline = 0;
/* set a timer */
timer_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 320), scanline);
}
/* timer callback to turn off the IRQ6 signal after a short while */
static TIMER_CALLBACK( vdp_int6_off )
{
vblank_int = 0;
update_interrupts(machine);
}
/* interrupt callback to generate the VBLANK interrupt */
INTERRUPT_GEN( genesis_vblank_interrupt )
{
/* generate the interrupt */
vblank_int = 1;
update_interrupts(device->machine);
/* set a timer to turn it off */
timer_set(device->machine, video_screen_get_time_until_pos(device->machine->primary_screen, video_screen_get_vpos(device->machine->primary_screen), 22), NULL, 0, vdp_int6_off);
}
/* interrupt callback to generate the YM3438 interrupt */
void genesis_irq2_interrupt(const device_config *device, int state)
{
irq2_int = state;
update_interrupts(device->machine);
}
MACHINE_START( genesis )
{
state_save_register_global(machine, irq2_int);
state_save_register_global(machine, scanline_int);
state_save_register_global(machine, vblank_int);
}
MACHINE_RESET( genesis )
{
/* C2 doesn't have a Z80, so we can't just assume */
if (cputag_get_cpu(machine, "genesis_snd_z80") != NULL && cpu_get_type(cputag_get_cpu(machine, "genesis_snd_z80")) == CPU_Z80)
{
/* the following ensures that the Z80 begins without running away from 0 */
/* 0x76 is just a forced 'halt' as soon as the CPU is initially run */
genesis_z80_ram[0] = 0x76;
genesis_z80_ram[0x38] = 0x76;
cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
z80running = 0;
}
logerror("Machine init\n");
/* set the first scanline 0 timer to go off */
scan_timer = timer_alloc(machine, vdp_reload_counter, NULL);
timer_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 320), 0);
}
READ16_HANDLER ( genesis_68k_to_z80_r )
{
offset *= 2;
offset &= 0x7fff;
/* Shared Ram */
if ((offset >= 0x0000) && (offset <= 0x3fff))
{
offset &=0x1fff;
// logerror("soundram_r returning %x\n",(gen_z80_shared[offset] << 8) + gen_z80_shared[offset+1]);
return (genesis_z80_ram[offset] << 8) + genesis_z80_ram[offset+1];
}
/* YM2610 */
if ((offset >= 0x4000) && (offset <= 0x5fff))
{
if (ACCESSING_BITS_0_7)
offset += 1;
return ym3438_r(devtag_get_device(space->machine, "ym"), offset);
}
/* Bank Register */
if ((offset >= 0x6000) && (offset <= 0x60ff))
{
}
/* Unused / Illegal */
if ((offset >= 0x6100) && (offset <= 0x7eff))
{
/* nothing */
}
/* VDP */
if ((offset >= 0x7f00) && (offset <= 0x7fff))
{
}
return 0x0000;
}
WRITE16_HANDLER ( genesis_68k_to_z80_w )
{
offset *= 2;
offset &= 0x7fff;
/* Shared Ram */
if ((offset >= 0x0000) && (offset <= 0x3fff))
{
offset &=0x1fff;
if (ACCESSING_BITS_0_7) genesis_z80_ram[offset+1] = data & 0xff;
if (ACCESSING_BITS_8_15) genesis_z80_ram[offset] = (data >> 8) & 0xff;
}
/* YM2612 */
if ((offset >= 0x4000) && (offset <= 0x5fff))
{
const device_config *ym = devtag_get_device(space->machine, "ym");
switch (offset & 3)
{
case 0:
if (ACCESSING_BITS_8_15) ym3438_control_port_a_w (ym, 0, (data >> 8) & 0xff);
else ym3438_data_port_a_w (ym, 0, (data >> 0) & 0xff);
break;
case 2:
if (ACCESSING_BITS_8_15) ym3438_control_port_b_w (ym, 0, (data >> 8) & 0xff);
else ym3438_data_port_b_w (ym, 0, (data >> 0) & 0xff);
break;
}
}
/* Bank Register */
if ((offset >= 0x6000) && (offset <= 0x60ff))
{
}
/* Unused / Illegal */
if ((offset >= 0x6100) && (offset <= 0x7eff))
{
/* nothing */
}
/* VDP */
if ((offset >= 0x7f00) && (offset <= 0x7fff))
{
offset &= 0x1f;
if ( (offset >= 0x10) && (offset <=0x17) )
{
const device_config *sn = devtag_get_device(space->machine, "sn");
if (ACCESSING_BITS_0_7) sn76496_w(sn, 0, data & 0xff);
if (ACCESSING_BITS_8_15) sn76496_w(sn, 0, (data >>8) & 0xff);
}
}
}
/* Gen I/O */
/*
cgfm info
$A10001 Version
$A10003 Port A data
$A10005 Port B data
$A10007 Port C data
$A10009 Port A control
$A1000B Port B control
$A1000D Port C control
$A1000F Port A TxData
$A10011 Port A RxData
$A10013 Port A serial control
$A10015 Port B TxData
$A10017 Port B RxData
$A10019 Port B serial control
$A1001B Port C TxData
$A1001D Port C RxData
$A1001F Port C serial control
*/
#if 0
static ADDRESS_MAP_START( genesis_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x3fffff) AM_ROM /* Cartridge Program Rom */
AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
AM_RANGE(0xa10000, 0xa1001f) AM_READWRITE(genesis_io_r, genesis_io_w) AM_BASE(&genesis_io_ram) /* Genesis Input */
AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w) /* VDP Access */
AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(3) /* Main Ram */
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram) /* Main Ram */
ADDRESS_MAP_END
#endif
/* Z80 Sound Hardware - based on MESS code, to be improved, it can do some strange things */
static WRITE8_HANDLER ( genesis_bank_select_w ) /* note value will be meaningless unless all bits are correctly set in */
{
if (offset !=0 ) return;
// if (!z80running) logerror("undead Z80 latch write!\n");
if (z80_latch_bitcount == 0) z80_68000_latch = 0;
z80_68000_latch = z80_68000_latch | ((( ((UINT8)data) & 0x01) << (15+z80_latch_bitcount)));
logerror("value %x written to latch\n", data);
z80_latch_bitcount++;
if (z80_latch_bitcount == 9)
{
z80_latch_bitcount = 0;
logerror("latch set, value %x\n", z80_68000_latch);
}
}
READ8_HANDLER ( genesis_z80_r )
{
offset += 0x4000;
/* YM2610 */
if ((offset >= 0x4000) && (offset <= 0x5fff))
{
return ym3438_r(devtag_get_device(space->machine, "ym"), offset);
}
/* Bank Register */
if ((offset >= 0x6000) && (offset <= 0x60ff))
{
}
/* Unused / Illegal */
if ((offset >= 0x6100) && (offset <= 0x7eff))
{
/* nothing */
}
/* VDP */
if ((offset >= 0x7f00) && (offset <= 0x7fff))
{
}
return 0x00;
}
WRITE8_HANDLER ( genesis_z80_w )
{
offset += 0x4000;
/* YM2610 */
if ((offset >= 0x4000) && (offset <= 0x5fff))
{
ym3438_w(devtag_get_device(space->machine, "ym"), offset & 3, data);
}
/* Bank Register */
if ((offset >= 0x6000) && (offset <= 0x60ff))
{
genesis_bank_select_w(space, offset & 0xff, data);
}
/* Unused / Illegal */
if ((offset >= 0x6100) && (offset <= 0x7eff))
{
/* nothing */
}
/* VDP */
if ((offset >= 0x7f00) && (offset <= 0x7fff))
{
}
}
READ8_HANDLER ( genesis_z80_bank_r )
{
int address = (z80_68000_latch) + (offset & 0x7fff);
const UINT8 *base = memory_region(space->machine, "soundcpu");
if (!z80running) logerror("undead Z80->68000 read!\n");
if (z80_latch_bitcount != 0) logerror("reading whilst latch being set!\n");
logerror("z80 read from address %x\n", address);
/* Read the data out of the 68k ROM */
if (base != NULL && address < 0x400000) return base[BYTE_XOR_BE(address)];
/* else read the data out of the 68k RAM */
// else if (address > 0xff0000) return genesis_68k_ram[BYTE_XOR_BE(offset)];
return -1;
}
#if 0
static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
// AM_RANGE(0x8000, 0xffff) AM_WRITE(genesis_z80_bank_w)
ADDRESS_MAP_END
static MACHINE_DRIVER_START( genesis_base )
/*basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
MDRV_CPU_PROGRAM_MAP(genesis_map)
MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, MASTER_CLOCK / 15)
MDRV_CPU_PROGRAM_MAP(genesis_z80_map)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
MDRV_QUANTUM_TIME(HZ(6000))
MDRV_MACHINE_START(genesis)
MDRV_MACHINE_RESET(genesis)
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(342,262)
MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
MDRV_PALETTE_LENGTH(2048)
MDRV_VIDEO_START(genesis)
MDRV_VIDEO_UPDATE(genesis)
/* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD("ym", YM3438, MASTER_CLOCK/7)
MDRV_SOUND_ROUTE(0, "mono", 0.50)
MDRV_SOUND_ROUTE(1, "mono", 0.50)
MACHINE_DRIVER_END
#endif

251
src/mame/drivers/hshavoc.c
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@ -40,85 +40,7 @@ Unfortunately it's read protected.
#include "sound/2612intf.h" #include "sound/2612intf.h"
#include "sound/sn76496.h" #include "sound/sn76496.h"
#include "genesis.h" #include "megadriv.h"
#define MASTER_CLOCK 53693100
/* This should be replaced by the implementation in megadriv.c or by specific input code */
static UINT16 *genesis_io_ram;
static int z80running;
static WRITE16_HANDLER( genesis_io_w )
{
// logerror ("write io offset :%02x data %04x PC: 0x%06x\n",offset,data,cpu_get_previouspc(space->cpu));
switch (offset)
{
case 0x00:
/*??*/
break;
case 0x01:/* port A data */
case 0x02: /* port B data */
case 0x03: /* port C data */
genesis_io_ram[offset] = (data & (genesis_io_ram[offset + 3])) | (genesis_io_ram[offset] & ~(genesis_io_ram[offset + 3]));
break;
case 0x04: /* port A control */
case 0x05: /* port B control */
case 0x06: /* port C control */
case 0x07: /* port A TxData */
genesis_io_ram[offset] = data;
break;
default:
genesis_io_ram[offset] = data;
}
}
static WRITE16_HANDLER( genesis_ctrl_w )
{
data &= mem_mask;
/* logerror("genesis_ctrl_w %x, %x\n", offset, data); */
switch (offset)
{
case 0: /* set DRAM mode... we have to ignore this for production cartridges */
return;
case 0x80: /* Z80 BusReq */
if (data == 0x100)
{
z80running = 0;
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE); /* halt Z80 */
/* logerror("z80 stopped by 68k BusReq\n"); */
}
else
{
z80running = 1;
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, CLEAR_LINE);
/* logerror("z80 started, BusReq ends\n"); */
}
return;
case 0x100: /* Z80 CPU Reset */
if (data == 0x00)
{
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_RESET, PULSE_LINE);
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
/* logerror("z80 reset, ram is %p\n", &genesis_z80_ram[0]); */
z80running = 0;
return;
}
else
{
/* logerror("z80 out of reset\n"); */
}
return;
}
}
static INPUT_PORTS_START( hshavoc ) static INPUT_PORTS_START( hshavoc )
PORT_START("IN0") /* 16bit */ PORT_START("IN0") /* 16bit */
@ -172,76 +94,6 @@ static INPUT_PORTS_START( hshavoc )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END INPUT_PORTS_END
static ADDRESS_MAP_START( topshoot_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* Cartridge Program Rom */
AM_RANGE(0x200000, 0x201fff) AM_WRITENOP // tested
AM_RANGE(0x202000, 0x2023ff) AM_RAM // tested
AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram) /* Genesis Input */
AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w) /* VDP Access */
AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(3)
AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(4)
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram) /* Main Ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
// AM_RANGE(0x8000, 0xffff) AM_WRITE(genesis_z80_bank_w)
ADDRESS_MAP_END
static MACHINE_DRIVER_START( genesis_base )
/*basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK / 15)
MDRV_CPU_PROGRAM_MAP(genesis_z80_map)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
MDRV_QUANTUM_TIME(HZ(6000))
MDRV_MACHINE_START(genesis)
MDRV_MACHINE_RESET(genesis)
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(342,262)
MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
MDRV_PALETTE_LENGTH(64)
MDRV_VIDEO_START(genesis)
MDRV_VIDEO_UPDATE(genesis)
/* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD("ym", YM3438, MASTER_CLOCK/7)
MDRV_SOUND_ROUTE(0, "mono", 0.50)
MDRV_SOUND_ROUTE(1, "mono", 0.50)
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( hshavoc )
/* basic machine hardware */
MDRV_IMPORT_FROM( genesis_base )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(topshoot_map)
/* sound hardware */
MDRV_SOUND_ADD("sn", SN76496, MASTER_CLOCK/15)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_DRIVER_END
ROM_START( hshavoc ) ROM_START( hshavoc )
ROM_REGION( 0x200000, "maincpu", 0 ) ROM_REGION( 0x200000, "maincpu", 0 )
@ -261,22 +113,9 @@ ROM_START( hshavoc2 ) /* Genesis Version, for reference */
ROM_REGION( 0x200000, "maincpu", 0 ) ROM_REGION( 0x200000, "maincpu", 0 )
ROM_LOAD( "hsh.rom", 0x000000, 0x100000, CRC(17be551c) SHA1(0dc1969098716ba332978b89356f62961417682b) ) ROM_LOAD( "hsh.rom", 0x000000, 0x100000, CRC(17be551c) SHA1(0dc1969098716ba332978b89356f62961417682b) )
ROM_END ROM_END
#endif #endif
static READ16_HANDLER( vdp_fake_r )
{
return mame_rand(space->machine);
}
static DRIVER_INIT(genesis)
{
/* hack -- fix vdp emulation instead */
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r);
memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") );
memory_set_bankptr(machine, 4, genesis_68k_ram );
}
static DRIVER_INIT(hshavoc) static DRIVER_INIT(hshavoc)
{ {
@ -285,8 +124,7 @@ static DRIVER_INIT(hshavoc)
static const UINT16 typedat[16] = { static const UINT16 typedat[16] = {
1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,
1,0,0,1, 1,0,1,1 1,0,0,1, 1,0,1,1 };
};
/* this decryption is wrong / incomplete, maybe it uses slightly different decryption for opcodes / data */ /* this decryption is wrong / incomplete, maybe it uses slightly different decryption for opcodes / data */
/* I think the PIC that exists on the PCB controls a state-based encryption... there is a large amount /* I think the PIC that exists on the PCB controls a state-based encryption... there is a large amount
@ -297,61 +135,57 @@ static DRIVER_INIT(hshavoc)
int rom_size = 0xe8000; int rom_size = 0xe8000;
for (x=0;x<rom_size/2;x++) for (x = 0; x < rom_size / 2; x++)
{ {
src[x] = BITSWAP16(src[x], src[x] = BITSWAP16(src[x],
7, 15,6, 14, 7, 15,6, 14,
5, 2, 1, 10, 5, 2, 1, 10,
13,4, 12,3, 13,4, 12,3,
11,0, 8, 9 11,0, 8, 9 );
);
if (typedat[x & 0xf] == 1)
src[x] = src[x] ^ 0x0501;
else
src[x] = src[x] ^ 0x0406;
if (typedat[x&0xf]==1) src[x] = src[x]^0x0501; if (src[x] & 0x0400)
else src[x] = src[x]^0x0406; src[x] ^= 0x0200;
if (typedat[x & 0xf] == 0)
if(src[x]&0x0400) src[x]^=0x0200;
if (typedat[x&0xf]==0)
{ {
if(src[x]&0x0100) src[x]^=0x0004; if (src[x] & 0x0100)
src[x] ^= 0x0004;
src[x] = BITSWAP16(src[x], 15,14,13,12, src[x] = BITSWAP16(src[x], 15,14,13,12,
11,9, 10,8, 11,9, 10,8,
7, 6, 5, 4, 7, 6, 5, 4,
3, 2, 1, 0); 3, 2, 1, 0 );
} }
} }
/* START e? from e80000 to end you need THIS ALONE to match the genesis rom */ /* START e? from e80000 to end you need THIS ALONE to match the genesis rom */
for (x=rom_size/2;x<0x100000/2;x++) for (x = rom_size / 2; x < 0x100000 / 2; x++)
{ {
src[x] = BITSWAP16(src[x], src[x] = BITSWAP16(src[x],
7, 15,6, 14, 7, 15,6, 14,
5, 2, 1, 10, 5, 2, 1, 10,
13,4, 12,3, 13,4, 12,3,
11,0, 8, 9 11,0, 8, 9 );
);
src[x] = BITSWAP16(src[x], src[x] = BITSWAP16(src[x],
15, 14,13, 12, 15,14,13,12,
11, 10, 9, 2, 11,10,9, 2,
7,6, 5,4, 7, 6, 5, 4,
3,8, 0, 1 3, 8, 0, 1 );
);
} }
/* EMD e80000 - end */ /* EMD e80000 - end */
src[0]^=0x0107; src[0] ^= 0x0107;
src[1]^=0x0107; src[1] ^= 0x0107;
src[2]^=0x0107; src[2] ^= 0x0107;
src[3]^=0x0707; //? 0701 not 0107 .. conditional 0x600 extra xor?, different 'typemap' ?? src[3] ^= 0x0707; //? 0701 not 0107 .. conditional 0x600 extra xor?, different 'typemap' ??
/* I'm pretty sure c42 is where the startup code is located, comparing genesis version /* I'm pretty sure c42 is where the startup code is located, comparing genesis version
and this there is at least one jump in the genesis version to the startup code which and this there is at least one jump in the genesis version to the startup code which
@ -360,38 +194,37 @@ static DRIVER_INIT(hshavoc)
there are several blocks of code like this, all appear to end with a normal rts instruction there are several blocks of code like this, all appear to end with a normal rts instruction
tho... tho...
*/ */
for (x=0xc42/2;x<0xc9a/2;x++) for (x = 0xc42 / 2; x < 0xc9a / 2; x++)
{ {
src[x]^=0x0107; //? seems conditional.. src[x] ^= 0x0107; //? seems conditional..
src[x] = BITSWAP16(src[x], src[x] = BITSWAP16(src[x],
15, 13,14, 12, 15,13,14,12,
11, 10, 9, 0, 11,10,9, 0,
8,6, 5,4, 8, 6, 5, 4,
3,2, 1, 7 3, 2, 1, 7 ); // probably wrong
); // probably wrong
src[x]^=0x0001; // wrong..
src[x] ^= 0x0001; // wrong..
} }
/* Uncommented until actively worked on /* Uncommented until actively worked on
{ {
FILE*FP; FILE*FP;
FP=fopen("hshavoc.dump","wb"); FP = fopen("hshavoc.dump", "wb");
fwrite(src, rom_size/2, 2, FP); fwrite(src, rom_size / 2, 2, FP);
fclose(FP); fclose(FP);
} }
*/ */
memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x201fff, 0, 0, SMH_NOP);
DRIVER_INIT_CALL(genesis); DRIVER_INIT_CALL(megadriv);
} }
GAME( 1993, hshavoc, 0, hshavoc, hshavoc, hshavoc, ROT0, "Data East", "High Seas Havoc",GAME_NOT_WORKING ) GAME( 1993, hshavoc, 0, md_bootleg, hshavoc, hshavoc, ROT0, "Data East", "High Seas Havoc",GAME_NOT_WORKING )
//GAME( 1993, hshavoc2, hshavoc, hshavoc, hshavoc, genesis, ROT0, "Data East", "High Seas Havoc (Genesis ROM)",GAME_NOT_WORKING ) //GAME( 1993, hshavoc2, hshavoc, md_bootleg, hshavoc, genesis, ROT0, "Data East", "High Seas Havoc (Genesis ROM)",GAME_NOT_WORKING )

144
src/mame/drivers/megadriv.c
View File

@ -78,12 +78,6 @@ On SegaC2 the VDP never turns on the IRQ6 enable register
#define MEGADRIV_VDP_VRAM(address) megadrive_vdp_vram[(address)&0x7fff] #define MEGADRIV_VDP_VRAM(address) megadrive_vdp_vram[(address)&0x7fff]
/* the same on all systems? */
#define MASTER_CLOCK_NTSC 53693175
#define MASTER_CLOCK_PAL 53203424
#define SEGACD_CLOCK 12500000
#define HAZE_MD 0 // to make appear / disappear the Region DipSwitch #define HAZE_MD 0 // to make appear / disappear the Region DipSwitch
/* timing details */ /* timing details */
@ -1390,7 +1384,7 @@ READ16_HANDLER( megadriv_vdp_r )
return retvalue; return retvalue;
} }
static READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read) READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read)
{ {
//mame_printf_debug("megadriv_68k_YM2612_read %02x %04x\n",offset,mem_mask); //mame_printf_debug("megadriv_68k_YM2612_read %02x %04x\n",offset,mem_mask);
if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) ) if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) )
@ -1408,7 +1402,7 @@ static READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read)
static WRITE8_DEVICE_HANDLER( megadriv_68k_YM2612_write) WRITE8_DEVICE_HANDLER( megadriv_68k_YM2612_write)
{ {
//mame_printf_debug("megadriv_68k_YM2612_write %02x %04x %04x\n",offset,data,mem_mask); //mame_printf_debug("megadriv_68k_YM2612_write %02x %04x %04x\n",offset,data,mem_mask);
if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) ) if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) )
@ -1802,7 +1796,7 @@ static UINT8 megadrive_io_read_sctrl_port(int portnum)
} }
static READ16_HANDLER( megadriv_68k_io_read ) READ16_HANDLER( megadriv_68k_io_read )
{ {
UINT8 retdata; UINT8 retdata;
@ -1920,7 +1914,7 @@ static void megadrive_io_write_sctrl_port(running_machine *machine, int portnum,
} }
static WRITE16_HANDLER( megadriv_68k_io_write ) WRITE16_HANDLER( megadriv_68k_io_write )
{ {
// mame_printf_debug("IO Write #%02x data %04x mem_mask %04x\n",offset,data,mem_mask); // mame_printf_debug("IO Write #%02x data %04x mem_mask %04x\n",offset,data,mem_mask);
@ -1969,30 +1963,30 @@ static WRITE16_HANDLER( megadriv_68k_io_write )
static ADDRESS_MAP_START( megadriv_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( megadriv_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000 , 0x3fffff) AM_ROM AM_RANGE(0x000000, 0x3fffff) AM_ROM
/* (0x000000 - 0x3fffff) == GAME ROM (4Meg Max, Some games have special banking too) */ /* (0x000000 - 0x3fffff) == GAME ROM (4Meg Max, Some games have special banking too) */
AM_RANGE(0xa00000 , 0xa01fff) AM_READWRITE(megadriv_68k_read_z80_ram,megadriv_68k_write_z80_ram) AM_RANGE(0xa00000, 0xa01fff) AM_READWRITE(megadriv_68k_read_z80_ram,megadriv_68k_write_z80_ram)
AM_RANGE(0xa02000 , 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram) AM_RANGE(0xa02000, 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram)
AM_RANGE(0xa04000 , 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read,megadriv_68k_YM2612_write, 0xffff) AM_RANGE(0xa04000, 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read,megadriv_68k_YM2612_write, 0xffff)
AM_RANGE(0xa06000 , 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write) AM_RANGE(0xa06000, 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write)
AM_RANGE(0xa10000 , 0xa1001f) AM_READWRITE(megadriv_68k_io_read,megadriv_68k_io_write) AM_RANGE(0xa10000, 0xa1001f) AM_READWRITE(megadriv_68k_io_read,megadriv_68k_io_write)
AM_RANGE(0xa11100 , 0xa11101) AM_READWRITE(megadriv_68k_check_z80_bus,megadriv_68k_req_z80_bus) AM_RANGE(0xa11100, 0xa11101) AM_READWRITE(megadriv_68k_check_z80_bus,megadriv_68k_req_z80_bus)
AM_RANGE(0xa11200 , 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset) AM_RANGE(0xa11200, 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset)
/* these are fake - remove allocs in VIDEO_START to use these to view ram instead */ /* these are fake - remove allocs in VIDEO_START to use these to view ram instead */
// AM_RANGE(0xb00000 , 0xb0ffff) AM_RAM AM_BASE(&megadrive_vdp_vram) // AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&megadrive_vdp_vram)
// AM_RANGE(0xb10000 , 0xb1007f) AM_RAM AM_BASE(&megadrive_vdp_vsram) // AM_RANGE(0xb10000, 0xb1007f) AM_RAM AM_BASE(&megadrive_vdp_vsram)
// AM_RANGE(0xb10100 , 0xb1017f) AM_RAM AM_BASE(&megadrive_vdp_cram) // AM_RANGE(0xb10100, 0xb1017f) AM_RAM AM_BASE(&megadrive_vdp_cram)
AM_RANGE(0xc00000 , 0xc0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w) AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w)
AM_RANGE(0xd00000 , 0xd0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w) // the earth defend AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w) // the earth defend
AM_RANGE(0xe00000 , 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram) AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
// AM_RANGE(0xff0000 , 0xffffff) AM_READ(SMH_RAM) // AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)
/* 0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */ /* 0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2308,68 +2302,54 @@ static READ8_HANDLER( megadriv_z80_unmapped_read )
} }
static ADDRESS_MAP_START( megadriv_z80_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( megadriv_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000 , 0x1fff) AM_RAMBANK(1) AM_MIRROR(0x2000) // RAM can be accessed by the 68k AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_MIRROR(0x2000) // RAM can be accessed by the 68k
AM_RANGE(0x4000 , 0x4003) AM_DEVREADWRITE("ym", ym2612_r,ym2612_w) AM_RANGE(0x4000, 0x4003) AM_DEVREADWRITE("ym", ym2612_r,ym2612_w)
AM_RANGE(0x6000 , 0x6000) AM_WRITE(megadriv_z80_z80_bank_w) AM_RANGE(0x6000, 0x6000) AM_WRITE(megadriv_z80_z80_bank_w)
AM_RANGE(0x6001 , 0x6001) AM_WRITE(megadriv_z80_z80_bank_w) // wacky races uses this address AM_RANGE(0x6001, 0x6001) AM_WRITE(megadriv_z80_z80_bank_w) // wacky races uses this address
AM_RANGE(0x6100 , 0x7eff) AM_READ(megadriv_z80_unmapped_read) AM_RANGE(0x6100, 0x7eff) AM_READ(megadriv_z80_unmapped_read)
AM_RANGE(0x7f00 , 0x7fff) AM_READWRITE(megadriv_z80_vdp_read,megadriv_z80_vdp_write) AM_RANGE(0x7f00, 0x7fff) AM_READWRITE(megadriv_z80_vdp_read,megadriv_z80_vdp_write)
AM_RANGE(0x8000 , 0xffff) AM_READWRITE(z80_read_68k_banked_data,z80_write_68k_banked_data) // The Z80 can read the 68k address space this way AM_RANGE(0x8000, 0xffff) AM_READWRITE(z80_read_68k_banked_data,z80_write_68k_banked_data) // The Z80 can read the 68k address space this way
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( megadriv_z80_io_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( megadriv_z80_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x0000 , 0xff) AM_NOP AM_RANGE(0x0000, 0xff) AM_NOP
ADDRESS_MAP_END ADDRESS_MAP_END
/***************************** Megaplay *****************************/ /************************************ Megadrive Bootlegs *************************************/
/* Megaplay BIOS handles regs[2] at start in a different way. */
/* other io data/ctrl regs are dealt with exactly like in megadrive */
READ8_HANDLER( megaplay_bios_6402_r ) // smaller ROM region because some bootlegs check for RAM there
{ static ADDRESS_MAP_START( md_bootleg_map, ADDRESS_SPACE_PROGRAM, 16 )
return megadrive_io_data_regs[2];// & 0xfe; AM_RANGE(0x000000, 0x0fffff) AM_ROM /* Cartridge Program Rom */
} AM_RANGE(0x200000, 0x2023ff) AM_RAM // tested
WRITE8_HANDLER( megaplay_bios_6402_w ) AM_RANGE(0xa00000, 0xa01fff) AM_READWRITE(megadriv_68k_read_z80_ram, megadriv_68k_write_z80_ram)
{ AM_RANGE(0xa02000, 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram)
megadrive_io_data_regs[2] = (megadrive_io_data_regs[2] & 0x07) | ((data & 0x70) >> 1); AM_RANGE(0xa04000, 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read, megadriv_68k_YM2612_write, 0xffff)
// logerror("BIOS: 0x6402 write: 0x%02x\n", data); AM_RANGE(0xa06000, 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write)
}
READ8_HANDLER( megaplay_bios_6204_r ) AM_RANGE(0xa10000, 0xa1001f) AM_READWRITE(megadriv_68k_io_read, megadriv_68k_io_write)
{ AM_RANGE(0xa11100, 0xa11101) AM_READWRITE(megadriv_68k_check_z80_bus, megadriv_68k_req_z80_bus)
return (megadrive_io_data_regs[2]); AM_RANGE(0xa11200, 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset)
// return (mplay_bios.bios_width & 0xf8) + (mplay_bios.bios_6204 & 0x07);
}
WRITE8_HANDLER( megaplay_bios_width_w ) AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(megadriv_vdp_r, megadriv_vdp_w)
{ AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(megadriv_vdp_r, megadriv_vdp_w) // the earth defend
mplay_bios.bios_width = data;
megadrive_io_data_regs[2] = (megadrive_io_data_regs[2] & 0x07) | ((data & 0xf8));
// logerror("BIOS: 0x6204 - Width write: %02x\n", data);
}
WRITE16_HANDLER( megaplay_io_write ) AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
{ ADDRESS_MAP_END
if (offset == 0x03)
megadrive_io_data_regs[2] = (data & megadrive_io_ctrl_regs[2]) | (megadrive_io_data_regs[2] & ~megadrive_io_ctrl_regs[2]); MACHINE_DRIVER_START( md_bootleg )
else MDRV_IMPORT_FROM(megadriv)
megadriv_68k_io_write(space, offset & 0x1f, data, 0xffff);
} MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(md_bootleg_map)
MACHINE_DRIVER_END
READ16_HANDLER( megaplay_io_read )
{
if (offset == 0x03)
return megadrive_io_data_regs[2];
else
return megadriv_68k_io_read(space, offset & 0x1f, 0xffff);
}
/****************************************** 32X related ******************************************/ /****************************************** 32X related ******************************************/
@ -3377,7 +3357,7 @@ static ADDRESS_MAP_START( sh2_slave_map, ADDRESS_SPACE_PROGRAM, 32 )
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( segacd_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( segacd_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0000000 , 0x0003fff) AM_RAM AM_RANGE(0x0000000, 0x0003fff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -3679,19 +3659,19 @@ static READ16_HANDLER( svp_68k_cell2_r )
} }
static ADDRESS_MAP_START( svp_ssp_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( svp_ssp_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0000 , 0x03ff) AM_ROMBANK(3) AM_RANGE(0x0000, 0x03ff) AM_ROMBANK(3)
AM_RANGE(0x0400 , 0xffff) AM_ROMBANK(4) AM_RANGE(0x0400, 0xffff) AM_ROMBANK(4)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( svp_ext_map, ADDRESS_SPACE_IO, 16 ) static ADDRESS_MAP_START( svp_ext_map, ADDRESS_SPACE_IO, 16 )
ADDRESS_MAP_GLOBAL_MASK(0xf) ADDRESS_MAP_GLOBAL_MASK(0xf)
AM_RANGE(0*2 , 0*2+1) AM_READWRITE(read_PM0, write_PM0) AM_RANGE(0*2, 0*2+1) AM_READWRITE(read_PM0, write_PM0)
AM_RANGE(1*2 , 1*2+1) AM_READWRITE(read_PM1, write_PM1) AM_RANGE(1*2, 1*2+1) AM_READWRITE(read_PM1, write_PM1)
AM_RANGE(2*2 , 2*2+1) AM_READWRITE(read_PM2, write_PM2) AM_RANGE(2*2, 2*2+1) AM_READWRITE(read_PM2, write_PM2)
AM_RANGE(3*2 , 3*2+1) AM_READWRITE(read_XST, write_XST) AM_RANGE(3*2, 3*2+1) AM_READWRITE(read_XST, write_XST)
AM_RANGE(4*2 , 4*2+1) AM_READWRITE(read_PM4, write_PM4) AM_RANGE(4*2, 4*2+1) AM_READWRITE(read_PM4, write_PM4)
AM_RANGE(6*2 , 6*2+1) AM_READWRITE(read_PMC, write_PMC) AM_RANGE(6*2, 6*2+1) AM_READWRITE(read_PMC, write_PMC)
AM_RANGE(7*2 , 7*2+1) AM_READWRITE(read_AL, write_AL) AM_RANGE(7*2, 7*2+1) AM_READWRITE(read_AL, write_AL)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -6640,8 +6620,8 @@ GAME( 1994, 32x_bios, 0, genesis_32x, megadriv, _32x, ROT
GAME( 1994, segacd, 0, genesis_scd, megadriv, megadriv,ROT0, "Sega", "Sega-CD Model 2 BIOS V2.11 (U)", GAME_NOT_WORKING ) GAME( 1994, segacd, 0, genesis_scd, megadriv, megadriv,ROT0, "Sega", "Sega-CD Model 2 BIOS V2.11 (U)", GAME_NOT_WORKING )
GAME( 1994, 32x_scd, 0, genesis_32x_scd, megadriv, _32x, ROT0, "Sega", "Sega-CD Model 2 BIOS V2.11 (U) (with 32X)", GAME_NOT_WORKING ) GAME( 1994, 32x_scd, 0, genesis_32x_scd, megadriv, _32x, ROT0, "Sega", "Sega-CD Model 2 BIOS V2.11 (U) (with 32X)", GAME_NOT_WORKING )
GAME( 1994, g_virr, 0, megdsvp, megadriv, megadriv, ROT0, "Sega", "Virtua Racing (U) [!]", 0 ) GAME( 1994, g_virr, 0, megdsvp, megadriv, megadriv, ROT0, "Sega", "Virtua Racing (U) [!]", 0 )
GAME( 1994, g_virrj , g_virr, megdsvp, megadriv, megadrij, ROT0, "Sega", "Virtua Racing (J) [!]", 0 ) GAME( 1994, g_virrj, g_virr, megdsvp, megadriv, megadrij, ROT0, "Sega", "Virtua Racing (J) [!]", 0 )
GAME( 1994, g_virre , g_virr, megdsvppal, megadriv, megadrie, ROT0, "Sega", "Virtua Racing (E) [!]", 0 ) GAME( 1994, g_virre, g_virr, megdsvppal, megadriv, megadrie, ROT0, "Sega", "Virtua Racing (E) [!]", 0 )
GAME( 1994, g_virrea, g_virr, megdsvppal, megadriv, megadrie, ROT0, "Sega", "Virtua Racing (E) [a1]", 0 ) GAME( 1994, g_virrea, g_virr, megdsvppal, megadriv, megadrie, ROT0, "Sega", "Virtua Racing (E) [a1]", 0 )
#endif #endif

41
src/mame/drivers/megadriv.h
View File

@ -1,3 +1,8 @@
#define MASTER_CLOCK_NTSC 53693175
#define MASTER_CLOCK_PAL 53203424
#define SEGACD_CLOCK 12500000
extern DRIVER_INIT( megadriv_c2 ); extern DRIVER_INIT( megadriv_c2 );
extern DRIVER_INIT( megadrie ); extern DRIVER_INIT( megadrie );
extern DRIVER_INIT( megadriv ); extern DRIVER_INIT( megadriv );
@ -20,6 +25,7 @@ MACHINE_DRIVER_EXTERN( genesis_32x );
MACHINE_DRIVER_EXTERN( genesis_32x_pal ); MACHINE_DRIVER_EXTERN( genesis_32x_pal );
MACHINE_DRIVER_EXTERN( genesis_scd ); MACHINE_DRIVER_EXTERN( genesis_scd );
MACHINE_DRIVER_EXTERN( genesis_32x_scd ); MACHINE_DRIVER_EXTERN( genesis_32x_scd );
MACHINE_DRIVER_EXTERN( md_bootleg ); // for topshoot.c & hshavoc.c
extern UINT16* megadriv_backupram; extern UINT16* megadriv_backupram;
extern int megadriv_backupram_length; extern int megadriv_backupram_length;
@ -29,24 +35,32 @@ extern void megadriv_stop_scanline_timer(void);
void megatech_set_megadrive_z80_as_megadrive_z80(running_machine *machine, const char* tag); void megatech_set_megadrive_z80_as_megadrive_z80(running_machine *machine, const char* tag);
extern READ8_HANDLER (megatech_sms_ioport_dc_r); extern READ8_HANDLER( megatech_sms_ioport_dc_r );
extern READ8_HANDLER (megatech_sms_ioport_dd_r); extern READ8_HANDLER( megatech_sms_ioport_dd_r );
extern READ16_HANDLER( megadriv_vdp_r ); extern READ16_HANDLER( megadriv_vdp_r );
extern WRITE16_HANDLER( megadriv_vdp_w ); extern WRITE16_HANDLER( megadriv_vdp_w );
/* These handlers are needed by megaplay.c */
extern READ16_HANDLER( megadriv_68k_io_read );
extern WRITE16_HANDLER( megadriv_68k_io_write );
/* These handlers are needed by puckpkmn.c for his memory map */
extern READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read);
extern WRITE8_DEVICE_HANDLER( megadriv_68k_YM2612_write);
/* These are needed to create external input handlers (see e.g. MESS) */
/* Regs are also used by Megaplay! */
extern UINT8 (*megadrive_io_read_data_port_ptr)(running_machine *machine, int offset);
extern void (*megadrive_io_write_data_port_ptr)(running_machine *machine, int offset, UINT16 data);
extern UINT8 megadrive_io_data_regs[3];
extern UINT8 megadrive_io_ctrl_regs[3];
MACHINE_RESET( megadriv ); MACHINE_RESET( megadriv );
VIDEO_START( megadriv ); VIDEO_START( megadriv );
VIDEO_UPDATE( megadriv ); VIDEO_UPDATE( megadriv );
VIDEO_EOF( megadriv ); VIDEO_EOF( megadriv );
/* Needed to create external input handlers (see e.g. MESS) */
extern UINT8 (*megadrive_io_read_data_port_ptr)(running_machine *machine, int offset);
extern void (*megadrive_io_write_data_port_ptr)(running_machine *machine, int offset, UINT16 data);
extern UINT8 megadrive_io_data_regs[3];
extern UINT8 megadrive_io_ctrl_regs[3];
extern UINT16* megadrive_vdp_palette_lookup; extern UINT16* megadrive_vdp_palette_lookup;
extern UINT16* megadrive_vdp_palette_lookup_sprite; // for C2 extern UINT16* megadrive_vdp_palette_lookup_sprite; // for C2
@ -61,16 +75,9 @@ extern int genesis_always_irq6;
extern int genesis_other_hacks; extern int genesis_other_hacks;
// megaplay & megatech /* Megaplay - Megatech specific */
/* It might be possible to move the following structs in the drivers */
READ8_HANDLER( megaplay_bios_6402_r );
WRITE8_HANDLER( megaplay_bios_6402_w );
READ8_HANDLER( megaplay_bios_6204_r );
WRITE8_HANDLER( megaplay_bios_width_w );
WRITE16_HANDLER( megaplay_io_write );
READ16_HANDLER( megaplay_io_read );
/* Megaplay BIOS specific */
#define MP_ROM 0x10 #define MP_ROM 0x10
#define MP_GAME 0 #define MP_GAME 0

42
src/mame/drivers/megaplay.c
View File

@ -417,6 +417,21 @@ static WRITE8_HANDLER( megaplay_bios_gamesel_w )
mplay_bios.bios_mode = data & 0x10; mplay_bios.bios_mode = data & 0x10;
} }
static WRITE16_HANDLER( megaplay_io_write )
{
if (offset == 0x03)
megadrive_io_data_regs[2] = (data & megadrive_io_ctrl_regs[2]) | (megadrive_io_data_regs[2] & ~megadrive_io_ctrl_regs[2]);
else
megadriv_68k_io_write(space, offset & 0x1f, data, 0xffff);
}
static READ16_HANDLER( megaplay_io_read )
{
if (offset == 0x03)
return megadrive_io_data_regs[2];
else
return megadriv_68k_io_read(space, offset & 0x1f, 0xffff);
}
static READ8_HANDLER( bank_r ) static READ8_HANDLER( bank_r )
{ {
@ -490,6 +505,33 @@ static WRITE8_HANDLER( bank_w )
} }
/* Megaplay BIOS handles regs[2] at start in a different way compared to megadrive */
/* other io data/ctrl regs are dealt with exactly like in the console */
static READ8_HANDLER( megaplay_bios_6402_r )
{
return megadrive_io_data_regs[2];// & 0xfe;
}
static WRITE8_HANDLER( megaplay_bios_6402_w )
{
megadrive_io_data_regs[2] = (megadrive_io_data_regs[2] & 0x07) | ((data & 0x70) >> 1);
// logerror("BIOS: 0x6402 write: 0x%02x\n", data);
}
static READ8_HANDLER( megaplay_bios_6204_r )
{
return (megadrive_io_data_regs[2]);
// return (mplay_bios.bios_width & 0xf8) + (mplay_bios.bios_6204 & 0x07);
}
static WRITE8_HANDLER( megaplay_bios_width_w )
{
mplay_bios.bios_width = data;
megadrive_io_data_regs[2] = (megadrive_io_data_regs[2] & 0x07) | ((data & 0xf8));
// logerror("BIOS: 0x6204 - Width write: %02x\n", data);
}
static READ8_HANDLER( megaplay_bios_6404_r ) static READ8_HANDLER( megaplay_bios_6404_r )
{ {
// logerror("BIOS: 0x6404 read: returned 0x%02x\n",bios_6404 | (bios_6403 & 0x10) >> 4); // logerror("BIOS: 0x6404 read: returned 0x%02x\n",bios_6404 | (bios_6403 & 0x10) >> 4);

70
src/mame/drivers/puckpkmn.c
View File

@ -48,14 +48,10 @@ Notes:
#include "sound/sn76496.h" #include "sound/sn76496.h"
#include "sound/2612intf.h" #include "sound/2612intf.h"
#include "genesis.h" #include "megadriv.h"
#define MASTER_CLOCK 53693100
static UINT16* main_ram;
/* Puckman Pockimon Input Ports */ /* Puckman Pockimon Input Ports */
static INPUT_PORTS_START( puckpkmn ) static INPUT_PORTS_START( puckpkmn )
PORT_START("P2") /* $700011.b */ PORT_START("P2") /* $700011.b */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
@ -131,73 +127,40 @@ INPUT_PORTS_END
static ADDRESS_MAP_START( puckpkmn_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( puckpkmn_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x1fffff) AM_ROM /* Main 68k Program Roms */ AM_RANGE(0x000000, 0x1fffff) AM_ROM /* Main 68k Program Roms */
AM_RANGE(0x700010, 0x700011) AM_READ_PORT("P2") AM_RANGE(0x700010, 0x700011) AM_READ_PORT("P2")
AM_RANGE(0x700012, 0x700013) AM_READ_PORT("P1") AM_RANGE(0x700012, 0x700013) AM_READ_PORT("P1")
AM_RANGE(0x700014, 0x700015) AM_READ_PORT("UNK") AM_RANGE(0x700014, 0x700015) AM_READ_PORT("UNK")
AM_RANGE(0x700016, 0x700017) AM_READ_PORT("DSW1") AM_RANGE(0x700016, 0x700017) AM_READ_PORT("DSW1")
AM_RANGE(0x700018, 0x700019) AM_READ_PORT("DSW2") AM_RANGE(0x700018, 0x700019) AM_READ_PORT("DSW2")
AM_RANGE(0x700022, 0x700023) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff) /* M6295 Sound Chip Status Register/Writes */ AM_RANGE(0x700022, 0x700023) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
AM_RANGE(0xa04000, 0xa04003) AM_DEVREADWRITE8("ym", ym3438_r,ym3438_w, 0xffff) /* Ym3438 Sound Chip Status Register */ AM_RANGE(0xa04000, 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read, megadriv_68k_YM2612_write, 0xffff)
AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r,genesis_vdp_w) /* VDP Access */ AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(megadriv_vdp_r, megadriv_vdp_w)
AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(1) /* VDP sees the roms here */ AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(2) /* VDP sees the ram here */
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&main_ram) /* Main Ram */
/* Unknown reads/writes: */ /* Unknown reads/writes: */
AM_RANGE(0xa00000, 0xa00551) AM_WRITENOP /* ? */ AM_RANGE(0xa00000, 0xa00551) AM_WRITENOP /* ? */
// AM_RANGE(0xa10000, 0xa10001) AM_READNOP /* ? once */ // AM_RANGE(0xa10000, 0xa10001) AM_READNOP /* ? once */
AM_RANGE(0xa10002, 0xa10005) AM_NOP /* ? alternative way of reading inputs ? */ AM_RANGE(0xa10002, 0xa10005) AM_NOP /* ? alternative way of reading inputs ? */
AM_RANGE(0xa11100, 0xa11101) AM_NOP /* ? */ AM_RANGE(0xa11100, 0xa11101) AM_NOP /* ? */
// AM_RANGE(0xa10008, 0xa1000d) AM_WRITENOP /* ? once */ // AM_RANGE(0xa10008, 0xa1000d) AM_WRITENOP /* ? once */
// AM_RANGE(0xa14000, 0xa14003) AM_WRITENOP /* ? once */ // AM_RANGE(0xa14000, 0xa14003) AM_WRITENOP /* ? once */
AM_RANGE(0xa11200, 0xa11201) AM_WRITENOP /* ? */ AM_RANGE(0xa11200, 0xa11201) AM_WRITENOP /* ? */
ADDRESS_MAP_END ADDRESS_MAP_END
static const ym3438_interface ym3438_intf =
{
genesis_irq2_interrupt /* IRQ handler */
};
static MACHINE_DRIVER_START( puckpkmn ) static MACHINE_DRIVER_START( puckpkmn )
MDRV_IMPORT_FROM( megadriv )
/* basic machine hardware */ MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_ADD("maincpu",M68000, MASTER_CLOCK/7) /*???*/
MDRV_CPU_PROGRAM_MAP(puckpkmn_map) MDRV_CPU_PROGRAM_MAP(puckpkmn_map)
MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
MDRV_MACHINE_START(genesis) MDRV_DEVICE_REMOVE("genesis_snd_z80")
MDRV_MACHINE_RESET(genesis)
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(342,262)
MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
MDRV_PALETTE_LENGTH(64)
MDRV_VIDEO_START(genesis)
MDRV_VIDEO_UPDATE(genesis)
/* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD("ym", YM3438, MASTER_CLOCK/7)
MDRV_SOUND_CONFIG(ym3438_intf)
MDRV_SOUND_ROUTE(0, "mono", 0.50)
MDRV_SOUND_ROUTE(1, "mono", 0.50)
MDRV_SOUND_ADD("sn", SN76496, MASTER_CLOCK/15)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
/* sound hardware */
MDRV_SOUND_ADD("oki", OKIM6295, 1056000) MDRV_SOUND_ADD("oki", OKIM6295, 1056000)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker",0.25)
MACHINE_DRIVER_END MACHINE_DRIVER_END
/* Genie's Hardware (contains no real sega parts) */ /* Genie's Hardware (contains no real sega parts) */
@ -283,8 +246,7 @@ static DRIVER_INIT( puckpkmn )
for (i = 0; i < len; i++) for (i = 0; i < len; i++)
rom[i] = BITSWAP8(rom[i],1,4,2,0,7,5,3,6); rom[i] = BITSWAP8(rom[i],1,4,2,0,7,5,3,6);
memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") ); // VDP reads the roms from here DRIVER_INIT_CALL(megadriv);
memory_set_bankptr(machine, 2, main_ram ); // VDP reads the ram from here
} }
ROM_START( puckpkmn ) /* Puckman Pockimon (c)2000 Genie */ ROM_START( puckpkmn ) /* Puckman Pockimon (c)2000 Genie */

171
src/mame/drivers/topshoot.c
View File

@ -1,4 +1,3 @@
/* /*
Sun Mixing board, looks like a hacked up Genesis clone. Sun Mixing board, looks like a hacked up Genesis clone.
@ -139,84 +138,7 @@ connector, but of course, I can be wrong.
#include "sound/sn76496.h" #include "sound/sn76496.h"
#include "sound/2612intf.h" #include "sound/2612intf.h"
#include "genesis.h" #include "megadriv.h"
/* This should be replaced by the implementation in megadriv.c or by specific input code */
static UINT16 *genesis_io_ram;
static int z80running;
static WRITE16_HANDLER( genesis_io_w )
{
// logerror ("write io offset :%02x data %04x PC: 0x%06x\n",offset,data,cpu_get_previouspc(space->cpu));
switch (offset)
{
case 0x00:
/*??*/
break;
case 0x01:/* port A data */
case 0x02: /* port B data */
case 0x03: /* port C data */
genesis_io_ram[offset] = (data & (genesis_io_ram[offset + 3])) | (genesis_io_ram[offset] & ~(genesis_io_ram[offset + 3]));
break;
case 0x04: /* port A control */
case 0x05: /* port B control */
case 0x06: /* port C control */
case 0x07: /* port A TxData */
genesis_io_ram[offset] = data;
break;
default:
genesis_io_ram[offset] = data;
}
}
static WRITE16_HANDLER( genesis_ctrl_w )
{
data &= mem_mask;
/* logerror("genesis_ctrl_w %x, %x\n", offset, data); */
switch (offset)
{
case 0: /* set DRAM mode... we have to ignore this for production cartridges */
return;
case 0x80: /* Z80 BusReq */
if (data == 0x100)
{
z80running = 0;
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE); /* halt Z80 */
/* logerror("z80 stopped by 68k BusReq\n"); */
}
else
{
z80running = 1;
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, CLEAR_LINE);
/* logerror("z80 started, BusReq ends\n"); */
}
return;
case 0x100: /* Z80 CPU Reset */
if (data == 0x00)
{
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_RESET, PULSE_LINE);
cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
/* logerror("z80 reset, ram is %p\n", &genesis_z80_ram[0]); */
z80running = 0;
return;
}
else
{
/* logerror("z80 out of reset\n"); */
}
return;
}
}
static INPUT_PORTS_START( topshoot ) /* Top Shooter Input Ports */ static INPUT_PORTS_START( topshoot ) /* Top Shooter Input Ports */
PORT_START("IN0") /* 16bit */ PORT_START("IN0") /* 16bit */
@ -270,82 +192,6 @@ static INPUT_PORTS_START( topshoot ) /* Top Shooter Input Ports */
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END INPUT_PORTS_END
static ADDRESS_MAP_START( topshoot_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* Cartridge Program Rom */
// AM_RANGE(0x200000, 0x20007f) AM_RAM
AM_RANGE(0x200000, 0x2023ff) AM_RAM // tested
AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN0") // ??
AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram) /* Genesis Input */
AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
AM_RANGE(0xa10000, 0xa1001f) AM_READ_PORT("IN0")
AM_RANGE(0xa11100, 0xa11101) AM_READ_PORT("IN0") // ??
AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w) /* VDP Access */
AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(3)
AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(4)
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram)/* Main Ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r) //AM_WRITE(genesis_z80_bank_w)
ADDRESS_MAP_END
static MACHINE_DRIVER_START( genesis_base )
/*basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK / 15)
MDRV_CPU_PROGRAM_MAP(genesis_z80_map)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
MDRV_QUANTUM_TIME(HZ(6000))
MDRV_MACHINE_START(genesis)
MDRV_MACHINE_RESET(genesis)
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(342,262)
MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
MDRV_PALETTE_LENGTH(64)
MDRV_VIDEO_START(genesis)
MDRV_VIDEO_UPDATE(genesis)
/* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD("ym", YM3438, MASTER_CLOCK/7)
MDRV_SOUND_ROUTE(0, "mono", 0.50)
MDRV_SOUND_ROUTE(1, "mono", 0.50)
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( topshoot )
/* basic machine hardware */
MDRV_IMPORT_FROM( genesis_base )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(topshoot_map)
/* video hardware */
MDRV_VIDEO_START(genesis)
MDRV_SCREEN_MODIFY("screen")
MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 223)
/* sound hardware */
MDRV_SOUND_ADD("sn", SN76496, MASTER_CLOCK/15)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_DRIVER_END
ROM_START( topshoot ) /* Top Shooter (c)1995 Sun Mixing */ ROM_START( topshoot ) /* Top Shooter (c)1995 Sun Mixing */
ROM_REGION( 0x200000, "maincpu", 0 ) ROM_REGION( 0x200000, "maincpu", 0 )
@ -353,20 +199,15 @@ ROM_START( topshoot ) /* Top Shooter (c)1995 Sun Mixing */
ROM_LOAD16_BYTE( "tc574000ad_u12_1.bin", 0x000001, 0x080000, CRC(e826f6ad) SHA1(23ec8bb608f954d3b915f061e7076c0c63b8259e) ) ROM_LOAD16_BYTE( "tc574000ad_u12_1.bin", 0x000001, 0x080000, CRC(e826f6ad) SHA1(23ec8bb608f954d3b915f061e7076c0c63b8259e) )
ROM_END ROM_END
static READ16_HANDLER( vdp_fake_r )
{
return mame_rand(space->machine);
}
static DRIVER_INIT(topshoot) static DRIVER_INIT(topshoot)
{ {
/* hack -- fix vdp emulation instead */ /* set up preliminary input ports (not working yet!) */
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r); memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400004, 0x400005, 0, 0, "IN0"); //correct?
memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa11100, 0xa11101, 0, 0, "IN0"); //correct?
memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") ); DRIVER_INIT_CALL(megadriv);
memory_set_bankptr(machine, 4, genesis_68k_ram );
} }
/* Sun Mixing Hardware, very close to actual Genesis */ /* Sun Mixing Hardware, very close to actual Genesis */
GAME( 1995, topshoot, 0, topshoot, topshoot, topshoot, ROT0, "Sun Mixing", "Top Shooter",GAME_NOT_WORKING ) GAME( 1995, topshoot, 0, md_bootleg, topshoot, topshoot, ROT0, "Sun Mixing", "Top Shooter",GAME_NOT_WORKING )

19
src/mame/includes/genesis.h
View File

@ -1,19 +1,5 @@
/* Todo, reorganise, cleanup etc.*/ /* Todo, reorganise, cleanup etc.*/
/*----------- defined in drivers/genesis.c -----------*/
extern UINT8 *genesis_z80_ram;
extern UINT16 *genesis_68k_ram;
extern MACHINE_START( genesis );
extern MACHINE_RESET( genesis );
extern READ8_HANDLER ( genesis_z80_r );
extern READ8_HANDLER ( genesis_z80_bank_r );
extern WRITE8_HANDLER ( genesis_z80_w );
extern WRITE16_HANDLER ( genesis_68k_to_z80_w );
extern READ16_HANDLER ( genesis_68k_to_z80_r );
extern INTERRUPT_GEN( genesis_vblank_interrupt );
extern void genesis_irq2_interrupt(const device_config *device, int state);
/*----------- defined in video/genesis.c -----------*/ /*----------- defined in video/genesis.c -----------*/
extern UINT8 genesis_vdp_regs[]; extern UINT8 genesis_vdp_regs[];
@ -21,13 +7,8 @@ extern UINT16 genesis_bg_pal_lookup[];
extern UINT16 genesis_sp_pal_lookup[]; extern UINT16 genesis_sp_pal_lookup[];
VIDEO_START( genesis ); VIDEO_START( genesis );
VIDEO_START( segac2 );
VIDEO_UPDATE( genesis ); VIDEO_UPDATE( genesis );
VIDEO_UPDATE( segac2 );
VIDEO_UPDATE( megaplay );
void segac2_enable_display(running_machine *machine, int enable);
void system18_vdp_start(running_machine *machine); void system18_vdp_start(running_machine *machine);
void system18_vdp_update(bitmap_t *bitmap, const rectangle *cliprect); void system18_vdp_update(bitmap_t *bitmap, const rectangle *cliprect);

2
src/mame/mame.mak
View File

@ -1103,7 +1103,7 @@ $(MAMEOBJ)/sega.a: \
$(DRIVERS)/coolridr.o \ $(DRIVERS)/coolridr.o \
$(DRIVERS)/deniam.o $(VIDEO)/deniam.o \ $(DRIVERS)/deniam.o $(VIDEO)/deniam.o \
$(DRIVERS)/dotrikun.o $(VIDEO)/dotrikun.o \ $(DRIVERS)/dotrikun.o $(VIDEO)/dotrikun.o \
$(DRIVERS)/genesis.o $(VIDEO)/genesis.o \ $(VIDEO)/genesis.o \
$(DRIVERS)/gpworld.o \ $(DRIVERS)/gpworld.o \
$(DRIVERS)/hikaru.o \ $(DRIVERS)/hikaru.o \
$(DRIVERS)/hshavoc.o \ $(DRIVERS)/hshavoc.o \