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https://github.com/holub/mame
synced 2025-07-07 19:03:29 +03:00
z80: Change refresh callback to write8 [smf]
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@ -503,7 +503,7 @@ READ8_MEMBER(hp9895_device::phi_reg_r)
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return (uint8_t)reg;
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}
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WRITE16_MEMBER(hp9895_device::z80_m1_w)
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WRITE8_MEMBER(hp9895_device::z80_m1_w)
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{
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// Every M1 cycle of Z80 clears the IRQ line
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if (m_cpu_irq) {
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@ -886,7 +886,7 @@ MACHINE_CONFIG_START(hp9895_device::device_add_mconfig)
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MCFG_CPU_ADD("cpu" , Z80 , 4000000)
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MCFG_CPU_PROGRAM_MAP(z80_program_map)
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MCFG_CPU_IO_MAP(z80_io_map)
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MCFG_Z80_SET_REFRESH_CALLBACK(WRITE16(hp9895_device , z80_m1_w))
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MCFG_Z80_SET_REFRESH_CALLBACK(WRITE8(hp9895_device , z80_m1_w))
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MCFG_DEVICE_ADD("phi" , PHI , 0)
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MCFG_PHI_EOI_WRITE_CB(WRITELINE(hp9895_device , phi_eoi_w))
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@ -65,7 +65,7 @@ private:
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DECLARE_WRITE_LINE_MEMBER(phi_int_w);
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// Z80 IRQ
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DECLARE_WRITE16_MEMBER(z80_m1_w);
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DECLARE_WRITE8_MEMBER(z80_m1_w);
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// Floppy interface
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DECLARE_WRITE8_MEMBER(data_w);
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@ -481,7 +481,7 @@ inline uint8_t z80_device::rop()
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PC++;
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uint8_t res = m_decrypted_opcodes_direct->read_byte(pc);
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m_icount -= 2;
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m_refresh_cb((m_i << 8) | (m_r2 & 0x80) | ((m_r-1) & 0x7f));
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m_refresh_cb((m_i << 8) | (m_r2 & 0x80) | ((m_r-1) & 0x7f), 0x00, 0xff);
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m_icount += 2;
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return res;
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}
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@ -247,7 +247,7 @@ protected:
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direct_read_data<0> *m_direct;
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direct_read_data<0> *m_decrypted_opcodes_direct;
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devcb_write_line m_irqack_cb;
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devcb_write16 m_refresh_cb;
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devcb_write8 m_refresh_cb;
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devcb_write_line m_halt_cb;
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PAIR m_prvpc;
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@ -324,7 +324,7 @@ MACHINE_CONFIG_START(zx_state::zx80)
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MCFG_CPU_PROGRAM_MAP(zx80_map)
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MCFG_CPU_IO_MAP(zx80_io_map)
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MCFG_CPU_OPCODES_MAP(ula_map)
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MCFG_Z80_SET_REFRESH_CALLBACK(WRITE16(zx_state, refresh_w))
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MCFG_Z80_SET_REFRESH_CALLBACK(WRITE8(zx_state, refresh_w))
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(XTAL(6'500'000)/2/64159.0) // 54223 for NTSC
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@ -50,7 +50,7 @@ public:
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DECLARE_READ8_MEMBER(ula_high_r);
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DECLARE_READ8_MEMBER(ula_low_r);
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DECLARE_WRITE16_MEMBER(refresh_w);
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DECLARE_WRITE8_MEMBER(refresh_w);
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DECLARE_READ8_MEMBER(zx80_io_r);
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DECLARE_READ8_MEMBER(zx81_io_r);
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DECLARE_READ8_MEMBER(pc8300_io_r);
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@ -50,11 +50,11 @@ void zx_state::zx_ula_hsync()
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recalc_hsync();
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}
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WRITE16_MEMBER(zx_state::refresh_w)
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WRITE8_MEMBER(zx_state::refresh_w)
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{
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if((data ^ m_prev_refresh) & 0x40)
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m_maincpu->set_input_line(INPUT_LINE_IRQ0, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
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m_prev_refresh = data;
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if((offset ^ m_prev_refresh) & 0x40)
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m_maincpu->set_input_line(INPUT_LINE_IRQ0, offset & 0x40 ? CLEAR_LINE : ASSERT_LINE);
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m_prev_refresh = offset;
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if(m_ula_char_buffer != 0xffff) {
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uint64_t time = m_maincpu->total_cycles();
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int x = 2*((time-m_base_vsync_clock) % 207);
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@ -63,7 +63,7 @@ WRITE16_MEMBER(zx_state::refresh_w)
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if(m_region_gfx1)
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pixels = m_region_gfx1->base()[((m_ula_char_buffer & 0x3f) << 3) | (m_ypos & 7)];
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else
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pixels = m_program->read_byte((data & 0xfe00) | ((m_ula_char_buffer & 0x3f) << 3) | (m_ypos & 7));
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pixels = m_program->read_byte((offset & 0xfe00) | ((m_ula_char_buffer & 0x3f) << 3) | (m_ypos & 7));
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if(m_ula_char_buffer & 0x80)
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pixels = ~pixels;
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if(x < 384-8 && y < 311) {
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