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https://github.com/holub/mame
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dsp16: Few more opcodes & spaces->tabs. (nw)
This commit is contained in:
Andrew Gardner
parent
62753a82b6
commit
a5c451ab17
@ -31,6 +31,7 @@ const device_type DSP16 = &device_creator<dsp16_device>;
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dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: cpu_device(mconfig, DSP16, "DSP16", tag, owner, clock),
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m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1),
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m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1),
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m_i(0),
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m_pc(0),
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m_pt(0),
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@ -62,10 +63,11 @@ dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, devic
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m_cacheRedoNextPC(CACHE_INVALID),
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m_cacheIterations(0),
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m_program(NULL),
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m_data(NULL),
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m_direct(NULL),
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m_icount(0)
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{
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// Allocate & setup
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// Allocate & setup
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}
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@ -140,6 +142,7 @@ void dsp16_device::device_start()
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// get our address spaces
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m_program = &space(AS_PROGRAM);
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m_data = &space(AS_DATA);
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m_direct = &m_program->direct();
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// set our instruction counter
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@ -178,7 +181,9 @@ void dsp16_device::device_reset()
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const address_space_config *dsp16_device::memory_space_config(address_spacenum spacenum) const
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{
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return (spacenum == AS_PROGRAM) ? &m_program_config : NULL;
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return (spacenum == AS_PROGRAM) ? &m_program_config :
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(spacenum == AS_DATA) ? &m_data_config :
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NULL;
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}
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@ -242,14 +247,14 @@ offs_t dsp16_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
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MEMORY ACCESSORS
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***************************************************************************/
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inline UINT32 dsp16_device::program_read(UINT32 addr)
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inline UINT32 dsp16_device::data_read(const UINT16& addr)
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{
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return m_program->read_dword(addr << 1);
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return m_data->read_word(addr << 1);
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}
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inline void dsp16_device::program_write(UINT32 addr, UINT32 data)
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inline void dsp16_device::data_write(const UINT16& addr, const UINT16& data)
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{
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m_program->write_dword(addr << 1, data & 0xffff);
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m_data->write_word(addr << 1, data & 0xffff);
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}
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inline UINT32 dsp16_device::opcode_read(const UINT8 pcOffset)
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@ -312,11 +317,9 @@ void dsp16_device::execute_run()
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// instruction fetch & execute
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UINT8 cycles;
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INT16 pcAdvance;
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UINT8 pcAdvance;
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const UINT16 op = opcode_read();
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printf("%d ", m_cacheIterations);
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execute_one(op, cycles, pcAdvance);
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printf("%d\n", m_cacheIterations);
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// step
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m_pc += pcAdvance;
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@ -51,6 +51,7 @@ protected:
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// address spaces
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const address_space_config m_program_config;
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const address_space_config m_data_config;
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// CPU registers
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// ROM Address Arithmetic Unit (XAAU)
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@ -83,7 +84,7 @@ protected:
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UINT16 m_sioc;
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UINT16 m_pioc;
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// internal stuff
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// internal stuff
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UINT16 m_ppc;
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// This core handles the cache as more of a loop than 15 seperate memory elements.
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@ -95,23 +96,29 @@ protected:
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static const UINT16 CACHE_INVALID = 0xffff;
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// memory access
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inline UINT32 program_read(UINT32 addr);
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inline void program_write(UINT32 addr, UINT32 data);
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inline UINT32 data_read(const UINT16& addr);
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inline void data_write(const UINT16& addr, const UINT16& data);
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inline UINT32 opcode_read(const UINT8 pcOffset=0);
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// address spaces
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address_space* m_program;
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direct_read_data* m_direct;
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address_space* m_program;
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address_space* m_data;
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direct_read_data* m_direct;
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// other internal states
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int m_icount;
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int m_icount;
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// operations
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void execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance);
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void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
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// table decoders
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void* registerFromRImmediateField(const UINT8& R);
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void* registerFromRTable(const UINT8& R);
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void* registerFromYFieldUpper(const UINT8& Y);
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// execution
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void executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S);
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void executeYFieldPost(const UINT8& Y);
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// helpers
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void* addressYL();
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File diff suppressed because it is too large
Load Diff
@ -103,10 +103,92 @@ void* dsp16_device::registerFromRTable(const UINT8 &R)
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}
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void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance)
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void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
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{
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// Where is the first operation being written?
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//UINT64* destinationReg = NULL;
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//switch (D)
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//{
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// case 0x00: destinationReg = &m_a0;
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// case 0x01: destinationReg = &m_a1;
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// default: break;
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//}
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// Which source is being used?
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//UINT64* sourceReg = NULL;
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//switch (S)
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//{
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// case 0x00: sourceReg = &m_a0;
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// case 0x01: sourceReg = &m_a1;
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// default: break;
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//}
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switch (F1)
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{
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case 0x00: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x01: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x02: m_p = (INT32)((INT16)m_x * (INT16)m_y); break;
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case 0x03: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x04: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x05: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x06: /* nop */ break;
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case 0x07: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x08: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x09: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0a: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0b: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0c: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0d: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0e: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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case 0x0f: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
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}
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}
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void* dsp16_device::registerFromYFieldUpper(const UINT8& Y)
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{
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UINT16* destinationReg = NULL;
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const UINT8 N = (Y & 0x0c) >> 2;
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switch (N)
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{
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case 0x00: destinationReg = &m_r0; break;
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case 0x01: destinationReg = &m_r1; break;
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case 0x02: destinationReg = &m_r2; break;
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case 0x03: destinationReg = &m_r3; break;
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default: break;
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}
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return destinationReg;
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}
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void dsp16_device::executeYFieldPost(const UINT8& Y)
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{
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UINT16* opReg = NULL;
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const UINT8 N = (Y & 0x0c) >> 2;
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switch (N)
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{
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case 0x00: opReg = &m_r0; break;
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case 0x01: opReg = &m_r1; break;
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case 0x02: opReg = &m_r2; break;
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case 0x03: opReg = &m_r3; break;
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default: break;
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}
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const UINT8 lower = Y & 0x03;
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switch (lower)
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{
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case 0x00: /* nop */ break;
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case 0x01: (*opReg)++; break;
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case 0x02: (*opReg)--; break;
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case 0x03: (*opReg) += m_j; break;
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}
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}
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void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance)
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{
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cycles = 1;
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pcAdvance = 1;
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pcAdvance = 0;
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const UINT8 opcode = (op >> 11) & 0x1f;
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switch(opcode)
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@ -114,11 +196,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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// Format 1: Multiply/ALU Read/Write Group
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case 0x06:
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{
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// F1, Y
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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// F1, Y : (page 3-38)
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const UINT8 Y = (op & 0x000f);
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const UINT8 S = (op & 0x0200) >> 9;
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const UINT8 D = (op & 0x0400) >> 10;
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const UINT8 F1 = (op & 0x01e0) >> 5;
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executeF1Field(F1, D, S);
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executeYFieldPost(Y);
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cycles = 1;
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pcAdvance = 1;
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break;
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}
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case 0x04: case 0x1c:
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@ -171,12 +257,25 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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}
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case 0x14:
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{
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// F1, Y = y[1]
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 X = (op & 0x0010) >> 4;
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//const UINT8 S = (op & 0x0200) >> 9;
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//const UINT8 D = (op & 0x0400) >> 10;
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//const UINT8 F1 = (op & 0x01e0) >> 5;
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// F1, Y = y[1] : (page 3-53)
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const UINT8 Y = (op & 0x000f);
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const UINT8 X = (op & 0x0010) >> 4;
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const UINT8 S = (op & 0x0200) >> 9;
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const UINT8 D = (op & 0x0400) >> 10;
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const UINT8 F1 = (op & 0x01e0) >> 5;
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executeF1Field(F1, D, S);
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UINT16* destinationReg = (UINT16*)registerFromYFieldUpper(Y);
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UINT16 yRegValue = 0x0000;
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switch (X)
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{
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case 0x00: yRegValue = (m_y & 0x0000ffff); break;
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case 0x01: yRegValue = (m_y & 0xffff0000) >> 16; break;
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default: break;
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}
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data_write(*destinationReg, yRegValue);
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executeYFieldPost(Y);
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cycles = 2;
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pcAdvance = 1;
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break;
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}
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@ -240,7 +339,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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// Format 4: Branch Direct Group
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case 0x00: case 0x01:
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{
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// goto JA
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// goto JA : (page 3-20)
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const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
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m_pc = JA;
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cycles = 2;
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@ -250,8 +349,12 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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case 0x10: case 0x11:
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{
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// call JA
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//const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
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// call JA : (page 3-23)
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const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
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m_pr = m_pc + 1;
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m_pc = JA;
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cycles = 2;
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pcAdvance = 0;
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break;
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}
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@ -295,9 +398,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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}
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case 0x0c:
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{
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// Y = R
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//const UINT8 Y = (op & 0x000f);
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//const UINT8 R = (op & 0x03f0) >> 4;
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// Y = R : (page 3-33)
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const UINT8 Y = (op & 0x000f);
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const UINT8 R = (op & 0x03f0) >> 4;
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UINT16* destinationReg = (UINT16*)registerFromYFieldUpper(Y);
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UINT16* sourceReg = (UINT16*)registerFromRTable(R);
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data_write(*destinationReg, *sourceReg);
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executeYFieldPost(Y);
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cycles = 2;
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pcAdvance = 1;
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break;
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}
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case 0x0d:
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@ -311,7 +420,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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// Format 8: Data Move (immediate operand - 2 words)
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case 0x0a:
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{
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// R = N
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// R = N : (page 3-28)
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const UINT8 R = (op & 0x03f0) >> 4;
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const UINT16 iVal = opcode_read(1);
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void* reg = registerFromRTable(R);
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@ -324,19 +433,20 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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// Format 9: Short Immediate Group
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case 0x02: case 0x03:
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{
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// R = M
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// R = M : (page 3-27)
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const INT8 M = (op & 0x00ff);
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const UINT8 R = (op & 0x0e00) >> 9;
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void* reg = registerFromRImmediateField(R);
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writeRegister(reg, (INT16)M); // Sign extend 8 bit int
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cycles = 1;
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pcAdvance = 1;
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break;
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}
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// Format 10: do - redo
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case 0x0e:
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{
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// do|redo K
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// do|redo K : (pages 3-25 & 3-26)
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const UINT8 K = (op & 0x007f);
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const UINT8 NI = (op & 0x0780) >> 7;
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if (NI != 0)
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@ -344,16 +454,19 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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// Do
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m_cacheStart = m_pc + 1;
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m_cacheEnd = m_pc + NI + 1;
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m_cacheIterations = K+1;
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m_cacheIterations = K-1; // -1 because we check the counter below
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cycles = 1;
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pcAdvance = 1;
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}
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else
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{
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// Redo
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m_cacheIterations = K+1;
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m_cacheIterations = K-1; // -1 because we check the counter below
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m_cacheRedoNextPC = m_pc + 1;
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pcAdvance = m_cacheStart - m_pc;
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m_pc = m_cacheStart;
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pcAdvance = 0;
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cycles = 2;
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pcAdvance = 1;
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}
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break;
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}
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@ -375,13 +488,15 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, INT16& pcAdvance
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if (m_cacheIterations == 0 && m_cacheRedoNextPC != CACHE_INVALID)
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{
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// You've reached the end of a cache loop after a redo opcode.
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pcAdvance = m_cacheRedoNextPC - m_pc;
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m_pc = m_cacheRedoNextPC;
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m_cacheRedoNextPC = CACHE_INVALID;
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pcAdvance = 0;
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}
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if (m_cacheIterations > 0 && (m_pc+pcAdvance == m_cacheEnd))
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{
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// A regular iteration on a cached loop.
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m_cacheIterations--;
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pcAdvance = m_cacheStart - m_pc;
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m_pc = m_cacheStart;
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pcAdvance = 0;
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}
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}
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