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apple3 updates: [Rob Justice, R. Belmont]

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- Fix missed typo in the BIOS loading
- Update slot IRQ handling
- Start infrastructure to allow emulating the Titan cards
This commit is contained in:
arbee 2020-09-22 08:10:20 -04:00
parent d4c180e81f
commit a6190a0b28
3 changed files with 61 additions and 6 deletions
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6
src/mame/drivers/apple3.cpp
View File

@ -103,7 +103,7 @@ void apple3_state::apple3(machine_config &config)
m_a2bus->set_space(m_maincpu, AS_PROGRAM);
m_a2bus->irq_w().set(FUNC(apple3_state::a2bus_irq_w));
m_a2bus->nmi_w().set(FUNC(apple3_state::a2bus_nmi_w));
//m_a2bus->inh_w().set(FUNC(apple3_state::a2bus_inh_w));
m_a2bus->inh_w().set(FUNC(apple3_state::a2bus_inh_w));
m_a2bus->dma_w().set_inputline(m_maincpu, INPUT_LINE_HALT);
A2BUS_SLOT(config, "sl1", m_a2bus, apple3_cards, nullptr);
A2BUS_SLOT(config, "sl2", m_a2bus, apple3_cards, nullptr);
@ -357,10 +357,10 @@ INPUT_PORTS_END
ROM_START(apple3)
ROM_REGION(0x1000,"maincpu",0)
ROM_SYSTEM_BIOS(0, "original", "Apple /// boot ROM")
ROMX_LOAD( "apple3.rom", 0x0000, 0x1000, CRC(55e8eec9) SHA1(579ee4cd2b208d62915a0aa482ddc2744ff5e967), ROM_BIOS(1))
ROMX_LOAD( "apple3.rom", 0x0000, 0x1000, CRC(55e8eec9) SHA1(579ee4cd2b208d62915a0aa482ddc2744ff5e967), ROM_BIOS(0))
ROM_SYSTEM_BIOS(1, "soshd", "Rob Justice SOSHDBOOT")
ROMX_LOAD( "soshdboot.bin", 0x000000, 0x001000, CRC(fd5ac9e2) SHA1(ba466a54ddb7f618c4f18f344754343c5945b417), ROM_BIOS(0))
ROMX_LOAD( "soshdboot.bin", 0x000000, 0x001000, CRC(fd5ac9e2) SHA1(ba466a54ddb7f618c4f18f344754343c5945b417), ROM_BIOS(1))
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */

3
src/mame/includes/apple3.h
View File

@ -127,6 +127,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(a2bus_irq_w);
DECLARE_WRITE_LINE_MEMBER(a2bus_nmi_w);
DECLARE_WRITE_LINE_MEMBER(vbl_w);
DECLARE_WRITE_LINE_MEMBER(a2bus_inh_w);
// these need to be public for now
uint32_t m_flags;
@ -165,6 +166,8 @@ private:
int m_pdl_charge;
int m_va, m_vb, m_vc;
int m_smoothscr;
int m_inh_state;
};
#endif // MAME_INCLUDES_APPLE3_H

58
src/mame/machine/apple3.cpp
View File

@ -189,6 +189,16 @@ uint8_t apple3_state::apple3_c0xx_r(offs_t offset)
result = (m_joybuttons->read() & 8) ? 0x80 : 0x00;
break;
case 0x64: // slot 2 IRQ status (negative logic)
case 0x6c:
result = (m_a2bus->get_a2bus_irq_mask() & (1<<2)) ? 0 : 0x80;
break;
case 0x65: // slot 1 IRQ status (negative logic)
case 0x6d:
result = (m_a2bus->get_a2bus_irq_mask() & (1<<1)) ? 0 : 0x80;
break;
case 0x66: // paddle A/D conversion done (bit 7 = 1 while counting, 0 when done)
case 0x6e:
result = m_ramp_active ? 0x80 : 0x00;
@ -646,6 +656,7 @@ void apple3_state::machine_reset()
m_analog_sel = 0;
m_ramp_active = false;
m_charwrt = false;
m_inh_state = false;
m_fdc->set_floppies_4(floppy0, floppy1, floppy2, floppy3);
@ -653,7 +664,10 @@ void apple3_state::machine_reset()
m_scanend->adjust(attotime::never);
}
WRITE_LINE_MEMBER(apple3_state::a2bus_inh_w)
{
m_inh_state = state;
}
uint8_t *apple3_state::apple3_get_indexed_addr(offs_t offset)
{
@ -691,6 +705,7 @@ void apple3_state::init_apple3()
m_vb = 0;
m_vc = 0;
m_smoothscr = 0;
m_inh_state = false;
// kludge round +12v pull up resistors, which after conversion will bring this low when nothing is plugged in. issue also affects dcd/dsr but those don't affect booting.
m_acia->write_cts(0);
@ -743,6 +758,7 @@ void apple3_state::init_apple3()
save_item(NAME(m_vc));
save_item(NAME(m_smoothscr));
save_item(NAME(m_charwrt));
save_item(NAME(m_inh_state));
}
void apple3_state::device_post_load()
@ -754,6 +770,24 @@ uint8_t apple3_state::apple3_memory_r(offs_t offset)
{
uint8_t rv = 0xff;
if (m_inh_state)
{
for (int slot = 1; slot < 4; slot++)
{
device_a2bus_card_interface *slotdevice = m_a2bus->get_a2bus_card(slot);
if (slotdevice != nullptr)
{
if ((slotdevice->inh_type() & INH_READ) == INH_READ)
{
if ((offset >= slotdevice->inh_start()) && (offset <= slotdevice->inh_end()))
{
return slotdevice->read_inh_rom(offset);
}
}
}
}
}
// (zp), y or (zp,x) read
if (!machine().side_effects_disabled())
{
@ -891,6 +925,25 @@ uint8_t apple3_state::apple3_memory_r(offs_t offset)
void apple3_state::apple3_memory_w(offs_t offset, uint8_t data)
{
if (m_inh_state)
{
for (int slot = 1; slot < 4; slot++)
{
device_a2bus_card_interface *slotdevice = m_a2bus->get_a2bus_card(slot);
if (slotdevice != nullptr)
{
if ((slotdevice->inh_type() & INH_WRITE) == INH_WRITE)
{
if ((offset >= slotdevice->inh_start()) && (offset <= slotdevice->inh_end()))
{
slotdevice->write_inh_rom(offset, data);
return;
}
}
}
}
}
if ((m_indir_bank & 0x80) && (offset >= 0x100))
{
uint8_t *test;
@ -1314,8 +1367,7 @@ WRITE_LINE_MEMBER(apple3_state::a2bus_irq_w)
{
uint8_t irq_mask = m_a2bus->get_a2bus_irq_mask();
m_via[1]->write_ca1(state);
m_via[1]->write_pa7(state);
m_via[0]->write_ca1(state);
if (irq_mask & (1<<4))
{