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https://github.com/holub/mame
synced 2025-06-26 22:29:10 +03:00
Shit ball in da house
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@ -152,7 +152,7 @@ void e0c6200_cpu_device::do_interrupt()
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// interrupt handling takes 13* cycles, plus 1 extra if cpu was halted
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// *: 12.5 on E0C6200A, does the cpu osc source change polarity or something?
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m_icount -= 13;
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if (m_halt || m_sleep)
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if (m_halt)
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m_icount--;
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m_halt = m_sleep = false;
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@ -181,7 +181,7 @@ void e0c6200_cpu_device::execute_run()
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}
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}
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// cpu halted (peripherals still run)
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// core cpu not running (peripherals still work)
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if (m_halt || m_sleep)
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{
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m_icount = 0;
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@ -1,5 +1,6 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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// E0C6200 opcode handlers
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enum
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@ -64,6 +64,9 @@ void e0c6s46_device::device_start()
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m_prgtimer_handle->adjust(attotime::never);
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// zerofill
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memset(m_port_k, 0xf, sizeof(m_port_k));
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m_dfk0 = 0xf;
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memset(m_irqflag, 0, sizeof(m_irqflag));
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memset(m_irqmask, 0, sizeof(m_irqmask));
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m_osc = 0;
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@ -89,6 +92,9 @@ void e0c6s46_device::device_start()
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m_prgtimer_reload = 0;
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// register for savestates
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save_item(NAME(m_port_k));
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save_item(NAME(m_dfk0));
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save_item(NAME(m_irqflag));
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save_item(NAME(m_irqmask));
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save_item(NAME(m_osc));
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@ -125,11 +131,8 @@ void e0c6s46_device::device_reset()
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e0c6200_cpu_device::device_reset();
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// reset interrupts
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for (int i = 0; i < 6; i++)
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{
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m_data->read_byte(0xf00+i);
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m_data->write_byte(0xf10+i, 0);
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}
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memset(m_irqflag, 0, sizeof(m_irqflag));
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memset(m_irqmask, 0, sizeof(m_irqmask));
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// reset other i/o
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m_data->write_byte(0xf41, 0xf);
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@ -186,6 +189,7 @@ bool e0c6s46_device::check_interrupt()
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// middle of handling this interrupt, irq vector may be an OR of 2 vectors
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m_irq_vector = 2*pri + 2;
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int reg = priorder[pri];
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m_irq_id = reg;
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switch (reg)
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{
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@ -200,6 +204,18 @@ bool e0c6s46_device::check_interrupt()
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return false;
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}
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void e0c6s46_device::execute_set_input(int line, int state)
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{
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// only support 8 K input lines at the moment
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if (line < 0 || line > 7)
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return;
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state = (state) ? 1 : 0;
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int port = line >> 3 & 1;
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UINT8 bit = 1 << (line & 3);
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m_port_k[port] = (m_port_k[port] & ~bit) | (state ? bit : 0);
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}
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void e0c6s46_device::clock_watchdog()
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@ -235,7 +251,7 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::clktimer_cb)
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// schedule next timeout (256hz at default clock of 32768hz)
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m_clktimer_handle->adjust(attotime::from_ticks(128, unscaled_clock()));
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// 1hz timeout also clocks the watchdog timer
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// 1hz falling edge also clocks the watchdog timer
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if (m_clktimer_count == 0)
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clock_watchdog();
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}
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@ -349,13 +365,13 @@ UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
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pixel = vram[offset] >> c & 1;
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// 16 COM(common) pins, 40 SEG(segment) pins
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int segment = offset / 2;
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int common = bank * 8 + (offset & 1) * 4 + c;
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int seg = offset / 2;
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int com = bank * 8 + (offset & 1) * 4 + c;
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if (m_pixel_update_handler != NULL)
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m_pixel_update_handler(*this, bitmap, cliprect, m_lcd_contrast, segment, common, pixel);
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else if (cliprect.contains(segment, common))
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bitmap.pix16(common, segment) = pixel;
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m_pixel_update_handler(*this, bitmap, cliprect, m_lcd_contrast, seg, com, pixel);
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else if (cliprect.contains(seg, com))
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bitmap.pix16(com, seg) = pixel;
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}
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}
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}
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@ -372,12 +388,19 @@ READ8_MEMBER(e0c6s46_device::io_r)
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{
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// irq flags are reset(acked) when read
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UINT8 flag = m_irqflag[offset];
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m_irqflag[offset] = 0;
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if (!space.debugger_access())
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m_irqflag[offset] = 0;
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return flag;
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}
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case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
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return m_irqmask[offset-0x10];
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// k input ports
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case 0x40: case 0x42:
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return m_port_k[offset >> 1 & 1];
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case 0x41:
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return m_dfk0;
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// clock timer (lo, hi)
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case 0x20: case 0x21:
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return m_clktimer_count >> (4 * (offset & 1)) & 0xf;
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@ -442,6 +465,12 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
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break;
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}
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// k input ports
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case 0x41:
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// d0-d3: K0x input port irq on 0: rising edge, 1: falling edge,
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m_dfk0 = data;
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break;
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// OSC circuit
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case 0x70:
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// d0,d1: CPU operating voltage
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@ -15,8 +15,8 @@
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e0c6s46_device::static_set_pixel_update_cb(*device, _cb);
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typedef void (*e0c6s46_pixel_update_func)(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int segment, int common, int state);
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#define E0C6S46_PIXEL_UPDATE_CB(name) void name(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int segment, int common, int state)
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typedef void (*e0c6s46_pixel_update_func)(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int seg, int com, int state);
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#define E0C6S46_PIXEL_UPDATE_CB(name) void name(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int seg, int com, int state)
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class e0c6s46_device : public e0c6200_cpu_device
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@ -38,6 +38,8 @@ protected:
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_input_lines() const { return 8; }
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virtual void execute_set_input(int line, int state);
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virtual void execute_one();
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virtual bool check_interrupt();
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@ -49,9 +51,12 @@ private:
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UINT8 m_irqmask[6];
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UINT8 m_osc;
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UINT8 m_svd;
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UINT8 m_port_k[2];
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UINT8 m_dfk0;
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UINT8 m_lcd_control;
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UINT8 m_lcd_contrast;
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e0c6s46_pixel_update_func m_pixel_update_handler;
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int m_watchdog_count;
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@ -26,6 +26,7 @@ public:
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required_device<speaker_sound_device> m_speaker;
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DECLARE_PALETTE_INIT(tama);
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DECLARE_INPUT_CHANGED_MEMBER(input_changed);
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};
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@ -37,18 +38,46 @@ PALETTE_INIT_MEMBER(tamag1_state, tama)
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}
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static E0C6S46_PIXEL_UPDATE_CB(tama_pixel_update)
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{
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static const int seg2x[0x28] =
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{
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0, 1, 2, 3, 4, 5, 6, 7,
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35, 8, 9,10,11,12,13,14,
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15,34,33,32,31,30,29,28,
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27,26,25,24,36,23,22,21,
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20,19,18,17,16,37,38,39
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};
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bitmap.pix16(com, seg2x[seg]) = state;
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}
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static INPUT_PORTS_START( tama )
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PORT_START("K0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, tamag1_state, input_changed, (void *)0)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, tamag1_state, input_changed, (void *)1)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, tamag1_state, input_changed, (void *)2)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
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INPUT_PORTS_END
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INPUT_CHANGED_MEMBER(tamag1_state::input_changed)
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{
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// Inputs are hooked up backwards here, because MCU input
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// ports are all tied to its interrupt controller.
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int line = (int)(FPTR)param;
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int state = newval ? ASSERT_LINE : CLEAR_LINE;
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m_maincpu->set_input_line(line, state);
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}
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static MACHINE_CONFIG_START( tama, tamag1_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", E0C6S46, XTAL_32_768kHz)
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// MCFG_E0C6S46_PIXEL_UPDATE_CB(tama_pixel_update)
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MCFG_E0C6S46_PIXEL_UPDATE_CB(tama_pixel_update)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", LCD)
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@ -79,7 +108,7 @@ MACHINE_CONFIG_END
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ROM_START( tama )
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ROM_REGION( 0x3000, "maincpu", 0 )
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// ROM_LOAD( "test.b", 0x0000, 0x3000, CRC(4372220e) SHA1(6e13d015113e16198c0059b9d0c38d7027ae7324) )
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ROM_LOAD( "test.b", 0x0000, 0x3000, CRC(4372220e) SHA1(6e13d015113e16198c0059b9d0c38d7027ae7324) )
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ROM_LOAD( "tama.b", 0x0000, 0x3000, CRC(5c864cb1) SHA1(4b4979cf92dc9d2fb6d7295a38f209f3da144f72) )
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ROM_END
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