mirror of
https://github.com/holub/mame
synced 2025-07-03 00:56:03 +03:00
machine/mv_sonora.cpp: Sonora/Ardbeg use an external pixel clock (PDM does not). Also fixed monochrome mode. [R. Belmont]
apple/omega.cpp: Add "Omega" programmable PLL chip to generate the pixel clock for LC III/LC 520/LC 550. [R. Belmont]
This commit is contained in:
arbee
parent
f443505d3c
commit
a7738bb241
@ -5,6 +5,11 @@
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Mac video support, "Sonora" edition
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Supports 5 different modelines at up to 16bpp
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The original Sonora ASIC and its follow-on Ardbeg require an
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external pixel clock source, while the version used in the PDM
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machines has an internal clock source that automatically is set
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appropriately for the video mode.
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*********************************************************************/
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#include "emu.h"
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@ -13,11 +18,11 @@
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DEFINE_DEVICE_TYPE(MAC_VIDEO_SONORA, mac_video_sonora_device, "mv_sonora", "Mac Sonora video support")
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const mac_video_sonora_device::modeline mac_video_sonora_device::modelines[5] = {
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{ 0x02, "512x384 12\" RGB", 15667200, 640, 16, 32, 80, 407, 1, 3, 19, true },
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{ 0x06, "640x480 13\" RGB", 31334400, 896, 80, 64, 112, 525, 3, 3, 39, true },
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{ 0x01, "640x870 15\" Portrait", 57283200, 832, 32, 80, 80, 918, 3, 3, 42, false },
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{ 0x09, "832x624 16\" RGB", 57283200, 1152, 32, 64, 224, 667, 1, 3, 39, false },
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{ 0x0b, "640x480 VGA", 25175000, 800, 16, 96, 48, 525, 10, 2, 33, false },
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{ 0x02, "512x384 12\" RGB", 15667200, 640, 16, 32, 80, 407, 1, 3, 19, true, false },
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{ 0x06, "640x480 13\" RGB", 31334400, 896, 80, 64, 112, 525, 3, 3, 39, true, false },
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{ 0x01, "640x870 15\" Portrait", 57283200, 832, 32, 80, 80, 918, 3, 3, 42, false, true },
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{ 0x09, "832x624 16\" RGB", 57283200, 1152, 32, 64, 224, 667, 1, 3, 39, false, false },
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{ 0x0b, "640x480 VGA", 25175000, 800, 16, 96, 48, 525, 10, 2, 33, false, false },
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};
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mac_video_sonora_device::mac_video_sonora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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@ -26,6 +31,7 @@ mac_video_sonora_device::mac_video_sonora_device(const machine_config &mconfig,
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m_palette(*this, "palette"),
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m_monitor_config(*this, "monitor"),
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m_screen_vblank(*this),
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m_isPDM(false),
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m_is32bit(false)
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{
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}
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@ -272,7 +278,11 @@ void mac_video_sonora_device::vctrl_w(offs_t offset, uint8_t data)
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if(m_modeline_id != -1 && m_modeline_id != prev_modeline) {
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const modeline &m = modelines[m_modeline_id];
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rectangle visarea(0, m.htot - m.hfp - m.hs - m.hbp - 1, 0, m.vtot - m.vfp - m.vs - m.vbp - 1);
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m_screen->configure(m.htot, m.vtot, visarea, attotime::from_ticks(m.htot*m.vtot, m.dotclock).as_attoseconds());
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if (m_isPDM) {
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m_screen->configure(m.htot, m.vtot, visarea, attotime::from_ticks(m.htot*m.vtot, m.dotclock).as_attoseconds());
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} else {
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m_screen->configure(m.htot, m.vtot, visarea, attotime::from_ticks(m.htot * m.vtot, m_extPixelClock).as_attoseconds());
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}
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}
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break;
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}
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@ -305,7 +315,7 @@ uint8_t mac_video_sonora_device::dac_r(offs_t offset)
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return m_pal_control;
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default:
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logerror("dac_r %x\n", offset);
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// logerror("dac_r %x\n", offset);
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return 0;
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}
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}
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@ -322,7 +332,18 @@ void mac_video_sonora_device::dac_w(offs_t offset, uint8_t data)
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switch(m_pal_idx) {
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case 0: m_palette->set_pen_red_level(m_pal_address, data); break;
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case 1: m_palette->set_pen_green_level(m_pal_address, data); break;
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case 2: m_palette->set_pen_blue_level(m_pal_address, data); break;
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case 2:
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// monochrome monitors use the blue line as the video, so duplicate blue to all 3 primaries
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if (modelines[m_modeline_id].monochrome) {
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m_palette->set_pen_red_level(m_pal_address, data);
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m_palette->set_pen_green_level(m_pal_address, data);
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m_palette->set_pen_blue_level(m_pal_address, data);
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}
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else
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{
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m_palette->set_pen_blue_level(m_pal_address, data);
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}
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break;
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}
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m_pal_idx ++;
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if(m_pal_idx == 3) {
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@ -33,6 +33,8 @@ public:
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void set_vram_base(const uint64_t *vram) { m_vram = vram; }
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void set_vram_offset(uint32_t offset) { m_vram_offset = offset; }
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void set_32bit() { m_is32bit = true; }
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void set_PDM() { m_isPDM = true; }
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void set_pixel_clock(uint32_t pclk) { m_extPixelClock = pclk; }
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protected:
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virtual void device_start() override;
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@ -48,6 +50,7 @@ private:
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uint32_t htot, hfp, hs, hbp;
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uint32_t vtot, vfp, vs, vbp;
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bool supports_16bpp;
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bool monochrome;
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};
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static const modeline modelines[5];
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@ -58,10 +61,11 @@ private:
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devcb_write_line m_screen_vblank;
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const uint64_t *m_vram;
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uint32_t m_vram_offset;
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uint32_t m_vram_offset, m_extPixelClock;
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uint8_t m_mode, m_depth, m_monitor_id, m_vtest;
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uint8_t m_pal_address, m_pal_idx, m_pal_control, m_pal_colkey;
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int m_modeline_id;
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bool m_isPDM;
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bool m_is32bit;
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uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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@ -23,6 +23,7 @@
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#include "macadb.h"
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#include "macscsi.h"
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#include "mactoolbox.h"
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#include "omega.h"
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#include "sonora.h"
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#include "bus/nscsi/cd.h"
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@ -57,6 +58,7 @@ public:
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m_ram(*this, RAM_TAG),
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m_sonora(*this, "sonora"),
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m_dfac(*this, "dfac"),
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m_omega(*this, "omega"),
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m_scsibus1(*this, "scsi"),
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m_ncr5380(*this, "scsi:7:ncr5380"),
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m_scsihelp(*this, "scsihelp"),
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@ -83,6 +85,7 @@ private:
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required_device<ram_device> m_ram;
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required_device<sonora_device> m_sonora;
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optional_device<dfac_device> m_dfac;
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required_device<omega_device> m_omega;
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required_device<nscsi_bus_device> m_scsibus1;
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required_device<ncr5380_device> m_ncr5380;
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required_device<mac_scsi_helper_device> m_scsihelp;
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@ -298,6 +301,9 @@ void macvail_state::maclc3_base(machine_config &config)
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m_dfac->add_route(0, "lspeaker", 1.0);
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m_dfac->add_route(1, "rspeaker", 1.0);
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APPLE_OMEGA(config, m_omega, 31.3344_MHz_XTAL);
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m_omega->pclock_changed().set(m_sonora, FUNC(sonora_device::pixel_clock_w));
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SONORA(config, m_sonora, C15M);
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m_sonora->set_maincpu_tag("maincpu");
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m_sonora->set_rom_tag("bootrom");
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@ -324,8 +330,11 @@ void macvail_state::maclc3(machine_config &config)
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m_egret->set_default_bios_tag("341s0851");
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m_egret->reset_callback().set(FUNC(macvail_state::cuda_reset_w));
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m_egret->dfac_scl_callback().set(m_dfac, FUNC(dfac_device::clock_write));
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m_egret->dfac_scl_callback().append(m_omega, FUNC(omega_device::clock_write));
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m_egret->dfac_sda_callback().set(m_dfac, FUNC(dfac_device::data_write));
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m_egret->dfac_sda_callback().append(m_omega, FUNC(omega_device::data_write));
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m_egret->dfac_latch_callback().set(m_dfac, FUNC(dfac_device::latch_write));
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m_egret->dfac_latch_callback().append(m_omega, FUNC(omega_device::latch_write));
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m_egret->linechange_callback().set(m_macadb, FUNC(macadb_device::adb_linechange_w));
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m_egret->via_clock_callback().set(m_sonora, FUNC(sonora_device::cb1_w));
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m_egret->via_data_callback().set(m_sonora, FUNC(sonora_device::cb2_w));
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@ -356,6 +365,9 @@ void macvail_state::maclc520(machine_config &config)
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m_cuda->linechange_callback().set(m_macadb, FUNC(macadb_device::adb_linechange_w));
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m_cuda->via_clock_callback().set(m_sonora, FUNC(sonora_device::cb1_w));
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m_cuda->via_data_callback().set(m_sonora, FUNC(sonora_device::cb2_w));
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m_cuda->iic_scl_callback().set(m_omega, FUNC(omega_device::clock_write));
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m_cuda->iic_sda_callback().set(m_omega, FUNC(omega_device::data_write));
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m_cuda->dfac_latch_callback().set(m_omega, FUNC(omega_device::latch_write));
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m_macadb->adb_data_callback().set(m_cuda, FUNC(cuda_device::set_adb_line));
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config.set_perfect_quantum(m_maincpu);
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141
src/mame/apple/omega.cpp
Normal file
141
src/mame/apple/omega.cpp
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@ -0,0 +1,141 @@
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// license:BSD-3-Clause
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// copyright-holders:R. Belmont
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/***************************************************************************
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omega.cpp - Apple PLL clock synthesizer, used with Sonora and Ardbeg
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based machines to generate the system clock and video dot clock.
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Omega is intended to share the 3-wire clock/data/latch serial bus
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with DFAC. On the rising edge of the latch, it takes note of the
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next 16 bits. The first 7 are the N parameter, the next 7 bits are
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the D parameter, and the final 2 are the P parameter. The actual
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formula is identical to the Gazelle chip and the Sierra Semiconductor
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SC11412.
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Pixel clock = (31.3344 MHz * (N / D)) / P;
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________________________
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/ 4 3 2 1 28 27 26 |
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| * |
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| 5 25 |
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| 6 344S1060-A N 24 |
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| 7 23 |
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| 8 (C)1991 APPLE 22 |
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| 9 21 |
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| 10 20 |
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| 11 19 |
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|____12_13_14_15_16_17_18__|
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1, 7, 13, 16, 19, 20 = DGND, digital ground
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2, 28 = AGND, analog ground
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3 = DOTFLTR, filter for the DOTCLK output
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4, 26 = AVDD, analog +5 volt supply (connected to VDD in LC 520)
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5 - OESYSCLK - 1 to enable the SYSCLK output on pin 15
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6 - OEALL - 1 to enable both the pixel and system clocks?
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8 - SLATCH - serial latch
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9 - SDATA - serial data
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10 - SCLK - serial bit clock
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11, 14, 17, 23 = VDD, main +5 volt supply
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12 - DOTCLK - video dot clock output
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15 - SYSCLK - system clock output
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18 - C32M - outputs a mirror of the reference crystal clock
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21 - XTALOUT
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22 - XTALIN - connect the 31.3344 MHz reference crystal between XTALIN and XTALOUT
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24 - S1 - selects one of the canned system clock freqencies (24 is VDD, 25 is GND in LC III = 25 MHz)
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25 - S0 - " " " " " " " "
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27 - SYSFLTR - filter for the SYSCLK output
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SYSFLTR and DOTFLTR are connected like this:
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604 ohms? 0.1uF
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(pin 3 or 27) ----/\/\/\----||-----|
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| |-----GND
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|---||-------------|
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0.002uF
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***************************************************************************/
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#include "emu.h"
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#include "omega.h"
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#define VERBOSE (0)
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(APPLE_OMEGA, omega_device, "aplomega", "Apple Omega PLL Clock Synthesizer")
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omega_device::omega_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, APPLE_OMEGA, tag, owner, clock),
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m_write_pclock(*this),
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m_data(false),
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m_clock(false),
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m_latch(false),
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m_latch_byte(0),
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m_N(0),
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m_D(0),
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m_P(0),
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m_bit(0)
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{
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}
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void omega_device::device_start()
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{
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save_item(NAME(m_clock));
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save_item(NAME(m_data));
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save_item(NAME(m_latch));
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save_item(NAME(m_latch_byte));
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save_item(NAME(m_N));
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save_item(NAME(m_D));
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save_item(NAME(m_P));
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save_item(NAME(m_bit));
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}
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void omega_device::clock_write(int state)
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{
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// take a bit on the rising edge of SCL
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if (state && !m_clock)
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{
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m_latch_byte <<= 1;
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m_latch_byte |= m_data & 1;
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switch (m_bit)
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{
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case 6:
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m_N = m_latch_byte;
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m_latch_byte = 0;
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break;
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case 13:
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m_D = m_latch_byte;
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m_latch_byte = 0;
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break;
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case 15:
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m_P = m_latch_byte & 3;
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const u32 pclock = (u32)(31334400.0f * ((double)m_N / (double)m_D)) / (double)m_P;
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m_write_pclock(pclock);
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LOG("%s: N = %d, D = %d, P = %d, pixel clock = %d\n", tag(), m_N, m_D, m_P, pclock);
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break;
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}
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m_bit++;
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}
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m_clock = state;
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}
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void omega_device::latch_write(int state)
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{
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// start counting bits on the falling edge of the latch
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if (state && !m_latch)
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{
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LOG("%s: latch rising edge, resetting bit count\n", tag());
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m_bit = 0;
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m_latch_byte = 0;
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}
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m_latch = state;
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}
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34
src/mame/apple/omega.h
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34
src/mame/apple/omega.h
Normal file
@ -0,0 +1,34 @@
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// license:BSD-3-Clause
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// copyright-holders:R. Belmont
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#ifndef MAME_APPLE_OMEGA_H
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#define MAME_APPLE_OMEGA_H
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#pragma once
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class omega_device : public device_t
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{
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public:
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omega_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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auto pclock_changed() { return m_write_pclock.bind(); }
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// Omega uses the same 3-wire serial interface as DFAC, and is intended
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// to share the bus with DFAC.
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void data_write(int state) { m_data = state; }
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void clock_write(int state);
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void latch_write(int state);
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protected:
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// device_r overrides
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virtual void device_start() override;
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private:
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devcb_write32 m_write_pclock;
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bool m_data, m_clock, m_latch;
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u8 m_latch_byte, m_N, m_D, m_P;
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u32 m_bit;
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};
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DECLARE_DEVICE_TYPE(APPLE_OMEGA, omega_device)
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#endif // MAME_APPLE_OMEGA_H
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@ -43,6 +43,8 @@ public:
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template <u8 mask> void slot_irq_w(int state);
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void scc_irq_w(int state);
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void pixel_clock_w(u32 pclk) { m_video->set_pixel_clock(pclk); }
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protected:
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// device-level overrides
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virtual void device_start() override;
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