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v550: Add main XTAL and derived clocks (nw)

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This commit is contained in:
AJR 2018-07-08 13:21:16 -04:00
parent 58a1355b6f
commit a7758702e2
2 changed files with 9 additions and 7 deletions
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1
src/emu/xtal.cpp
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@ -307,6 +307,7 @@ const double XTAL::known_xtals[] = {
33'868'800, /* 33.8688_MHz_XTAL Usually used to drive 90's Yamaha OPL/FM chips with /2 divider */
34'000'000, /* 34_MHz_XTAL Gaelco PCBs */
34'291'712, /* 34.291712_MHz_XTAL Fairlight CMI master card */
34'846'000, /* 34.846_MHz_XTAL Visual 550 */
35'904'000, /* 35.904_MHz_XTAL Used on HP98543 graphics board */
36'000'000, /* 36_MHz_XTAL Sega Model 1 video board */
38'769'220, /* 38.76922_MHz_XTAL Namco System 21 video board */

15
src/mame/drivers/v550.cpp
View File

@ -100,21 +100,21 @@ void v550_state::machine_start()
}
MACHINE_CONFIG_START(v550_state::v550)
MCFG_DEVICE_ADD("maincpu", Z80, 4'000'000) // NEC D780C
MCFG_DEVICE_ADD("maincpu", Z80, 34.846_MHz_XTAL / 16) // NEC D780C (2.177875 MHz verified)
MCFG_DEVICE_PROGRAM_MAP(mem_map)
MCFG_DEVICE_IO_MAP(io_map)
MCFG_NVRAM_ADD_0FILL("nvram") // NEC D446-2 + battery
MCFG_DEVICE_ADD("gdc", UPD7220, 4'000'000) // NEC D7220D
MCFG_DEVICE_ADD("gdc", UPD7220, 34.846_MHz_XTAL / 16) // NEC D7220D (2.177875 MHz verified)
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_DEVICE_ADD("ppi", I8255, 0) // NEC D8255AC-5
MCFG_DEVICE_ADD("usart", I8251, 4'000'000) // NEC D8251AC
MCFG_DEVICE_ADD("usart", I8251, 34.846_MHz_XTAL / 16) // NEC D8251AC
MCFG_I8251_RXRDY_HANDLER(WRITELINE("mainint", input_merger_device, in_w<1>))
MCFG_DEVICE_ADD("mpsc", UPD7201_NEW, 4'000'000) // NEC D7201C
MCFG_DEVICE_ADD("mpsc", UPD7201_NEW, 34.846_MHz_XTAL / 16) // NEC D7201C
MCFG_Z80SIO_OUT_INT_CB(WRITELINE("mainint", input_merger_device, in_w<0>))
INPUT_MERGER_ANY_HIGH(config, "mainint").output_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
@ -132,15 +132,16 @@ MACHINE_CONFIG_START(v550_state::v550)
MCFG_DEVICE_ADD("kbdmcu", I8049, 4'608'000)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(16'248'600, 918, 0, 720, 295, 0, 272)
MCFG_SCREEN_RAW_PARAMS(34.846_MHz_XTAL, 19 * 102, 0, 19 * 80, 295, 0, 272)
MCFG_SCREEN_UPDATE_DRIVER(v550_state, screen_update)
MCFG_DEVICE_ADD("pvtc", SCN2672, 1'805'400)
MCFG_DEVICE_ADD("pvtc", SCN2672, 34.846_MHz_XTAL / 19)
MCFG_DEVICE_ADDRESS_MAP(0, pvtc_char_map)
MCFG_DEVICE_ADDRESS_MAP(0, pvtc_attr_map)
MCFG_SCN2672_CHARACTER_WIDTH(9)
MCFG_SCN2672_CHARACTER_WIDTH(19)
MCFG_SCN2672_INTR_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_NMI))
MCFG_VIDEO_SET_SCREEN("screen")
// SCB2673 clock verified at 17.423 MHz
MACHINE_CONFIG_END