mirror of
https://github.com/holub/mame
synced 2025-05-25 07:15:25 +03:00
Made PCI legacy and new implementation coexist for now (no whatsnew)
This commit is contained in:
Miodrag Milanovic
parent
f768287f55
commit
a78e9cf6cf
@ -78,6 +78,223 @@
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type PCI_BUS_LEGACY = &device_creator<pci_bus_legacy_device>;
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// pci_bus_legacy_device - constructor
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//-------------------------------------------------
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pci_bus_legacy_device::pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
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m_father(NULL)
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{
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for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
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m_devtag[i]= NULL;
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m_read_callback[i] = NULL;
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m_write_callback[i] = NULL;
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}
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m_siblings_count = 0;
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}
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/***************************************************************************
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INLINE FUNCTIONS
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***************************************************************************/
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READ32_MEMBER( pci_bus_legacy_device::read )
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{
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UINT32 result = 0xffffffff;
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int function, reg;
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offset %= 2;
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switch (offset)
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{
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case 0:
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result = m_address;
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break;
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case 1:
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if (m_devicenum != -1)
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{
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pci_read_func read = m_busnumaddr->m_read_callback[m_devicenum];
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if (read != NULL)
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{
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function = (m_address >> 8) & 0x07;
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reg = (m_address >> 0) & 0xfc;
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result = (*read)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, mem_mask);
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}
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}
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break;
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}
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if (LOG_PCI)
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logerror("read('%s'): offset=%d result=0x%08X\n", tag(), offset, result);
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return result;
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}
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pci_bus_legacy_device *pci_bus_legacy_device::pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus)
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{
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int a;
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pci_bus_legacy_device *ret;
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if (pcibus->m_busnum == busnum)
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{
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return pcibus;
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}
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for (a = 0; a < pcibus->m_siblings_count; a++)
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{
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ret = pci_search_bustree(busnum, devicenum, pcibus->m_siblings[a]);
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if (ret != NULL)
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return ret;
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}
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return NULL;
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}
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WRITE32_MEMBER( pci_bus_legacy_device::write )
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{
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offset %= 2;
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if (LOG_PCI)
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logerror("write('%s'): offset=%d data=0x%08X\n", tag(), offset, data);
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switch (offset)
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{
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case 0:
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m_address = data;
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/* lookup current device */
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if (m_address & 0x80000000)
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{
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int busnum = (m_address >> 16) & 0xff;
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int devicenum = (m_address >> 11) & 0x1f;
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m_busnumaddr = pci_search_bustree(busnum, devicenum, this);
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if (m_busnumaddr != NULL)
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{
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m_busnumber = busnum;
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m_devicenum = devicenum;
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}
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else
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m_devicenum = -1;
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if (LOG_PCI)
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logerror(" bus:%d device:%d\n", busnum, devicenum);
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}
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break;
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case 1:
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if (m_devicenum != -1)
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{
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pci_write_func write = m_busnumaddr->m_write_callback[m_devicenum];
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if (write != NULL)
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{
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int function = (m_address >> 8) & 0x07;
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int reg = (m_address >> 0) & 0xfc;
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(*write)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, data, mem_mask);
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}
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if (LOG_PCI)
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logerror(" function:%d register:%d\n", (m_address >> 8) & 0x07, (m_address >> 0) & 0xfc);
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}
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break;
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}
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}
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READ64_MEMBER(pci_bus_legacy_device::read_64be)
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{
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UINT64 result = 0;
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mem_mask = FLIPENDIAN_INT64(mem_mask);
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if (ACCESSING_BITS_0_31)
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result |= (UINT64)read(space, offset * 2 + 0, mem_mask >> 0) << 0;
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if (ACCESSING_BITS_32_63)
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result |= (UINT64)read(space, offset * 2 + 1, mem_mask >> 32) << 32;
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return FLIPENDIAN_INT64(result);
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}
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WRITE64_MEMBER(pci_bus_legacy_device::write_64be)
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{
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data = FLIPENDIAN_INT64(data);
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mem_mask = FLIPENDIAN_INT64(mem_mask);
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if (ACCESSING_BITS_0_31)
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write(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
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if (ACCESSING_BITS_32_63)
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write(space, offset * 2 + 1, data >> 32, mem_mask >> 32);
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}
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void pci_bus_legacy_device::add_sibling(pci_bus_legacy_device *sibling, int busnum)
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{
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m_siblings[m_siblings_count] = sibling;
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m_siblings_busnum[m_siblings_count] = busnum;
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m_siblings_count++;
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}
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//-------------------------------------------------
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// device_post_load - handle updating after a
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// restore
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//-------------------------------------------------
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void pci_bus_legacy_device::device_post_load()
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{
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if (m_devicenum != -1)
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{
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m_busnumaddr = pci_search_bustree(m_busnumber, m_devicenum, this);
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}
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void pci_bus_legacy_device::device_start()
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{
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/* store a pointer back to the device */
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m_devicenum = -1;
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/* find all our devices */
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for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
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if (m_devtag[i] != NULL)
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m_device[i] = machine().device(m_devtag[i]);
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if (m_father != NULL) {
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pci_bus_legacy_device *father = machine().device<pci_bus_legacy_device>(m_father);
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if (father)
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father->add_sibling(this, m_busnum);
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}
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/* register pci states */
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save_item(NAME(m_address));
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save_item(NAME(m_devicenum));
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save_item(NAME(m_busnum));
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void pci_bus_legacy_device::device_reset()
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{
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/* reset the drive state */
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m_devicenum = -1;
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m_address = 0;
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}
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// NEW IMPLEMENTATION
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type PCI_BUS = &device_creator<pci_bus_device>;
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//**************************************************************************
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@ -93,8 +310,6 @@ pci_bus_device::pci_bus_device(const machine_config &mconfig, const char *tag, d
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{
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for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
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m_devtag[i]= NULL;
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m_read_callback[i] = NULL;
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m_write_callback[i] = NULL;
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}
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m_siblings_count = 0;
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}
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@ -119,12 +334,11 @@ READ32_MEMBER( pci_bus_device::read )
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case 1:
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if (m_devicenum != -1)
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{
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pci_read_func read = m_busnumaddr->m_read_callback[m_devicenum];
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if (read != NULL)
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if (m_busnumaddr->m_device[m_devicenum] != NULL)
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{
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function = (m_address >> 8) & 0x07;
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reg = (m_address >> 0) & 0xfc;
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result = (*read)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, mem_mask);
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result = m_busnumaddr->m_device[m_devicenum]->pci_read(m_busnumaddr, function, reg, mem_mask);
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}
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}
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break;
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@ -191,12 +405,11 @@ WRITE32_MEMBER( pci_bus_device::write )
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case 1:
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if (m_devicenum != -1)
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{
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pci_write_func write = m_busnumaddr->m_write_callback[m_devicenum];
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if (write != NULL)
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if (m_busnumaddr->m_device[m_devicenum] != NULL)
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{
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int function = (m_address >> 8) & 0x07;
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int reg = (m_address >> 0) & 0xfc;
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(*write)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, data, mem_mask);
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m_busnumaddr->m_device[m_devicenum]->pci_write(m_busnumaddr, function, reg, data, mem_mask);
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}
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if (LOG_PCI)
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logerror(" function:%d register:%d\n", (m_address >> 8) & 0x07, (m_address >> 0) & 0xfc);
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@ -259,10 +472,17 @@ void pci_bus_device::device_start()
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/* store a pointer back to the device */
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m_devicenum = -1;
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char id[3];
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/* find all our devices */
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for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
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if (m_devtag[i] != NULL)
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m_device[i] = machine().device(m_devtag[i]);
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{
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sprintf(id, "%d", i);
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pci_connector *conn = downcast<pci_connector *>(subdevice(id));
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if (conn!=NULL)
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m_device[i] = conn->get_device();
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else
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m_device[i] = NULL;
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}
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if (m_father != NULL) {
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pci_bus_device *father = machine().device<pci_bus_device>(m_father);
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@ -287,3 +507,43 @@ void pci_bus_device::device_reset()
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m_devicenum = -1;
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m_address = 0;
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}
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//-------------------------------------------------
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// pci_device_interface - constructor
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//-------------------------------------------------
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pci_device_interface::pci_device_interface(const machine_config &mconfig, device_t &device)
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: device_slot_card_interface(mconfig, device)
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{
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}
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//-------------------------------------------------
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// ~pci_device_interface - destructor
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//-------------------------------------------------
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pci_device_interface::~pci_device_interface()
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{
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}
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const device_type PCI_CONNECTOR = &device_creator<pci_connector>;
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pci_connector::pci_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, PCI_CONNECTOR, "PCI device connector abstraction", tag, owner, clock),
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device_slot_interface(mconfig, *this)
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{
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}
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pci_connector::~pci_connector()
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{
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}
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void pci_connector::device_start()
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{
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}
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pci_device_interface *pci_connector::get_device()
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{
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return dynamic_cast<pci_device_interface *>(get_card_device());
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}
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@ -16,7 +16,107 @@
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typedef UINT32 (*pci_read_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 mem_mask);
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typedef void (*pci_write_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask);
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// ======================> ttl74145_device
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// ======================> pci_bus_legacy_device
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class pci_bus_legacy_device : public device_t
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{
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public:
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// construction/destruction
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pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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DECLARE_READ32_MEMBER( read );
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DECLARE_WRITE32_MEMBER( write );
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DECLARE_READ64_MEMBER( read_64be );
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DECLARE_WRITE64_MEMBER( write_64be );
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void set_busnum(int busnum) { m_busnum = busnum; }
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void set_father(const char *father) { m_father = father; }
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void set_device(int num, const char *tag, pci_read_func read_func, pci_write_func write_func) {
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m_devtag[num] = tag; m_read_callback[num] = read_func; m_write_callback[num] = write_func; }
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pci_bus_legacy_device *pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus);
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void add_sibling(pci_bus_legacy_device *sibling, int busnum);
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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virtual void device_post_load();
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private:
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UINT8 m_busnum;
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const char * m_devtag[32];
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pci_read_func m_read_callback[32];
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pci_write_func m_write_callback[32];
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const char * m_father;
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device_t * m_device[32];
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pci_bus_legacy_device * m_siblings[8];
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UINT8 m_siblings_busnum[8];
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int m_siblings_count;
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offs_t m_address;
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INT8 m_devicenum; // device number we are addressing
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INT8 m_busnumber; // pci bus number we are addressing
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pci_bus_legacy_device * m_busnumaddr; // pci bus we are addressing
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};
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// device type definition
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extern const device_type PCI_BUS_LEGACY;
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/***************************************************************************
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DEVICE CONFIGURATION MACROS
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***************************************************************************/
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#define MCFG_PCI_BUS_LEGACY_ADD(_tag, _busnum) \
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MCFG_DEVICE_ADD(_tag, PCI_BUS_LEGACY, 0) \
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downcast<pci_bus_legacy_device *>(device)->set_busnum(_busnum); \
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#define MCFG_PCI_BUS_LEGACY_DEVICE(_devnum, _devtag, _configread, _configwrite) \
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downcast<pci_bus_legacy_device *>(device)->set_device(_devnum, _devtag,_configread,_configwrite); \
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#define MCFG_PCI_BUS_LEGACY_SIBLING(_father_tag) \
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downcast<pci_bus_legacy_device *>(device)->set_father(_father_tag); \
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// NEW IMPLEMENTATION
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class pci_bus_device;
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// ======================> pci_device_interface
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class pci_device_interface : public device_slot_card_interface
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{
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public:
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// construction/destruction
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pci_device_interface(const machine_config &mconfig, device_t &device);
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virtual ~pci_device_interface();
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virtual UINT32 pci_read(pci_bus_device *pcibus, int function, int offset, UINT32 mem_mask) = 0;
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virtual void pci_write(pci_bus_device *pcibus, int function, int offset, UINT32 data, UINT32 mem_mask) = 0;
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private:
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};
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class pci_connector: public device_t,
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public device_slot_interface
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{
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public:
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pci_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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virtual ~pci_connector();
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pci_device_interface *get_device();
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protected:
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virtual void device_start();
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};
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extern const device_type PCI_CONNECTOR;
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// ======================> pci_bus_device
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class pci_bus_device : public device_t
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{
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@ -32,8 +132,8 @@ public:
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void set_busnum(int busnum) { m_busnum = busnum; }
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void set_father(const char *father) { m_father = father; }
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void set_device(int num, const char *tag, pci_read_func read_func, pci_write_func write_func) {
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m_devtag[num] = tag; m_read_callback[num] = read_func; m_write_callback[num] = write_func; }
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void set_device(int num, const char *tag) {
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m_devtag[num] = tag; }
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pci_bus_device *pci_search_bustree(int busnum, int devicenum, pci_bus_device *pcibus);
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void add_sibling(pci_bus_device *sibling, int busnum);
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@ -46,11 +146,11 @@ protected:
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private:
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UINT8 m_busnum;
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const char * m_devtag[32];
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pci_read_func m_read_callback[32];
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pci_write_func m_write_callback[32];
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pci_device_interface *m_device[32];
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const char * m_father;
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device_t * m_device[32];
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pci_bus_device * m_siblings[8];
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UINT8 m_siblings_busnum[8];
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int m_siblings_count;
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@ -73,11 +173,13 @@ extern const device_type PCI_BUS;
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MCFG_DEVICE_ADD(_tag, PCI_BUS, 0) \
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downcast<pci_bus_device *>(device)->set_busnum(_busnum); \
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|
||||
#define MCFG_PCI_BUS_DEVICE(_devnum, _devtag, _configread, _configwrite) \
|
||||
downcast<pci_bus_device *>(device)->set_device(_devnum, _devtag,_configread,_configwrite); \
|
||||
#define MCFG_PCI_BUS_DEVICE(_tag, _slot_intf, _def_slot, _def_inp, _def_config, _def_clock, _fixed) \
|
||||
MCFG_DEVICE_ADD(_tag, PCI_CONNECTOR, 0) \
|
||||
MCFG_DEVICE_SLOT_INTERFACE_FULL(_slot_intf, _def_slot, _def_inp, _def_config, _def_clock, _fixed)
|
||||
|
||||
#define MCFG_PCI_BUS_SIBLING(_father_tag) \
|
||||
downcast<pci_bus_device *>(device)->set_father(_father_tag); \
|
||||
|
||||
|
||||
|
||||
#endif /* PCI_H */
|
||||
|
||||
@ -603,7 +603,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
|
||||
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE_LEGACY(pnp_data_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
AM_RANGE(0x42e8, 0x43ef) AM_NOP //To debug
|
||||
AM_RANGE(0x43c0, 0x43cf) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x46e8, 0x46ef) AM_NOP //To debug
|
||||
@ -932,9 +932,9 @@ static MACHINE_CONFIG_START( calchase, calchase_state )
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
|
||||
@ -1124,7 +1124,7 @@ static ADDRESS_MAP_START(xbox_map_io, AS_IO, 32, smbus_state )
|
||||
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff)
|
||||
AM_RANGE(0x00a0, 0x00a3) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
|
||||
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE_LEGACY(ide_r, ide_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
AM_RANGE(0x8000, 0x80ff) AM_READWRITE_LEGACY(dummy_r, dummy_w)
|
||||
AM_RANGE(0xc000, 0xc0ff) AM_READWRITE_LEGACY(smbus_r, smbus_w)
|
||||
AM_RANGE(0xff60, 0xff67) AM_DEVREADWRITE_LEGACY("ide", ide_bus_master32_r, ide_bus_master32_w)
|
||||
@ -1167,15 +1167,15 @@ static MACHINE_CONFIG_START( chihiro_base, driver_device )
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, "PCI Bridge Device - Host Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(1, "HUB Interface - ISA Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(2, "OHCI USB Controller 1", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(3, "OHCI USB Controller 2", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(30, "AGP Host to PCI Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_ADD("agpbus", 1)
|
||||
MCFG_PCI_BUS_SIBLING("pcibus")
|
||||
MCFG_PCI_BUS_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, "PCI Bridge Device - Host Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(1, "HUB Interface - ISA Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(2, "OHCI USB Controller 1", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(3, "OHCI USB Controller 2", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(30, "AGP Host to PCI Bridge", dummy_pci_r, dummy_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("agpbus", 1)
|
||||
MCFG_PCI_BUS_LEGACY_SIBLING("pcibus")
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w)
|
||||
MCFG_PIC8259_ADD( "pic8259_1", chihiro_pic8259_1_config )
|
||||
MCFG_PIC8259_ADD( "pic8259_2", chihiro_pic8259_2_config )
|
||||
MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config )
|
||||
|
||||
@ -488,14 +488,14 @@ static void mpc106_pci_w(device_t *busdevice, device_t *device, int function, in
|
||||
|
||||
READ64_MEMBER(cobra_state::main_mpc106_r)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
//return pci_64be_r(offset, mem_mask);
|
||||
return device->read_64be(space, offset, mem_mask);
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(cobra_state::main_mpc106_w)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
//pci_64be_w(offset, data, mem_mask);
|
||||
device->write_64be(space, offset, data, mem_mask);
|
||||
}
|
||||
@ -2027,8 +2027,8 @@ static MACHINE_CONFIG_START( cobra, cobra_state )
|
||||
|
||||
MCFG_MACHINE_RESET( cobra )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, mpc106_pci_r, mpc106_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, mpc106_pci_r, mpc106_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
@ -602,7 +602,7 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
|
||||
// AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE8(fdc_r,fdc_w,0xffffffff)
|
||||
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
|
||||
AM_RANGE(0x0360, 0x0363) AM_WRITE8(flash_w,0xffffffff)
|
||||
|
||||
@ -1156,9 +1156,9 @@ static MACHINE_CONFIG_START( funkball, funkball_state )
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
@ -540,7 +540,7 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state )
|
||||
AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
|
||||
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*****************************************************************************/
|
||||
@ -694,9 +694,9 @@ static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
|
||||
MCFG_MACHINE_START(gamecstl)
|
||||
MCFG_MACHINE_RESET(gamecstl)
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_PIT8254_ADD( "pit8254", gamecstl_pit8254_config )
|
||||
|
||||
|
||||
@ -137,7 +137,7 @@ public:
|
||||
|
||||
required_device<cpu_device> m_mips;
|
||||
required_device<adsp2181_device> m_adsp;
|
||||
required_device<pci_bus_device> m_pci;
|
||||
required_device<pci_bus_legacy_device> m_pci;
|
||||
|
||||
|
||||
/* ASIC */
|
||||
@ -924,14 +924,14 @@ static MACHINE_CONFIG_START( magictg, magictg_state )
|
||||
MCFG_SOUND_ADD("dac2", DMADAC, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, pci_dev0_r, pci_dev0_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, pci_dev0_r, pci_dev0_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
|
||||
|
||||
#if defined(USE_TWO_3DFX)
|
||||
MCFG_PCI_BUS_DEVICE(8, "voodoo_1", voodoo_1_pci_r, voodoo_1_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(8, "voodoo_1", voodoo_1_pci_r, voodoo_1_pci_w)
|
||||
#endif
|
||||
MCFG_PCI_BUS_DEVICE(9, "zr36120", zr36120_pci_r, zr36120_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(9, "zr36120", zr36120_pci_r, zr36120_pci_w)
|
||||
|
||||
MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, 2, "screen")
|
||||
MCFG_3DFX_VOODOO_CPU("mips")
|
||||
|
||||
@ -960,7 +960,7 @@ static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, mediagx_state )
|
||||
AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w)
|
||||
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x0400, 0x04ff) AM_READWRITE(ad1847_r, ad1847_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*****************************************************************************/
|
||||
@ -1160,8 +1160,8 @@ static MACHINE_CONFIG_START( mediagx, mediagx_state )
|
||||
MCFG_MACHINE_START(mediagx)
|
||||
MCFG_MACHINE_RESET(mediagx)
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)
|
||||
|
||||
MCFG_PIT8254_ADD( "pit8254", mediagx_pit8254_config )
|
||||
|
||||
|
||||
@ -558,7 +558,7 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state)
|
||||
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static const struct pit8253_config midqslvr_pit8254_config =
|
||||
@ -702,9 +702,9 @@ static MACHINE_CONFIG_START( midqslvr, midqslvr_state )
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE( 0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(31, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE( 0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(31, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
@ -542,7 +542,7 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state )
|
||||
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static const struct pit8253_config queen_pit8254_config =
|
||||
@ -689,9 +689,9 @@ static MACHINE_CONFIG_START( queen, queen_state )
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
@ -417,7 +417,7 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state)
|
||||
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
|
||||
// AM_RANGE(0x5000, 0x5007) // routes to port $eb
|
||||
ADDRESS_MAP_END
|
||||
@ -553,9 +553,9 @@ static MACHINE_CONFIG_START( savquest, savquest_state )
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
@ -479,7 +479,7 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state )
|
||||
AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
|
||||
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*****************************************************************************/
|
||||
@ -625,9 +625,9 @@ static MACHINE_CONFIG_START( taitowlf, taitowlf_state )
|
||||
MCFG_MACHINE_START(taitowlf)
|
||||
MCFG_MACHINE_RESET(taitowlf)
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config )
|
||||
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
|
||||
|
||||
@ -384,25 +384,25 @@ static void mpc8240_pci_w(device_t *busdevice, device_t *device, int function, i
|
||||
|
||||
READ64_MEMBER(viper_state::pci_config_addr_r)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
return device->read_64be(space, 0, U64(0xffffffff00000000));
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(viper_state::pci_config_addr_w)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
device->write_64be(space, 0, data, U64(0xffffffff00000000));
|
||||
}
|
||||
|
||||
READ64_MEMBER(viper_state::pci_config_data_r)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
return device->read_64be(space, 1, U64(0x00000000ffffffff)) << 32;
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(viper_state::pci_config_data_w)
|
||||
{
|
||||
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
|
||||
pci_bus_legacy_device *device = machine().device<pci_bus_legacy_device>("pcibus");
|
||||
device->write_64be(space, 1, data >> 32, U64(0x00000000ffffffff));
|
||||
}
|
||||
|
||||
@ -1976,9 +1976,9 @@ static MACHINE_CONFIG_START( viper, viper_state )
|
||||
MCFG_MACHINE_START(viper)
|
||||
MCFG_MACHINE_RESET(viper)
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, "mpc8240", mpc8240_pci_r, mpc8240_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(12, "voodoo", voodoo3_pci_r, voodoo3_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, "mpc8240", mpc8240_pci_r, mpc8240_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(12, "voodoo", voodoo3_pci_r, voodoo3_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, 8, "screen")
|
||||
|
||||
@ -449,7 +449,7 @@ static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state )
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
|
||||
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE_LEGACY(pnp_data_w)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
AM_RANGE(0x42e8, 0x43ef) AM_NOP //To debug
|
||||
AM_RANGE(0x43c0, 0x43cf) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x46e8, 0x46ef) AM_NOP //To debug
|
||||
@ -778,9 +778,9 @@ static MACHINE_CONFIG_START( voyager, voyager_state )
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
|
||||
@ -549,7 +549,7 @@ static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state)
|
||||
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
|
||||
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
|
||||
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -694,9 +694,9 @@ static MACHINE_CONFIG_START( xtom3d, xtom3d_state )
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_PCI_BUS_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user