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superqix.cpp: Implement AY-3-8910 mixing based on PCB tracing, add XTALs and notes about "SYSTEM" register bits being incorrect as currently implemented [Lord Nightmare, Stefan Lindberg]
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@ -1266,7 +1266,7 @@ static INPUT_PORTS_START( superqix )
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PORT_DIPSETTING( 0x40, "80%" )
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PORT_DIPSETTING( 0x00, "85%" )
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PORT_START("SYSTEM")
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PORT_START("SYSTEM") /* Port 0 of MCU, might also be readable by z80 at io 0x0418 (nmi ack read port) */
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
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@ -1274,8 +1274,13 @@ static INPUT_PORTS_START( superqix )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) // doesn't work in bootleg
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, superqix_state, superqix_semaphore_input_r, nullptr) /* Z80 and MCU Semaphores */
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/* The bits 0xc0 above is known to be WRONG from tracing:
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bit 6 connects to whatever bit 7 is connected to on AY-3-8910 #1 @3P Port A
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bit 7 connects to whatever bit 7 is connected to on AY-3-8910 #1 @3P Port B
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however what those ay bits actually each connect to (semaphores? service button?) is currently unknown
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*/
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PORT_START("P1")
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PORT_START("P1") /* AY-3-8910 #1 @3P Port A */
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
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@ -1285,7 +1290,7 @@ static INPUT_PORTS_START( superqix )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* ??? */
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PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
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PORT_START("P2")
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PORT_START("P2") /* AY-3-8910 #1 @3P Port B */
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
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@ -1405,12 +1410,12 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( sqix, superqix_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80, 12000000/2) /* 6 MHz */
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MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* 6 MHz */
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MCFG_CPU_PROGRAM_MAP(main_map)
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MCFG_CPU_IO_MAP(sqix_port_map)
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MCFG_CPU_PERIODIC_INT_DRIVER(superqix_state, sqix_timer_irq, 4*60) /* ??? */
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MCFG_CPU_ADD("mcu", I8751, 12000000/3) /* ??? */
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MCFG_CPU_ADD("mcu", I8751, XTAL_12MHz/3) /* TODO: VERIFY DIVISOR, is this 3mhz or 4mhz? */
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MCFG_CPU_IO_MAP(sqix_mcu_io_map)
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MCFG_QUANTUM_PERFECT_CPU("maincpu")
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@ -1435,12 +1440,14 @@ static MACHINE_CONFIG_START( sqix, superqix_state )
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/* sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("ay1", AY8910, 12000000/8)
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MCFG_SOUND_ADD("ay1", AY8910, XTAL_12MHz/8) // AY-3-8910 @3P, outputs directly tied together
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MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT)
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("P1"))
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MCFG_AY8910_PORT_B_READ_CB(READ8(superqix_state, in4_mcu_r)) /* port Bread */
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
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MCFG_SOUND_ADD("ay2", AY8910, 12000000/8)
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MCFG_SOUND_ADD("ay2", AY8910, XTAL_12MHz/8) // AY-3-8910 @3M, outputs directly tied together
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MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT)
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW2"))
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MCFG_AY8910_PORT_B_READ_CB(READ8(superqix_state, sqix_from_mcu_r)) /* port Bread */
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MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(superqix_state,sqix_z80_mcu_w)) /* port Bwrite */
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@ -1483,11 +1490,13 @@ static MACHINE_CONFIG_START( sqix_nomcu, superqix_state )
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("ay1", AY8910, 12000000/8)
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MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT) // ?
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("P1"))
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MCFG_AY8910_PORT_B_READ_CB(READ8(superqix_state, in4_mcu_r))
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
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MCFG_SOUND_ADD("ay2", AY8910, 12000000/8)
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MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT) // ?
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW2"))
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MCFG_AY8910_PORT_B_READ_CB(READ8(superqix_state, bootleg_in0_r)) /* port Bread */
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
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