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MCS51/I8051 overhaul, micro3d improvements and full m72 protection emulation for lohtb2

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* improved serial port timing (f15se (micro3d.c) sound board now works)
 * better infrastructure for adding more variants like DS5002
 * Fixed port reading
 * Rewrote Macros for better readibility
 * Fixed and rewrote Interrupt handling
 * Now returns INTERNAL_DIVIDER, adjusted cycle counts
 * Remove unnecessary and duplicated code
 * Remove unnecessary functions
 * Rewrite to have sfr-registers stored in int_ram. 
 * Debugger may now watch sfr-registers as well.
 * implemented interrupt callbacks (HOLD_LINE now supported)
 * Runtime switch for processor type - remove ifdefs
 * internal memory maps for internal rom versions (internal ram now displayed in debugger)
 * more timer cleanups from manual
 
micro3d:
 * serial port communication between main cpu and sound board works
 * sound board now works
 
m72 - lohtb2:
 * full emulation of protection device
 * Samples are now piped through the mcu
This commit is contained in:
Couriersud 2008-10-19 22:06:47 +00:00
parent 10e8a13d82
commit a7da02e00e
11 changed files with 2348 additions and 2724 deletions
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4031
src/emu/cpu/i8051/i8051.c
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124
src/emu/cpu/i8051/i8051.h
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@ -43,108 +43,48 @@ enum
I8051_R0, I8051_R1, I8051_R2, I8051_R3, I8051_R4, I8051_R5, I8051_R6, I8051_R7, I8051_RB
};
#define I8051_INT0_LINE 0 /* External Interrupt 0 */
#define I8051_INT1_LINE 1 /* External Interrupt 1 */
#define I8051_T0_LINE 2 /* Timer 0 External Input */
#define I8051_T1_LINE 3 /* Timer 1 External Input */
#define I8051_RX_LINE 4 /* Serial Port Receive Line */
enum
{
I8051_INT0_LINE = 0, /* P3.2: External Interrupt 0 */
I8051_INT1_LINE, /* P3.3: External Interrupt 1 */
I8051_RX_LINE, /* P3.0: Serial Port Receive Line */
MCS51_T0_LINE, /* P3,4: Timer 0 External Input */
MCS51_T1_LINE, /* P3.5: Timer 1 External Input */
MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
};
/* definition of the special function registers. Note that the values are */
/* the same as the internal memory address in the 8051 */
#define P0 0x80
#define SP 0x81
#define DPL 0x82
#define DPH 0x83
#define PCON 0x87
#define TCON 0x88
#define TMOD 0x89
#define TL0 0x8a
#define TL1 0x8b
#define TH0 0x8c
#define TH1 0x8d
#define P1 0x90
#define SCON 0x98
#define SBUF 0x99
#define P2 0xa0
#define IE 0xa8
#define P3 0xb0
#define IP 0xb8
//8052 Only registers
#if (HAS_I8052 || HAS_I8752)
#define T2CON 0xc8
#define RCAP2L 0xca
#define RCAP2H 0xcb
#define TL2 0xcc
#define TH2 0xcd
#endif
#define PSW 0xd0
#define ACC 0xe0
#define B 0xf0
/* special I/O space ports */
/* commonly used bit address for the 8051 */
#define C 0xd7
#define P 0xd0
#define AC 0xd6
#define OV 0xd2
#define TF0 0x8d
#define TF1 0x8f
#define IE0 0x89
#define IE1 0x8b
#define TI 0x99
#define RI 0x98
enum
{
MCS51_PORT_P0 = 0x10000,
MCS51_PORT_P1 = 0x10001,
MCS51_PORT_P2 = 0x10002,
MCS51_PORT_P3 = 0x10003,
MCS51_PORT_TX = 0x10004, /* P3.1 */
};
#define TI_FLAG 1
#define RI_FLAG 2
extern void i8051_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */
extern void i8051_reset (void); /* Reset registers to the initial values */
extern void i8051_exit (void); /* Shut down CPU core */
extern int i8051_execute(int cycles); /* Execute cycles - returns number of cycles actually run */
extern void i8051_get_context (void *dst); /* Get registers, return context size */
extern void i8051_set_context (void *src); /* Set registers */
extern unsigned i8051_get_intram (int offset);
extern unsigned i8051_get_reg (int regnum);
extern void i8051_set_reg (int regnum, unsigned val);
extern void i8051_set_irq_line(int irqline, int state);
extern void i8051_set_irq_callback(int (*callback)(int irqline));
extern void i8051_state_save(void *file);
extern void i8051_state_load(void *file);
WRITE8_HANDLER( i8051_internal_w );
READ8_HANDLER( i8051_internal_r );
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
extern void i8051_set_serial_tx_callback(void (*callback)(int data));
extern void i8051_set_serial_rx_callback(int (*callback)(void));
extern void i8051_set_eram_iaddr_callback(READ32_HANDLER((*callback)));
extern offs_t i8051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
/****************************************************************************
* 8752 Section
****************************************************************************/
#if (HAS_I8752)
extern void i8752_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */
extern void i8752_reset (void); /* Reset registers to the initial values */
extern void i8752_exit (void); /* Shut down CPU core */
extern int i8752_execute(int cycles); /* Execute cycles - returns number of cycles actually run */
extern void i8752_get_context (void *dst); /* Get registers, return context size */
extern void i8752_set_context (void *src); /* Set registers */
extern unsigned i8752_get_reg (int regnum);
extern void i8752_set_reg (int regnum, unsigned val);
extern void i8752_set_irq_line(int irqline, int state);
extern void i8752_set_irq_callback(int (*callback)(int irqline));
extern void i8752_state_save(void *file);
extern void i8752_state_load(void *file);
extern void i8752_set_serial_tx_callback(void (*callback)(int data));
extern void i8752_set_serial_rx_callback(int (*callback)(void));
WRITE8_HANDLER( i8752_internal_w );
READ8_HANDLER( i8752_internal_r );
#endif //(HAS_8752)
/* variants 4k internal rom and 128 byte internal memory */
void i8051_get_info(UINT32 state, cpuinfo *info);
void i8052_get_info(UINT32 state, cpuinfo *info);
void i8751_get_info(UINT32 state, cpuinfo *info);
/* variants 8k internal rom and 256 byte internal memory and more registers */
void i8052_get_info(UINT32 state, cpuinfo *info);
void i8752_get_info(UINT32 state, cpuinfo *info);
/****************************************************************************
* Disassembler
****************************************************************************/
offs_t i8051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
#endif /* __I8051_H__ */

389
src/emu/cpu/i8051/i8051ops.c
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@ -1,26 +1,26 @@
/*******************************************************************************************
NOTE: All registers are accessed directly, instead of using the SFR_R() function for speed
Direct register access is availabe from the R_(register name) macros.. ex: R_ACC for the ACC
Direct register access is availabe from the R_(register name) macros.. ex: ACC for the ACC
with the exception of the PC
********************************************************************************************/
//ACALL code addr /* 1: aaa1 0001 */
INLINE void acall(void)
INLINE void acall(UINT8 op)
{
UINT8 op = ROP(PC-1); //Grab the opcode for ACALL
UINT8 addr = ROP_ARG(PC++); //Grab code address byte
PUSH_PC //Save PC to the stack
PUSH_PC(); //Save PC to the stack
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((op & 0xe0) << 3) | addr;
change_pc(PC);
}
//ADD A, #data /* 1: 0010 0100 */
INLINE void add_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
UINT8 result = R_ACC + data; //Add data to accumulator
DO_ADD_FLAGS(R_ACC,data,0) //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, data addr /* 1: 0010 0101 */
@ -28,36 +28,36 @@ INLINE void add_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
UINT8 result = R_ACC + data; //Add data to accumulator
DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, @R0/@R1 /* 1: 0010 011i */
INLINE void add_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = R_ACC + data; //Add data to accumulator
DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, R0 to R7 /* 1: 0010 1rrr */
INLINE void add_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
UINT8 result = R_ACC + data; //Add data to accumulator
DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = R_REG(r); //Grab data from R0 - R7
UINT8 result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, #data /* 1: 0011 0100 */
INLINE void addc_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, data addr /* 1: 0011 0101 */
@ -65,36 +65,36 @@ INLINE void addc_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, @R0/@R1 /* 1: 0011 011i */
INLINE void addc_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, R0 to R7 /* 1: 0011 1rrr */
INLINE void addc_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = R_REG(r); //Grab data from R0 - R7
UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//AJMP code addr /* 1: aaa0 0001 */
INLINE void ajmp(void)
INLINE void ajmp(UINT8 op)
{
UINT8 op = ROP(PC-1); //Grab the opcode for AJMP
UINT8 addr = ROP_ARG(PC++); //Grab code address byte
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((op & 0xe0) << 3) | addr;
change_pc(PC);
}
//ANL data addr, A /* 1: 0101 0010 */
@ -102,7 +102,7 @@ INLINE void anl_mem_a(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data & R_ACC); //Set data address value to it's value Logical AND with ACC
IRAM_W(addr,data & ACC); //Set data address value to it's value Logical AND with ACC
}
//ANL data addr, #data /* 1: 0101 0011 */
@ -118,7 +118,7 @@ INLINE void anl_mem_byte(void)
INLINE void anl_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, data addr /* 1: 0101 0101 */
@ -126,21 +126,21 @@ INLINE void anl_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, @RO/@R1 /* 1: 0101 011i */
INLINE void anl_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, RO to R7 /* 1: 0101 1rrr */
INLINE void anl_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
UINT8 data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL C, bit addr /* 1: 1000 0010 */
@ -168,11 +168,14 @@ INLINE void cjne_a_byte(void)
UINT8 data = ROP_ARG(PC++); //Grab data
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(R_ACC != data) //Jump if values are not equal
PC = PC + rel_addr;
if(ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
change_pc(PC);
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (R_ACC < data) );
SET_CY( (ACC < data) );
}
//CJNE A, data addr, code addr /* 1: 1011 0101 */
@ -182,11 +185,14 @@ INLINE void cjne_a_mem(void)
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
UINT8 data = IRAM_R(addr); //Pull value from data address
if(R_ACC != data) //Jump if values are not equal
if(ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
change_pc(PC);
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (R_ACC < data) );
SET_CY( (ACC < data) );
}
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
@ -194,10 +200,13 @@ INLINE void cjne_ir_byte(int r)
{
UINT8 data = ROP_ARG(PC++); //Grab data
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
UINT8 srcdata = IRAM_IR(R_R(r)); //Grab value pointed to by R0 or R1
UINT8 srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
if(srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
change_pc(PC);
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (srcdata < data) );
@ -208,10 +217,13 @@ INLINE void cjne_r_byte(int r)
{
UINT8 data = ROP_ARG(PC++); //Grab data
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
UINT8 srcdata = R_R(r); //Grab value of R0 - R7
UINT8 srcdata = R_REG(r); //Grab value of R0 - R7
if(srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
change_pc(PC);
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (srcdata < data) );
@ -233,7 +245,7 @@ INLINE void clr_c(void)
//CLR A /* 1: 1110 0100 */
INLINE void clr_a(void)
{
SFR_W(ACC,0); //Clear Accumulator
SET_ACC(0); //Clear Accumulator
}
//CPL bit addr /* 1: 1011 0010 */
@ -254,8 +266,8 @@ INLINE void cpl_c(void)
//CPL A /* 1: 1111 0100 */
INLINE void cpl_a(void)
{
UINT8 data = ((~R_ACC)&0xff);
SFR_W(ACC,data); //Complement Accumulator
UINT8 data = ((~ACC)&0xff);
SET_ACC(data); //Complement Accumulator
}
//DA A /* 1: 1101 0100 */
@ -269,12 +281,12 @@ INLINE void da_a(void)
If the carry is set, OR the four high bits 4-7 exceed nine, six is added to the value of these bits.
The carry flag will be set if the result is > 0x99, but not cleared otherwise */
UINT16 new_acc = R_ACC & 0xff;
UINT16 new_acc = ACC & 0xff;
if(GET_AC || (new_acc & 0x0f) > 0x09)
new_acc += 0x06;
if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
new_acc += 0x60;
SFR_W(ACC,new_acc&0xff);
SET_ACC(new_acc&0xff);
if(new_acc & ~0xff)
SET_CY(1);
}
@ -282,7 +294,7 @@ INLINE void da_a(void)
//DEC A /* 1: 0001 0100 */
INLINE void dec_a(void)
{
SFR_W(ACC,R_ACC-1);
SET_ACC(ACC-1);
}
//DEC data addr /* 1: 0001 0101 */
@ -296,32 +308,32 @@ INLINE void dec_mem(void)
//DEC @R0/@R1 /* 1: 0001 011i */
INLINE void dec_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r));
IRAM_W(R_R(r),data-1);
UINT8 data = IRAM_IR(R_REG(r));
IRAM_W(R_REG(r),data-1);
}
//DEC R0 to R7 /* 1: 0001 1rrr */
INLINE void dec_r(int r)
{
R_R(r) = R_R(r) - 1;
SET_REG(r, R_REG(r) - 1);
}
//DIV AB /* 1: 1000 0100 */
INLINE void div_ab(void)
{
if( R_B == 0 ) {
if( B == 0 ) {
//Overflow flag is set!
SET_OV(1);
//Really the values are undefined according to the manual, but we'll just leave them as is..
//SFR_W(ACC,0xff);
//SET_ACC(0xff);
//SFR_W(B,0xff);
}
else {
int a = (int)R_ACC/R_B;
int b = (int)R_ACC%R_B;
int a = (int)ACC / B;
int b = (int)ACC % B;
//A gets quotient byte, B gets remainder byte
SFR_W(ACC,a);
SFR_W(B, b);
SET_ACC(a);
B = b;
//Overflow flag is cleared
SET_OV(0);
}
@ -336,22 +348,28 @@ INLINE void djnz_mem(void)
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
INLINE void djnz_r(int r)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
R_R(r) = R_R(r) - 1; //Decrement value
if(R_R(r) != 0) //Branch if contents of R0 - R7 is not 0
SET_REG(r ,R_REG(r) - 1); //Decrement value
if(R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//INC A /* 1: 0000 0100 */
INLINE void inc_a(void)
{
SFR_W(ACC,R_ACC+1);
SET_ACC(ACC+1);
}
//INC data addr /* 1: 0000 0101 */
@ -365,22 +383,22 @@ INLINE void inc_mem(void)
//INC @R0/@R1 /* 1: 0000 011i */
INLINE void inc_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r));
IRAM_W(R_R(r),data+1);
UINT8 data = IRAM_IR(R_REG(r));
IRAM_W(R_REG(r),data+1);
}
//INC R0 to R7 /* 1: 0000 1rrr */
INLINE void inc_r(int r)
{
UINT8 data = R_R(r);
R_R(r) = data + 1;
UINT8 data = R_REG(r);
SET_REG(r, data + 1);
}
//INC DPTR /* 1: 1010 0011 */
INLINE void inc_dptr(void)
{
UINT16 dptr = (R_DPTR)+1;
DPTR_W(dptr);
UINT16 dptr = (DPTR)+1;
SET_DPTR(dptr);
}
//JB bit addr, code addr /* 1: 0010 0000 */
@ -389,7 +407,10 @@ INLINE void jb(void)
UINT8 addr = ROP_ARG(PC++); //Grab bit address
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(BIT_R(addr)) //If bit set at specified bit address, jump
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//JBC bit addr, code addr /* 1: 0001 0000 */
@ -400,6 +421,7 @@ INLINE void jbc(void)
if(BIT_R(addr)) { //If bit set at specified bit address, jump
PC = PC + rel_addr;
BIT_W(addr,0); //Clear Bit also
change_pc(PC);
}
}
@ -408,13 +430,17 @@ INLINE void jc(void)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(GET_CY) //Jump if Carry Flag Set
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//JMP @A+DPTR /* 1: 0111 0011 */
INLINE void jmp_iadptr(void)
{
PC = R_ACC+R_DPTR;
PC = ACC + DPTR;
change_pc(PC);
}
//JNB bit addr, code addr /* 1: 0011 0000 */
@ -423,7 +449,10 @@ INLINE void jnb(void)
UINT8 addr = ROP_ARG(PC++); //Grab bit address
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//JNC code addr /* 1: 0101 0000 */
@ -431,23 +460,32 @@ INLINE void jnc(void)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(!GET_CY) //Jump if Carry Flag not set
{
PC = PC + rel_addr;
change_pc(PC);
}
}
//JNZ code addr /* 1: 0111 0000 */
INLINE void jnz(void)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(R_ACC != 0) //Branch if ACC is not 0
if(ACC != 0) //Branch if ACC is not 0
{
PC = PC+rel_addr;
change_pc(PC);
}
}
//JZ code addr /* 1: 0110 0000 */
INLINE void jz(void)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
if(R_ACC == 0) //Branch if ACC is 0
if(ACC == 0) //Branch if ACC is 0
{
PC = PC+rel_addr;
change_pc(PC);
}
}
//LCALL code addr /* 1: 0001 0010 */
@ -456,8 +494,9 @@ INLINE void lcall(void)
UINT8 addr_hi, addr_lo;
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
PUSH_PC
PUSH_PC();
PC = (UINT16)((addr_hi<<8) | addr_lo);
change_pc(PC);
}
//LJMP code addr /* 1: 0000 0010 */
@ -467,32 +506,33 @@ INLINE void ljmp(void)
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
PC = (UINT16)((addr_hi<<8) | addr_lo);
change_pc(PC);
}
//MOV A, #data /* 1: 0111 0100 */
INLINE void mov_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
SFR_W(ACC,data); //Store data to ACC
SET_ACC(data); //Store data to ACC
}
//MOV A, data addr /* 1: 1110 0101 */
INLINE void mov_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
SFR_W(ACC,IRAM_R(addr)); //Store contents of data address to ACC
SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
}
//MOV A,@RO/@R1 /* 1: 1110 011i */
INLINE void mov_a_ir(int r)
{
SFR_W(ACC,IRAM_IR(R_R(r))); //Store contents of address pointed by R0 or R1 to ACC
SET_ACC(IRAM_IR(R_REG(r))); //Store contents of address pointed by R0 or R1 to ACC
}
//MOV A,R0 to R7 /* 1: 1110 1rrr */
INLINE void mov_a_r(int r)
{
SFR_W(ACC,R_R(r)); //Store contents of R0 - R7 to ACC
SET_ACC(R_REG(r)); //Store contents of R0 - R7 to ACC
}
//MOV data addr, #data /* 1: 0111 0101 */
@ -517,28 +557,28 @@ INLINE void mov_mem_mem(void)
INLINE void mov_ir_byte(int r)
{
UINT8 data = ROP_ARG(PC++); //Grab data
IRAM_IW(R_R(r),data); //Store data to address pointed by R0 or R1
IRAM_IW(R_REG(r),data); //Store data to address pointed by R0 or R1
}
//MOV R0 to R7, #data /* 1: 0111 1rrr */
INLINE void mov_r_byte(int r)
{
UINT8 data = ROP_ARG(PC++); //Grab data
R_R(r) = data; //Store to R0 - R7
SET_REG(r, data); //Store to R0 - R7
}
//MOV data addr, @R0/@R1 /* 1: 1000 011i */
INLINE void mov_mem_ir(int r)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,IRAM_IR(R_R(r))); //Store contents pointed to by R0 or R1 to data address
IRAM_W(addr,IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
}
//MOV data addr,R0 to R7 /* 1: 1000 1rrr */
INLINE void mov_mem_r(int r)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,R_R(r)); //Store contents of R0 - R7 to data address
IRAM_W(addr,R_REG(r)); //Store contents of R0 - R7 to data address
}
//MOV DPTR, #data16 /* 1: 1001 0000 */
@ -547,7 +587,7 @@ INLINE void mov_dptr_byte(void)
UINT8 data_hi, data_lo;
data_hi = ROP_ARG(PC++); //Grab hi byte
data_lo = ROP_ARG(PC++); //Grab lo byte
DPTR_W((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
SET_DPTR((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
}
//MOV bit addr, C /* 1: 1001 0010 */
@ -561,41 +601,41 @@ INLINE void mov_bitaddr_c(void)
INLINE void mov_ir_mem(int r)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
IRAM_IW(R_R(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
IRAM_IW(R_REG(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
}
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
INLINE void mov_r_mem(int r)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
R_R(r) = IRAM_R(addr); //Store to R0 - R7
SET_REG(r, IRAM_R(addr)); //Store to R0 - R7
}
//MOV data addr, A /* 1: 1111 0101 */
INLINE void mov_mem_a(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,R_ACC); //Store A to data address
IRAM_W(addr,ACC); //Store A to data address
}
//MOV @R0/@R1, A /* 1: 1111 011i */
INLINE void mov_ir_a(int r)
{
IRAM_IW(R_R(r),R_ACC); //Store A to location pointed to by R0 or R1
IRAM_IW(R_REG(r),ACC); //Store A to location pointed to by R0 or R1
}
//MOV R0 to R7, A /* 1: 1111 1rrr */
INLINE void mov_r_a(int r)
{
R_R(r) = R_ACC; //Store A to R0-R7
SET_REG(r, ACC); //Store A to R0-R7
}
//MOVC A, @A + PC /* 1: 1000 0011 */
INLINE void movc_a_iapc(void)
{
UINT8 data;
data = CODEMEM_R(R_ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
SFR_W(ACC,data);
data = CODEMEM_R(ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
//MOV C, bit addr /* 1: 1010 0010 */
@ -609,8 +649,8 @@ INLINE void mov_c_bitaddr(void)
INLINE void movc_a_iadptr(void)
{
UINT8 data;
data = CODEMEM_R(R_ACC+R_DPTR); //Move a byte from CODE(Program) Memory and store to ACC
SFR_W(ACC,data);
data = CODEMEM_R(ACC + DPTR); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
//MOVX A,@DPTR /* 1: 1110 0000 */
@ -618,44 +658,44 @@ INLINE void movc_a_iadptr(void)
INLINE void movx_a_idptr(void)
{
// UINT8 byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
UINT32 addr = ERAM_ADDR(R_DPTR,0xFFFF);
UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
SFR_W(ACC,byte); //Store to ACC
SET_ACC(byte); //Store to ACC
}
//MOVX A, @R0/@R1 /* 1: 1110 001i */
//(Move External Ram 8 bit address to A)
INLINE void movx_a_ir(int r)
{
UINT32 addr = ERAM_ADDR(R_R(r),0xFF); //Grab address by reading location pointed to by R0 or R1
UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
SFR_W(ACC,byte); //Store to ACC
SET_ACC(byte); //Store to ACC
}
//MOVX @DPTR,A /* 1: 1111 0000 */
//(Move A to External Ram 16 bit address)
INLINE void movx_idptr_a(void)
{
// DATAMEM_W(R_DPTR, R_ACC); //Store ACC to External DATA memory address pointed to by DPTR
UINT32 addr = ERAM_ADDR(R_DPTR,0xFFFF);
DATAMEM_W(addr, R_ACC); //Store ACC to External DATA memory address pointed to by DPTR
// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
}
//MOVX @R0/@R1,A /* 1: 1111 001i */
//(Move A to External Ram 8 bit address)
INLINE void movx_ir_a(int r)
{
UINT32 addr = ERAM_ADDR(R_R(r),0xFF); //Grab address by reading location pointed to by R0 or R1
DATAMEM_W(addr, R_ACC); //Store ACC to External DATA memory address
UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
}
//MUL AB /* 1: 1010 0100 */
INLINE void mul_ab(void)
{
UINT16 result = R_ACC * R_B;
UINT16 result = ACC * B;
//A gets lo bits, B gets hi bits of result
SFR_W(B,(UINT8)((result & 0xFF00) >> 8));
SFR_W(ACC,(UINT8)(result & 0x00FF));
B = (UINT8) ((result & 0xFF00) >> 8);
SET_ACC((UINT8)(result & 0x00FF));
//Set flags
SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
SET_CY(0); //Carry Flag always cleared
@ -671,7 +711,7 @@ INLINE void orl_mem_a(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data | R_ACC); //Set data address value to it's value Logical OR with ACC
IRAM_W(addr,data | ACC); //Set data address value to it's value Logical OR with ACC
}
//ORL data addr, #data /* 1: 0100 0011 */
@ -687,7 +727,7 @@ INLINE void orl_mem_byte(void)
INLINE void orl_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, data addr /* 1: 0100 0101 */
@ -695,21 +735,21 @@ INLINE void orl_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, @RO/@R1 /* 1: 0100 011i */
INLINE void orl_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, RO to R7 /* 1: 0100 1rrr */
INLINE void orl_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
UINT8 data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL C, bit addr /* 1: 0111 0010 */
@ -735,51 +775,49 @@ INLINE void orl_c_nbitaddr(void)
INLINE void pop(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
IRAM_W(addr, IRAM_IR(SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
//IRAM_IW(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - doesn't work, sfr's are not restored this way and it's not an indirect access anyway
SFR_W(SP,R_SP-1); //Decrement SP
SP = SP-1; //Decrement SP
}
//PUSH data addr /* 1: 1100 0000 */
INLINE void push(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 tmpSP = R_SP; //Grab and Increment Stack Pointer
tmpSP++; // ""
SFR_W(SP,tmpSP); // ""
if (tmpSP == R_SP) //Ensure it was able to write to new stack location
IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
SP = tmpSP; // ""
IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
}
//RET /* 1: 0010 0010 */
INLINE void ret(void)
{
POP_PC
POP_PC();
}
//RETI /* 1: 0011 0010 */
INLINE void reti(void)
{
POP_PC
CLEAR_CURRENT_IRQ
POP_PC();
CLEAR_CURRENT_IRQ();
}
//RL A /* 1: 0010 0011 */
INLINE void rl_a(void)
{
//Left Shift A, Bit 7 carries to Bit 0
int carry = ((R_ACC & 0x80) >> 7);
int data = (R_ACC<<1) & 0xfe;
SFR_W(ACC, data | carry);
int carry = ((ACC & 0x80) >> 7);
int data = (ACC<<1) & 0xfe;
SET_ACC( data | carry);
}
//RLC A /* 1: 0011 0011 */
INLINE void rlc_a(void)
{
//Left Shift A, Bit 7 goes to Carry Flag, Original Carry Flag goes to Bit 0 of ACC
int carry = ((R_ACC & 0x80) >> 7);
int data = ((R_ACC<<1) & 0xfe) | GET_CY;
SFR_W(ACC, data);
int carry = ((ACC & 0x80) >> 7);
int data = ((ACC<<1) & 0xfe) | GET_CY;
SET_ACC( data);
SET_CY(carry);
}
@ -787,18 +825,18 @@ INLINE void rlc_a(void)
INLINE void rr_a(void)
{
//Right Shift A, Bit 0 carries to Bit 7
int carry = ((R_ACC & 1) << 7);
int data = (R_ACC>>1) & 0x7f;
SFR_W(ACC, data | carry);
int carry = ((ACC & 1) << 7);
int data = (ACC>>1) & 0x7f;
SET_ACC( data | carry);
}
//RRC A /* 1: 0001 0011 */
INLINE void rrc_a(void)
{
//Right Shift A, Bit 0 goes to Carry Flag, Bit 7 of ACC gets set to original Carry Flag
int carry = (R_ACC & 1);
int data = ((R_ACC>>1) & 0x7f) | (GET_CY<<7);
SFR_W(ACC, data);
int carry = (ACC & 1);
int data = ((ACC>>1) & 0x7f) | (GET_CY<<7);
SET_ACC( data);
SET_CY(carry);
}
@ -820,15 +858,16 @@ INLINE void sjmp(void)
{
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
PC = PC + rel_addr; //Update PC
change_pc(PC);
}
//SUBB A, #data /* 1: 1001 0100 */
INLINE void subb_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@ -837,36 +876,36 @@ INLINE void subb_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, @R0/@R1 /* 1: 1001 011i */
INLINE void subb_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
INLINE void subb_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
UINT8 data = R_REG(r); //Grab data from R0 - R7
UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SWAP A /* 1: 1100 0100 */
INLINE void swap_a(void)
{
UINT8 a_nib_lo, a_nib_hi;
a_nib_hi = (R_ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
a_nib_lo = (R_ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
SFR_W(ACC, a_nib_hi | a_nib_lo);
a_nib_hi = (ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
a_nib_lo = (ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
SET_ACC( a_nib_hi | a_nib_lo);
}
//XCH A, data addr /* 1: 1100 0101 */
@ -874,37 +913,37 @@ INLINE void xch_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data
UINT8 oldACC = R_ACC; //Hold value of ACC
SFR_W(ACC,data); //Sets ACC to data
UINT8 oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
IRAM_W(addr,oldACC); //Sets data address to old value of ACC
}
//XCH A, @RO/@R1 /* 1: 1100 011i */
INLINE void xch_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data pointed to by R0 or R1
UINT8 oldACC = R_ACC; //Hold value of ACC
SFR_W(ACC,data); //Sets ACC to data
IRAM_W(R_R(r),oldACC); //Sets data address to old value of ACC
UINT8 data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
UINT8 oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
IRAM_W(R_REG(r),oldACC); //Sets data address to old value of ACC
}
//XCH A, RO to R7 /* 1: 1100 1rrr */
INLINE void xch_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0-R7
UINT8 oldACC = R_ACC; //Hold value of ACC
SFR_W(ACC,data); //Sets ACC to data
R_R(r) = oldACC; //Sets data address to old value of ACC
UINT8 data = R_REG(r); //Grab data from R0-R7
UINT8 oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
SET_REG(r, oldACC); //Sets data address to old value of ACC
}
//XCHD A, @R0/@R1 /* 1: 1101 011i */
INLINE void xchd_a_ir(int r)
{
UINT8 acc, ir_data;
ir_data = IRAM_IR(R_R(r)); //Grab data pointed to by R0 or R1
acc = R_ACC; //Grab ACC value
SFR_W(ACC, (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
IRAM_W(R_R(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
acc = ACC; //Grab ACC value
SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
IRAM_W(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
}
//XRL data addr, A /* 1: 0110 0010 */
@ -912,7 +951,7 @@ INLINE void xrl_mem_a(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data ^ R_ACC); //Set data address value to it's value Logical XOR with ACC
IRAM_W(addr,data ^ ACC); //Set data address value to it's value Logical XOR with ACC
}
//XRL data addr, #data /* 1: 0110 0011 */
@ -928,7 +967,7 @@ INLINE void xrl_mem_byte(void)
INLINE void xrl_a_byte(void)
{
UINT8 data = ROP_ARG(PC++); //Grab data
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, data addr /* 1: 0110 0101 */
@ -936,25 +975,25 @@ INLINE void xrl_a_mem(void)
{
UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr); //Grab data from data address
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, @R0/@R1 /* 1: 0110 011i */
INLINE void xrl_a_ir(int r)
{
UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, R0 to R7 /* 1: 0110 1rrr */
INLINE void xrl_a_r(int r)
{
UINT8 data = R_R(r); //Grab data from R0 - R7
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
UINT8 data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//illegal opcodes
INLINE void illegal(void)
INLINE void illegal(UINT8 op)
{
LOG(("i8051 #%d: illegal opcode at 0x%03x: %02x\n", cpu_getactivecpu(), PC, ROP(PC)));
LOG(("i8051 #%d: illegal opcode at 0x%03x: %02x\n", cpu_getactivecpu(), PC-1, op));
}

9
src/mame/drivers/cardline.c
View File

@ -78,6 +78,7 @@ static READ8_HANDLER(unk_r)
{
static int var=0;
var^=0x10;
printf("var %d\n",var);
return var;
}
@ -98,7 +99,7 @@ static ADDRESS_MAP_START( mem_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mem_data, ADDRESS_SPACE_DATA, 8 )
static ADDRESS_MAP_START( mem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2003, 0x2003) AM_READ_PORT("IN0")
AM_RANGE(0x2005, 0x2005) AM_READ_PORT("IN1")
@ -113,11 +114,10 @@ static ADDRESS_MAP_START( mem_data, ADDRESS_SPACE_DATA, 8 )
AM_RANGE(0x3003, 0x3003) AM_NOP
AM_RANGE(0xc000, 0xdfff) AM_WRITE(vram_w) AM_BASE(&videoram)
AM_RANGE(0xe000, 0xffff) AM_WRITE(attr_w) AM_BASE(&colorram)
/* Ports */
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(unk_r, video_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x01, 0x01) AM_READWRITE(unk_r, video_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( cardline )
PORT_START("IN0")
@ -196,7 +196,6 @@ static MACHINE_DRIVER_START( cardline )
/* basic machine hardware */
MDRV_CPU_ADD("main", I8051,12000000)
MDRV_CPU_PROGRAM_MAP(mem_prg,0)
MDRV_CPU_DATA_MAP(mem_data,0)
MDRV_CPU_IO_MAP(mem_io,0)
/* video hardware */

6
src/mame/drivers/limenko.c
View File

@ -26,6 +26,7 @@
#include "driver.h"
#include "machine/eeprom.h"
#include "sound/okim6295.h"
#include "cpu/i8051/i8051.h"
static tilemap *bg_tilemap, *md_tilemap, *fg_tilemap;
static UINT32 *bg_videoram, *md_videoram, *fg_videoram, *limenko_videoreg;
@ -214,8 +215,8 @@ static READ8_HANDLER( spotty_sound_r )
}
static ADDRESS_MAP_START( spotty_sound_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0001, 0x0001) AM_READWRITE(spotty_sound_r, okim6295_data_0_w) //? sound latch and ?
AM_RANGE(0x0003, 0x0003) AM_READWRITE(spotty_sound_cmd_r, spotty_sound_cmd_w) //not sure about anything...
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(spotty_sound_r, okim6295_data_0_w) //? sound latch and ?
AM_RANGE(MCS51_PORT_P3, MCS51_PORT_P3) AM_READWRITE(spotty_sound_cmd_r, spotty_sound_cmd_w) //not sure about anything...
ADDRESS_MAP_END
/*****************************************************************************************************
@ -675,7 +676,6 @@ static MACHINE_DRIVER_START( spotty )
MDRV_CPU_ADD("audio", I8051, 4000000) /* 4 MHz */
MDRV_CPU_PROGRAM_MAP(spotty_sound_prg_map, 0)
MDRV_CPU_DATA_MAP(0, 0)
MDRV_CPU_IO_MAP(spotty_sound_io_map,0)
MDRV_NVRAM_HANDLER(93C46)

351
src/mame/drivers/m72.c
View File

@ -89,6 +89,7 @@ other supported games as well.
#include "iremipt.h"
#include "m72.h"
#include "cpu/nec/nec.h"
#include "cpu/i8051/i8051.h"
#define MASTER_CLOCK XTAL_32MHz
@ -98,6 +99,9 @@ other supported games as well.
static UINT16 *protection_ram;
static emu_timer *scanline_timer;
static UINT8 m72_irq_base;
static UINT8 mcu_snd_cmd_latch;
static UINT8 mcu_sample_latch;
static UINT32 mcu_sample_addr;
static TIMER_CALLBACK( m72_scanline_interrupt );
@ -108,11 +112,25 @@ static MACHINE_START( m72 )
scanline_timer = timer_alloc(m72_scanline_interrupt, NULL);
}
static TIMER_CALLBACK( synch_callback )
{
//cpu_boost_interleave(attotime_zero, ATTOTIME_IN_USEC(8000000));
cpu_boost_interleave(ATTOTIME_IN_HZ(MASTER_CLOCK/4/12), ATTOTIME_IN_SEC(8));
}
static MACHINE_RESET( m72 )
{
m72_irq_base = 0x20;
mcu_sample_addr = 0;
mcu_snd_cmd_latch = 0;
MACHINE_RESET_CALL(m72_sound);
state_save_register_global(mcu_sample_addr);
state_save_register_global(mcu_snd_cmd_latch);
timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
timer_call_after_resynch( NULL, 0, synch_callback);
}
static MACHINE_RESET( xmultipl )
@ -153,6 +171,170 @@ static TIMER_CALLBACK( m72_scanline_interrupt )
timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
}
/***************************************************************************
Protection emulation
Currently only available for lohtb2, since this is the only game
with a dumped 8751.
The protection device does
* provide startup code
* provide checksums
* feed samples to the sound cpu
***************************************************************************/
static TIMER_CALLBACK( delayed_ram16_w )
{
UINT16 val = ((UINT32) param) & 0xffff;
UINT16 offset = (((UINT32) param) >> 16) & 0xffff;
UINT16 *ram = ptr;
ram[offset] = val;
}
static TIMER_CALLBACK( mcu_irq0_clear )
{
cputag_set_input_line(machine, "mcu", 0, CLEAR_LINE);
}
static WRITE16_HANDLER( m72_main_mcu_sound_w )
{
if (data & 0xfff0)
logerror("sound_w: %04x %04x\n", mem_mask, data);
if (ACCESSING_BITS_0_7)
{
mcu_snd_cmd_latch = data;
cputag_set_input_line(machine, "mcu", 1, ASSERT_LINE);
}
}
static WRITE16_HANDLER( m72_main_mcu_w)
{
UINT16 val = protection_ram[offset];
COMBINE_DATA(&val);
/* 0x07fe is used for synchronization as well.
* This address however will not trigger an interrupt
*/
if (offset == 0x0fff/2 && ACCESSING_BITS_8_15)
{
protection_ram[offset] = val;
cputag_set_input_line(machine, "mcu", 0, ASSERT_LINE);
/* Line driven, most likely by write line */
timer_set(ATTOTIME_IN_CYCLES(2, mame_find_cpu_index(machine, "mcu")), NULL, 0, mcu_irq0_clear);
}
else
timer_call_after_resynch( protection_ram, (offset<<16) | val, delayed_ram16_w);
}
static WRITE8_HANDLER( m72_mcu_data_w )
{
UINT16 val;
if (offset&1) val = (protection_ram[offset/2] & 0x00ff) | (data << 8);
else val = (protection_ram[offset/2] & 0xff00) | (data&0xff);
timer_call_after_resynch( protection_ram, ((offset >>1 ) << 16) | val, delayed_ram16_w);
}
static READ8_HANDLER(m72_mcu_data_r )
{
UINT8 ret;
if (offset&1) ret = (protection_ram[offset/2] & 0xff00)>>8;
else ret = (protection_ram[offset/2] & 0x00ff);
return ret;
}
static INTERRUPT_GEN( m72_mcu_int )
{
mcu_snd_cmd_latch |= 0x11; /* 0x10 is special as well - FIXME */
cputag_set_input_line(machine, "mcu", 1, ASSERT_LINE);
}
static READ8_HANDLER(m72_mcu_sample_r )
{
UINT8 sample;
sample = memory_region(machine, "samples")[mcu_sample_addr++];
return sample;
}
static WRITE8_HANDLER(m72_mcu_ack_w )
{
cputag_set_input_line(machine, "mcu", 1, CLEAR_LINE);
mcu_snd_cmd_latch = 0;
}
static READ8_HANDLER(m72_mcu_snd_r )
{
return mcu_snd_cmd_latch;
}
static READ8_HANDLER(m72_mcu_port_r )
{
logerror("port read: %02x\n", offset);
return 0;
}
static WRITE8_HANDLER(m72_mcu_port_w )
{
if (offset == 1)
{
mcu_sample_latch = data;
cputag_set_input_line(machine, "sound", INPUT_LINE_NMI, PULSE_LINE);
}
else
logerror("port: %02x %02x\n", offset, data);
}
static WRITE8_HANDLER( m72_mcu_low_w )
{
mcu_sample_addr = (mcu_sample_addr & 0xffe000) | (data<<5);
logerror("low: %02x %02x %08x\n", offset, data, mcu_sample_addr);
}
static WRITE8_HANDLER( m72_mcu_high_w )
{
mcu_sample_addr = (mcu_sample_addr & 0x1fff) | (data<<(8+5));
logerror("high: %02x %02x %08x\n", offset, data, mcu_sample_addr);
}
static WRITE8_HANDLER( m72_snd_cpu_sample_w )
{
//dac_signed_data_w(0,data);
dac_data_w(0,data);
}
static READ8_HANDLER( m72_snd_cpu_sample_r )
{
return mcu_sample_latch;
}
INLINE DRIVER_INIT( loht_mcu )
{
int cpunum = mame_find_cpu_index(machine, "main");
int sndnum = mame_find_cpu_index(machine, "sound");
protection_ram = auto_malloc(0x10000);
memory_install_read16_handler(machine, cpunum, ADDRESS_SPACE_PROGRAM, 0xb0000, 0xbffff, 0, 0, SMH_BANK1);
memory_install_write16_handler(machine, cpunum, ADDRESS_SPACE_PROGRAM, 0xb0000, 0xb0fff, 0, 0, m72_main_mcu_w);
memory_set_bankptr(1, protection_ram);
//memory_install_write16_handler(machine, cpunum, ADDRESS_SPACE_IO, 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
memory_install_write16_handler(machine, cpunum, ADDRESS_SPACE_IO, 0xc0, 0xc1, 0, 0, m72_main_mcu_sound_w);
/* sound cpu */
memory_install_write8_handler(machine, sndnum, ADDRESS_SPACE_IO, 0x82, 0x82, 0xff, 0, m72_snd_cpu_sample_w);
memory_install_read8_handler (machine, sndnum, ADDRESS_SPACE_IO, 0x84, 0x84, 0xff, 0, m72_snd_cpu_sample_r);
}
/***************************************************************************
@ -541,70 +723,6 @@ static DRIVER_INIT( loht )
/* since we skip the startup tests, clear video RAM to prevent garbage on title screen */
memset(m72_videoram2,0,0x4000);
}
#if 0
int stepping = 0;
static TIMER_CALLBACK( single_step )
{
if (param>0)
timer_set( ATTOTIME_IN_NSEC(20), NULL, param-1, single_step);
else
stepping = 0;
}
static TIMER_CALLBACK( delayed_ram16_w )
{
UINT16 val = ((UINT32) param) & 0xffff;
UINT16 offset = (((UINT32) param) >> 16) & 0xffff;
UINT16 *ram = ptr;
ram[offset] = val;
if (!stepping)
{
stepping = 1;
timer_call_after_resynch( NULL, 50, single_step);
}
}
#else
static TIMER_CALLBACK( delayed_ram16_w )
{
UINT16 val = ((UINT32) param) & 0xffff;
UINT16 offset = (((UINT32) param) >> 16) & 0xffff;
UINT16 *ram = ptr;
ram[offset] = val;
}
#endif
static WRITE16_HANDLER( m72_main_mcu_w)
{
UINT16 val = protection_ram[offset];
COMBINE_DATA(&val);
if (offset == 0x0fff/2 && ACCESSING_BITS_8_15)
{
protection_ram[offset] = val;
cputag_set_input_line(machine, "mcu", 0, PULSE_LINE);
}
else
timer_call_after_resynch( protection_ram, (offset<<16) | val, delayed_ram16_w);
}
static DRIVER_INIT( loht_mcu )
{
int cpunum = mame_find_cpu_index(machine, "main");
protection_ram = auto_malloc(0x1000);
memset(protection_ram, 0xff, 0x1000);
memory_install_read16_handler(machine, cpunum, ADDRESS_SPACE_PROGRAM, 0xb0000, 0xb0fff, 0, 0, SMH_BANK1);
memory_install_write16_handler(machine, cpunum, ADDRESS_SPACE_PROGRAM, 0xb0000, 0xb0fff, 0, 0, m72_main_mcu_w);
memory_set_bankptr(1, protection_ram);
memory_install_write16_handler(machine, cpunum, ADDRESS_SPACE_IO, 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
}
static DRIVER_INIT( xmultipl )
{
@ -800,7 +918,7 @@ static ADDRESS_MAP_START( m72_portmap, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x02, 0x03) AM_WRITE(m72_port02_w) /* coin counters, reset sound cpu, other stuff? */
AM_RANGE(0x04, 0x05) AM_WRITE(m72_dmaon_w)
AM_RANGE(0x06, 0x07) AM_WRITE(m72_irq_line_w)
AM_RANGE(0x40, 0x43) AM_WRITE(SMH_NOP) /* Interrupt controller, only written to at bootup */
//AM_RANGE(0x40, 0x43) AM_WRITE(SMH_NOP) /* Interrupt controller, only written to at bootup */
AM_RANGE(0x80, 0x81) AM_WRITE(m72_scrolly1_w)
AM_RANGE(0x82, 0x83) AM_WRITE(m72_scrollx1_w)
AM_RANGE(0x84, 0x85) AM_WRITE(m72_scrolly2_w)
@ -916,6 +1034,42 @@ static ADDRESS_MAP_START( poundfor_sound_portmap, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x42, 0x42) AM_WRITE(m72_sound_irq_ack_w)
ADDRESS_MAP_END
#if 0
/* TODO: internal - should be removed */
static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
//ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
#endif
#if 0
static ADDRESS_MAP_START( mcu_data_map, ADDRESS_SPACE_DATA, 8 )
//ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0000) AM_READWRITE(m72_mcu_sample_r, m72_mcu_low_w)
AM_RANGE(0x0001, 0x0001) AM_WRITE(m72_mcu_high_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(m72_mcu_snd_r, m72_mcu_ack_w)
/* shared at b0000 - b0fff on the main cpu */
AM_RANGE(0xc000, 0xcfff) AM_RAM AM_READWRITE(m72_mcu_data_r,m72_mcu_data_w )
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_io_map, ADDRESS_SPACE_IO, 8 )
//ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0003) AM_READWRITE(m72_mcu_port_r, m72_mcu_port_w)
ADDRESS_MAP_END
#else
static ADDRESS_MAP_START( mcu_io_map, ADDRESS_SPACE_IO, 8 )
/* External access */
AM_RANGE(0x0000, 0x0000) AM_READWRITE(m72_mcu_sample_r, m72_mcu_low_w)
AM_RANGE(0x0001, 0x0001) AM_WRITE(m72_mcu_high_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(m72_mcu_snd_r, m72_mcu_ack_w)
/* shared at b0000 - b0fff on the main cpu */
AM_RANGE(0xc000, 0xcfff) AM_RAM AM_READWRITE(m72_mcu_data_r,m72_mcu_data_w )
/* Ports */
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READWRITE(m72_mcu_port_r, m72_mcu_port_w)
ADDRESS_MAP_END
#endif
#define COIN_MODE_1 \
PORT_DIPNAME( 0x00f0, 0x00f0, DEF_STR( Coinage ) ) PORT_CONDITION("DSW", 0x0400, PORTCOND_NOTEQUALS, 0x0000) PORT_DIPLOCATION("SW1:5,6,7,8") \
@ -1661,45 +1815,7 @@ static MACHINE_DRIVER_START( rtype )
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
static WRITE8_HANDLER( m72_mcu_data_w )
{
UINT16 val;
if (offset&1) val = (protection_ram[offset/2] & 0x00ff) | (data << 8);
else val = (protection_ram[offset/2] & 0xff00) | (data&0xff);
if (offset == 6 && data == 0xfe)
/* Hack - The v30 overshoots and will not see the unlock written to offset 6
* We thus delay the lock, i.e. storing an unconditional branch to 6
* here. This is highly time critical ... */
timer_set(ATTOTIME_IN_USEC(10), protection_ram, ((offset >>1 ) << 16) | val, delayed_ram16_w);
else
timer_call_after_resynch( protection_ram, ((offset >>1 ) << 16) | val, delayed_ram16_w);
}
static READ8_HANDLER(m72_mcu_data_r )
{
UINT8 ret;
if (offset&1) ret = (protection_ram[offset/2] & 0xff00)>>8;
else ret = (protection_ram[offset/2] & 0x00ff);
return ret;
}
static ADDRESS_MAP_START( mcu_data_map, ADDRESS_SPACE_DATA, 8 )
ADDRESS_MAP_UNMAP_HIGH
/* shared at b0000 - b0fff on the main cpu */
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(m72_mcu_data_r,m72_mcu_data_w )
ADDRESS_MAP_END
static MACHINE_DRIVER_START( m72 )
static MACHINE_DRIVER_START( m72_base )
/* basic machine hardware */
MDRV_CPU_ADD("main",V30,MASTER_CLOCK/2/2) /* 16 MHz external freq (8MHz internal) */
@ -1709,8 +1825,6 @@ static MACHINE_DRIVER_START( m72 )
MDRV_CPU_ADD("sound",Z80, SOUND_CLOCK)
MDRV_CPU_PROGRAM_MAP(sound_ram_map,0)
MDRV_CPU_IO_MAP(sound_portmap,0)
MDRV_CPU_VBLANK_INT_HACK(fake_nmi,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MDRV_MACHINE_START(m72)
MDRV_MACHINE_RESET(m72)
@ -1739,15 +1853,25 @@ static MACHINE_DRIVER_START( m72 )
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.40)
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( m72 )
MDRV_IMPORT_FROM(m72_base)
MDRV_CPU_MODIFY("main")
MDRV_CPU_VBLANK_INT_HACK(fake_nmi,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( m72_8751 )
MDRV_IMPORT_FROM(m72)
MDRV_CPU_ADD("mcu",I8751, 16000000)
MDRV_CPU_PROGRAM_MAP(mcu_map,0)
MDRV_CPU_DATA_MAP(mcu_data_map,0)
//MDRV_CPU_VBLANK_INT("main", irq0_line_pulse)
MDRV_INTERLEAVE(1000)
MDRV_IMPORT_FROM(m72_base)
MDRV_CPU_ADD("mcu",I8751, MASTER_CLOCK/2)
/* internal - MDRV_CPU_PROGRAM_MAP(mcu_map,0) */
//MDRV_CPU_DATA_MAP(mcu_data_map,0)
MDRV_CPU_IO_MAP(mcu_io_map,0)
MDRV_CPU_VBLANK_INT("main", m72_mcu_int)
//MDRV_INTERLEAVE(1000)
MACHINE_DRIVER_END
@ -2158,6 +2282,7 @@ static MACHINE_DRIVER_START( cosmccop )
MACHINE_DRIVER_END
static const nec_config kengo_config ={ gunforce_decryption_table, };
static MACHINE_DRIVER_START( kengo )
MDRV_IMPORT_FROM( cosmccop )
MDRV_CPU_MODIFY("main")

93
src/mame/drivers/micro3d.c
View File

@ -108,20 +108,26 @@ enum{ RX=0,TX,STATUS,SYN1,SYN2,DLE,MODE1,MODE2,COMMAND
/* Probably wrong and a bit crap */
static int data_to_i8031(void)
{
mame_printf_debug("68k sent data: %x\n",M68681.TBB);
return M68681.TBB;
mame_printf_debug("68k sent data: %x\n",M68681.TBB);
M68681.SRB |=0x0400; // Data has been sent - TX ready for more.
// Write to sound board
if(M68681.IMR & 0x1000)
{
cpunum_set_input_line_and_vector(Machine, 0,3, HOLD_LINE, M68681.IVR); // Generate an interrupt, if allowed.
}
return M68681.TBB;
}
static void data_from_i8031(int data)
{
M68681.RBB = data<<8; // Put into receive buffer.
M68681.SRB |= 0x0100; // Set Receiver B ready.
if(M68681.IMR & 0x1000)
{
cpunum_set_input_line_and_vector(Machine, 0,3, HOLD_LINE, M68681.IVR); // Generate a receiver interrupt.
mame_printf_debug("INTERRUPT!!!\n");
}
mame_printf_debug("8031 sent data: %x\n",data);
M68681.RBB = data<<8; // Put into receive buffer.
M68681.SRB |= 0x0100; // Set Receiver B ready.
if(M68681.IMR & 0x1000)
{
cpunum_set_input_line_and_vector(Machine, 0,3, HOLD_LINE, M68681.IVR); // Generate a receiver interrupt.
mame_printf_debug("INTERRUPT!!!\n");
}
mame_printf_debug("8031 sent data: %x\n",data);
}
@ -205,14 +211,15 @@ static DRIVER_INIT( f15se )
static DRIVER_INIT( f15se21 )
{
#if 1
UINT16 *rom = (UINT16 *)memory_region(machine, "main");
rom[0x2A8B3]=0x6006; //055166: 6606 bne 5516e -> bra
rom[0x2A8BF]=0x4E71; //05517E: 6704 beq 55184 -> nop
rom[0x28AD1]=0x4E71; //0515A2: 67F8 beq 5159c -> nop
rom[0x28A9E]=0x4E71;
rom[0x28ABD]=0x4E71;
rom[0x28C3B]=0x4E71;
#endif
}
static INPUT_PORTS_START( stankatk )
@ -492,8 +499,6 @@ switch(offset)
}
/* I should really re-write all this. */
static WRITE16_HANDLER( m68681_w )
@ -537,6 +542,7 @@ switch(offset)
case 0x0a: break;
case 0x0b: M68681.TBB = value; // Fill transmit buffer
#if 0
M68681.SRB |=0x0400; // Data has been sent - TX ready for more.
// Write to sound board
if(M68681.IMR & 0x1000)
@ -545,6 +551,10 @@ switch(offset)
}
cpunum_set_input_line(machine, 2, I8051_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt
mame_printf_debug("Sound board TX: %4X at PC=%4X\n",value,activecpu_get_pc());
#endif
M68681.SRB &=~0x0400; // Data has been sent - TX ready for more.
cpunum_set_input_line(machine, 2, I8051_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt
mame_printf_debug("Sound board TX: %4X at PC=%4X\n",value,activecpu_get_pc());
break;
case 0x0c: //mame_printf_debug("IVR: %d",value);
@ -588,7 +598,8 @@ switch(offset)
case 0x09: return M68681.SRB; // Status Register B
case 0x0b: mame_printf_debug("\nHost received: %x\n",M68681.RBB);
M68681.SRB^=0x0100; // No longer have data.
M68681.SRB^=0x0100; // No longer have data.
//M68681.SRB &= ~0x0100; // No longer have data.
return M68681.RBB;
// RX B - Monitor Port
}
@ -786,36 +797,36 @@ ADDRESS_MAP_END
/* P1.7 = SELFTEST I P3.7 */
/*====================================================================*/
static UINT8 port_latch[4];
static WRITE8_HANDLER(sound_io_w)
{
switch(offset)
{
case 0x01: break;
case 0x03: //if(data & 0x4) speech_bank=0;
if(data & 0x10)
{
upd7759_0_reset_w(machine,0,0);
}
else
{
upd7759_0_reset_w(machine,0,1);
}
break;
}
port_latch[offset] = data;
switch(offset)
{
case 0x01:
break;
case 0x03:
upd7759_set_bank_base(0, (data & 0x4) ? 0x20000 : 0);
upd7759_0_reset_w(machine,0,(data & 0x10) ? 0 : 1);
}
}
static READ8_HANDLER(sound_io_r)
{
switch(offset)
{
case 0x01: return (port_latch[offset] & 0x7f) | input_port_read_safe(machine, "SOUND", 0); /* Test push switch */
case 0x03: return (port_latch[offset] & 0xf7) | (upd7759_0_busy_r(machine,0) ? 0x08 : 0);
default: return 0;
}
switch(offset)
{
case 0x01: return input_port_read_safe(machine, "SOUND", 0); /* Test push switch */
case 0x03: return (int)(upd7759_0_busy_r(machine,0))<<3;
default: return 0;
}
static WRITE8_HANDLER( upd7759_port_start_w)
{
upd7759_0_start_w(machine, offset, 0);
upd7759_0_port_w(machine, offset, data);
upd7759_0_start_w(machine, offset, 1);
}
static ADDRESS_MAP_START( soundmem_prg, ADDRESS_SPACE_PROGRAM, 8 )
@ -825,20 +836,17 @@ ADDRESS_MAP_END
/* FFXX - 00XX */
static ADDRESS_MAP_START( soundmem_data, ADDRESS_SPACE_DATA, 8 )
static ADDRESS_MAP_START( soundmem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0000, 0x07ff) AM_RAM /* 2Kb RAM */
AM_RANGE(0xfd00, 0xfd00) AM_WRITE(ym2151_register_port_0_w)
AM_RANGE(0xfd01, 0xfd01) AM_READWRITE(ym2151_status_port_0_r,ym2151_data_port_0_w)
AM_RANGE(0xfe00, 0xfe00) AM_WRITE(upd7759_0_port_w)
AM_RANGE(0xfe00, 0xfe00) AM_WRITE(upd7759_port_start_w)
AM_RANGE(0xff00, 0xff00) AM_WRITE(dac_0_data_w) /* DAC A - used for S&H, special effects? */
AM_RANGE(0xff01, 0xff01) AM_WRITE(dac_1_data_w) /* DAC B - 'SPEECH' */
/* ports */
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READWRITE(sound_io_r,sound_io_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( soundmem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0xff) AM_READWRITE(sound_io_r,sound_io_w)
ADDRESS_MAP_END
static const tms34010_config vgb_config =
{
@ -864,7 +872,6 @@ static MACHINE_DRIVER_START( micro3d )
MDRV_CPU_ADD("audio", I8051, 11059000)
MDRV_CPU_PROGRAM_MAP(soundmem_prg,0)
MDRV_CPU_DATA_MAP(soundmem_data,0)
MDRV_CPU_IO_MAP(soundmem_io,0)
MDRV_MACHINE_RESET(micro3d)

34
src/mame/drivers/peplus.c
View File

@ -487,16 +487,6 @@ static READ8_HANDLER( peplus_sf000_r )
return sf000_ram[offset];
}
/* External RAM Callback for I8052 */
static READ32_HANDLER( peplus_external_ram_iaddr )
{
if (mem_mask == 0xff) {
return (io_port[2] << 8) | offset;
} else {
return offset;
}
}
/* Last Color in Every Palette is bgcolor */
static READ8_HANDLER( peplus_bgcolor_r )
{
@ -541,7 +531,7 @@ static READ8_HANDLER( peplus_input_bank_a_r )
last_cycles = activecpu_gettotalcycles();
} else {
/* Process Next Coin Optic State */
if (curr_cycles - last_cycles > 600000 && coin_state != 0) {
if (curr_cycles - last_cycles > 600000/6 && coin_state != 0) {
coin_state++;
if (coin_state > 5)
coin_state = 0;
@ -571,7 +561,7 @@ static READ8_HANDLER( peplus_input_bank_a_r )
break;
}
if (curr_cycles - last_door > 6000) { // Guessing with 6000
if (curr_cycles - last_door > 6000/12) { // Guessing with 6000
if ((input_port_read_safe(machine, "DOOR",0xff) & 0x01) == 0x01) {
door_open = (!door_open & 0x01);
} else {
@ -580,7 +570,7 @@ static READ8_HANDLER( peplus_input_bank_a_r )
last_door = activecpu_gettotalcycles();
}
if (curr_cycles - last_coin_out > 600000 && coin_out_state != 0) { // Guessing with 600000
if (curr_cycles - last_coin_out > 600000/12 && coin_out_state != 0) { // Guessing with 600000
if (coin_out_state != 2) {
coin_out_state = 2; // Coin-Out Off
} else {
@ -711,7 +701,7 @@ static ADDRESS_MAP_START( peplus_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_ROM AM_BASE(&program_ram)
ADDRESS_MAP_END
static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
static ADDRESS_MAP_START( peplus_iomap, ADDRESS_SPACE_IO, 8 )
// Battery-backed RAM (0x1000-0x01fff Extended RAM for Superboards Only)
AM_RANGE(0x0000, 0x1fff) AM_READWRITE(peplus_cmos_r, peplus_cmos_w) AM_BASE(&cmos_ram)
@ -763,16 +753,11 @@ static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
// Superboard Data
AM_RANGE(0xf000, 0xffff) AM_READWRITE(peplus_sf000_r, peplus_sf000_w) AM_BASE(&sf000_ram)
/* Ports start here */
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READ(peplus_io_r) AM_WRITE(peplus_io_w) AM_BASE(&io_port)
ADDRESS_MAP_END
static ADDRESS_MAP_START( peplus_iomap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// I/O Ports
AM_RANGE(0x00, 0x03) AM_READ(peplus_io_r) AM_WRITE(peplus_io_w) AM_BASE(&io_port)
ADDRESS_MAP_END
/*************************
* Input ports *
*************************/
@ -1010,7 +995,7 @@ static MACHINE_DRIVER_START( peplus )
// basic machine hardware
MDRV_CPU_ADD("main", I8052, 3686400*2)
MDRV_CPU_PROGRAM_MAP(peplus_map, 0)
MDRV_CPU_DATA_MAP(peplus_datamap, 0)
//MDRV_CPU_DATA_MAP(peplus_datamap, 0)
MDRV_CPU_IO_MAP(peplus_iomap, 0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
@ -1047,9 +1032,6 @@ MACHINE_DRIVER_END
/* Normal board */
static void peplus_init(void)
{
/* External RAM callback */
i8051_set_eram_iaddr_callback(peplus_external_ram_iaddr);
/* EEPROM is a X2404P 4K-bit Serial I2C Bus */
i2cmem_init(0, I2CMEM_SLAVE_ADDRESS, 8, eeprom_NVRAM_SIZE, NULL);

9
src/mame/drivers/sliver.c
View File

@ -435,13 +435,11 @@ static ADDRESS_MAP_START( soundmem_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( soundmem_data, ADDRESS_SPACE_DATA, 8 )
static ADDRESS_MAP_START( soundmem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0100, 0x0100) AM_READWRITE( okim6295_status_0_r, okim6295_data_0_w )
AM_RANGE(0x0101, 0x0101) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( soundmem_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0001, 0x0001) AM_WRITE( oki_setbank )
/* ports */
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_WRITE( oki_setbank )
ADDRESS_MAP_END
static VIDEO_START(sliver)
@ -540,7 +538,6 @@ static MACHINE_DRIVER_START( sliver )
MDRV_CPU_ADD("audio", I8051, 8000000)
MDRV_CPU_PROGRAM_MAP(soundmem_prg,0)
MDRV_CPU_DATA_MAP(soundmem_data,0)
MDRV_CPU_IO_MAP(soundmem_io,0)

11
src/mame/drivers/sslam.c
View File

@ -494,8 +494,8 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0001, 0x0001) AM_WRITE(playmark_snd_control_w)
AM_RANGE(0x0003, 0x0003) AM_READWRITE(playmark_snd_command_r, playmark_oki_w)
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_WRITE(playmark_snd_control_w)
AM_RANGE(MCS51_PORT_P3, MCS51_PORT_P3) AM_READWRITE(playmark_snd_command_r, playmark_oki_w)
ADDRESS_MAP_END
/* Input Ports */
@ -735,7 +735,6 @@ static MACHINE_DRIVER_START( sslam )
MDRV_CPU_ADD("audio", I8051, 12000000)
MDRV_CPU_FLAGS(CPU_DISABLE) /* Internal code is not dumped - 2 boards were protected */
MDRV_CPU_PROGRAM_MAP(sound_map,0)
MDRV_CPU_IO_MAP(0,0)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
@ -829,7 +828,7 @@ ROM_START( sslam )
ROM_RELOAD ( 0xe00001, 0x80000 )
ROM_RELOAD ( 0xf00001, 0x80000 )
ROM_REGION( 0x0800, "audio", 0 )
ROM_REGION( 0x1000, "audio", 0 )
ROM_LOAD( "s87c751.bin", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x200000, "gfx1", ROMREGION_DISPOSE ) /* Bg */
@ -889,7 +888,7 @@ ROM_START( sslama )
ROM_RELOAD ( 0xe00001, 0x80000 )
ROM_RELOAD ( 0xf00001, 0x80000 )
ROM_REGION( 0x0800, "audio", 0 )
ROM_REGION( 0x1000, "audio", 0 )
ROM_LOAD( "s87c751.bin", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x200000, "gfx1", ROMREGION_DISPOSE ) /* Bg */
@ -920,7 +919,7 @@ ROM_START( powerbls )
ROM_LOAD16_BYTE( "21.u67", 0x00000, 0x40000, CRC(4e302381) SHA1(5685d15fd3137866093ff13b95a7df2265a8bc64) )
ROM_LOAD16_BYTE( "22.u66", 0x00001, 0x40000, CRC(89b70599) SHA1(57a5d71e4d8ca62fffe2e81116c5236d2194ae11) )
ROM_REGION( 0x0800, "audio", 0 )
ROM_REGION( 0x1000, "audio", 0 )
ROM_LOAD( "s87c751.bin", 0x0000, 0x0800, CRC(5b8b2d3a) SHA1(c3409243dfc0ca959a80f6890c87b4ce9eb0741d) )
ROM_REGION( 0x200000, "gfx1", ROMREGION_DISPOSE ) /* Bg */

15
src/mame/drivers/videopkr.c
View File

@ -899,15 +899,13 @@ static ADDRESS_MAP_START( i8051_sound_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8051_sound_dat, ADDRESS_SPACE_DATA, 8 )
AM_RANGE(0x0000, 0x1ff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8051_sound_port, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0x00) AM_READWRITE(baby_sound_p0_r, baby_sound_p0_w)
AM_RANGE(0x01, 0x01) AM_READWRITE(baby_sound_p1_r, baby_sound_p1_w)
AM_RANGE(0x02, 0x02) AM_READWRITE(baby_sound_p2_r, baby_sound_p2_w)
AM_RANGE(0x03, 0x03) AM_READWRITE(baby_sound_p3_r, baby_sound_p3_w)
AM_RANGE(0x0000, 0x1ff) AM_RAM
/* ports */
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P0) AM_READWRITE(baby_sound_p0_r, baby_sound_p0_w)
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(baby_sound_p1_r, baby_sound_p1_w)
AM_RANGE(MCS51_PORT_P2, MCS51_PORT_P2) AM_READWRITE(baby_sound_p2_r, baby_sound_p2_w)
AM_RANGE(MCS51_PORT_P3, MCS51_PORT_P3) AM_READWRITE(baby_sound_p3_r, baby_sound_p3_w)
ADDRESS_MAP_END
@ -1228,7 +1226,6 @@ static MACHINE_DRIVER_START( babypkr )
MDRV_CPU_REPLACE("main", I8039, CPU_CLOCK_ALT)
MDRV_CPU_REPLACE("sound", I8051, CPU_CLOCK )
MDRV_CPU_PROGRAM_MAP(i8051_sound_mem, 0)
MDRV_CPU_DATA_MAP(i8051_sound_dat, 0)
MDRV_CPU_IO_MAP(i8051_sound_port, 0)
/* video hardware */