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blame balrog for this :) (NW)

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This commit is contained in:
Cowering 2015-06-25 21:48:33 -05:00
parent 9306af2c50
commit a821b6c4be
91 changed files with 308 additions and 306 deletions
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2
src/emu/cpu/adsp2100/adsp2100.h
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@ -208,7 +208,7 @@ protected:
CHIP_TYPE_ADSP2104, CHIP_TYPE_ADSP2104,
CHIP_TYPE_ADSP2105, CHIP_TYPE_ADSP2105,
CHIP_TYPE_ADSP2115, CHIP_TYPE_ADSP2115,
CHIP_TYPE_ADSP2181, CHIP_TYPE_ADSP2181
}; };
// construction/destruction // construction/destruction

2
src/emu/cpu/alto2/a2curt.h
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@ -14,7 +14,7 @@
//! F2 functions for cursor task //! F2 functions for cursor task
enum { enum {
f2_curt_load_xpreg = f2_task_10, //!< f2 10: load x position register f2_curt_load_xpreg = f2_task_10, //!< f2 10: load x position register
f2_curt_load_csr = f2_task_11, //!< f2 11: load cursor shift register f2_curt_load_csr = f2_task_11 //!< f2 11: load cursor shift register
}; };
void f1_early_curt_block(); //!< f1_curt_block early: disable the cursor task and set the curt_blocks flag void f1_early_curt_block(); //!< f1_curt_block early: disable the cursor task and set the curt_blocks flag

2
src/emu/cpu/alto2/a2dht.h
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@ -14,7 +14,7 @@
//! F2 functions for display horizontal task //! F2 functions for display horizontal task
enum { enum {
f2_dht_evenfield = f2_task_10, //!< f2 10: load even field f2_dht_evenfield = f2_task_10, //!< f2 10: load even field
f2_dht_setmode = f2_task_11, //!< f2 11: set mode f2_dht_setmode = f2_task_11 //!< f2 11: set mode
}; };
void f1_early_dht_block(); //!< F1 func: disable the display word task void f1_early_dht_block(); //!< F1 func: disable the display word task

2
src/emu/cpu/alto2/a2ksec.h
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@ -36,7 +36,7 @@ enum {
f2_ksec_xfrdat = f2_task_13, //!< f2 13: branches NEXT[9] on !SEEKONLY f2_ksec_xfrdat = f2_task_13, //!< f2 13: branches NEXT[9] on !SEEKONLY
f2_ksec_swrnrdy = f2_task_14, //!< f2 14: branches NEXT[9] on !SWRDY f2_ksec_swrnrdy = f2_task_14, //!< f2 14: branches NEXT[9] on !SWRDY
f2_ksec_nfer = f2_task_15, //!< f2 15: branches NEXT[9] on !KFER f2_ksec_nfer = f2_task_15, //!< f2 15: branches NEXT[9] on !KFER
f2_ksec_strobon = f2_task_16, //!< f2 16: branches NEXT[9] on STROBE f2_ksec_strobon = f2_task_16 //!< f2 16: branches NEXT[9] on STROBE
//!< f2 17: undefined //!< f2 17: undefined
}; };

4
src/emu/cpu/alto2/a2kwd.h
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@ -26,7 +26,7 @@ enum {
f1_kwd_clrstat = f1_task_14, //!< f1 14: clear status register f1_kwd_clrstat = f1_task_14, //!< f1 14: clear status register
f1_kwd_load_kcom = f1_task_15, //!< f1 15: load kcom register f1_kwd_load_kcom = f1_task_15, //!< f1 15: load kcom register
f1_kwd_load_kadr = f1_task_16, //!< f1 16: load kadr register f1_kwd_load_kadr = f1_task_16, //!< f1 16: load kadr register
f1_kwd_load_kdata = f1_task_17, //!< f1 17: load kdata register f1_kwd_load_kdata = f1_task_17 //!< f1 17: load kdata register
}; };
//! F2 functions for disk word task //! F2 functions for disk word task
@ -37,7 +37,7 @@ enum {
f2_kwd_xfrdat = f2_task_13, //!< f2 13: branches NEXT[9] on !SEEKONLY f2_kwd_xfrdat = f2_task_13, //!< f2 13: branches NEXT[9] on !SEEKONLY
f2_kwd_swrnrdy = f2_task_14, //!< f2 14: branches NEXT[9] on !SWRDY f2_kwd_swrnrdy = f2_task_14, //!< f2 14: branches NEXT[9] on !SWRDY
f2_kwd_nfer = f2_task_15, //!< f2 15: branches NEXT[9] on !KFER f2_kwd_nfer = f2_task_15, //!< f2 15: branches NEXT[9] on !KFER
f2_kwd_strobon = f2_task_16, //!< f2 16: branches NEXT[9] on STROBE f2_kwd_strobon = f2_task_16 //!< f2 16: branches NEXT[9] on STROBE
//!< f2 17: undefined //!< f2 17: undefined
}; };

2
src/emu/cpu/alto2/alto2cpu.c
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@ -250,7 +250,7 @@ alto2_cpu_device::~alto2_cpu_device()
void alto2_cpu_device::set_diablo(int unit, diablo_hd_device* ptr) void alto2_cpu_device::set_diablo(int unit, diablo_hd_device* ptr)
{ {
logerror("%s: unit=%d diablo_hd_device=%p\n", __FUNCTION__, unit, ptr); logerror("%s: unit=%d diablo_hd_device=%p\n", __FUNCTION__, unit, (void *) ptr);
m_drive[unit] = ptr; m_drive[unit] = ptr;
} }

6
src/emu/cpu/am29000/am29000.h
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@ -273,7 +273,7 @@ enum
SPR_CR = 135, SPR_CR = 135,
SPR_FPE = 160, SPR_FPE = 160,
SPR_INTE = 161, SPR_INTE = 161,
SPR_FPS = 162, SPR_FPS = 162
}; };
@ -282,7 +282,7 @@ enum
SPACE_INSTRUCTION = 0, SPACE_INSTRUCTION = 0,
SPACE_DATA, SPACE_DATA,
SPACE_IO, SPACE_IO,
SPACE_COPROCESSOR, SPACE_COPROCESSOR
}; };
@ -319,7 +319,7 @@ enum
EXCEPTION_MULTMU = 31, EXCEPTION_MULTMU = 31,
EXCEPTION_MULTIPLY = 32, EXCEPTION_MULTIPLY = 32,
EXCEPTION_DIVIDE = 33, EXCEPTION_DIVIDE = 33,
EXCEPTION_MULTIPLU = 44, // TODO: FINISH ME EXCEPTION_MULTIPLU = 44 // TODO: FINISH ME
}; };

4
src/emu/cpu/arm7/arm7.c
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@ -168,14 +168,14 @@ void arm7_cpu_device::set_cpsr(UINT32 val)
enum enum
{ {
TLB_COARSE = 0, TLB_COARSE = 0,
TLB_FINE, TLB_FINE
}; };
enum enum
{ {
FAULT_NONE = 0, FAULT_NONE = 0,
FAULT_DOMAIN, FAULT_DOMAIN,
FAULT_PERMISSION, FAULT_PERMISSION
}; };

2
src/emu/cpu/arm7/arm7core.h
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@ -148,7 +148,7 @@ enum
eARM_ARCHFLAGS_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110) eARM_ARCHFLAGS_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
eARM_ARCHFLAGS_SA = 16, // StrongARM extensions (enhanced TLB) eARM_ARCHFLAGS_SA = 16, // StrongARM extensions (enhanced TLB)
eARM_ARCHFLAGS_XSCALE = 32, // XScale extensions (CP14, enhanced TLB) eARM_ARCHFLAGS_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
eARM_ARCHFLAGS_MODE26 = 64, // supports 26-bit backwards compatibility mode eARM_ARCHFLAGS_MODE26 = 64 // supports 26-bit backwards compatibility mode
}; };

2
src/emu/cpu/arm7/arm7drc.inc
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@ -671,7 +671,7 @@ void arm7_cpu_device::static_generate_check_irq()
UML_LABEL(block, done); // done: UML_LABEL(block, done); // done:
block->end(); block->end();
}; }
/*------------------------------------------------- /*-------------------------------------------------
static_generate_nocode_handler - generate an static_generate_nocode_handler - generate an

2
src/emu/cpu/avr8/avr8.c
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@ -95,7 +95,7 @@ enum
AVR8_SREG_S, AVR8_SREG_S,
AVR8_SREG_H, AVR8_SREG_H,
AVR8_SREG_T, AVR8_SREG_T,
AVR8_SREG_I, AVR8_SREG_I
}; };
// I/O Enums // I/O Enums

18
src/emu/cpu/avr8/avr8.h
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@ -354,7 +354,7 @@ enum
AVR8_Y, AVR8_Y,
AVR8_Z, AVR8_Z,
AVR8_SPH, AVR8_SPH,
AVR8_SPL, AVR8_SPL
}; };
enum enum
@ -414,7 +414,7 @@ enum
ATMEGA644_INT_EE_RDY, ATMEGA644_INT_EE_RDY,
ATMEGA644_INT_ANALOG_COMP, ATMEGA644_INT_ANALOG_COMP,
ATMEGA644_INT_TWI, ATMEGA644_INT_TWI,
ATMEGA644_INT_SPM_RDY, ATMEGA644_INT_SPM_RDY
}; };
// Used by I/O register handling // Used by I/O register handling
@ -731,7 +731,7 @@ enum
//0x133: Reserved //0x133: Reserved
AVR8_REGIDX_UBRR3L = 0x134, AVR8_REGIDX_UBRR3L = 0x134,
AVR8_REGIDX_UBRR3H, AVR8_REGIDX_UBRR3H,
AVR8_REGIDX_UDR3, AVR8_REGIDX_UDR3
//0x137: Reserved //0x137: Reserved
// . // .
// . up to // . up to
@ -766,7 +766,7 @@ enum
AVR8_REG_H, AVR8_REG_H,
AVR8_REG_J, AVR8_REG_J,
AVR8_REG_K, AVR8_REG_K,
AVR8_REG_L, AVR8_REG_L
}; };
enum enum
@ -801,7 +801,7 @@ enum
AVR8_INTIDX_TOV5, AVR8_INTIDX_TOV5,
//--------------------------------- //---------------------------------
AVR8_INTIDX_COUNT, AVR8_INTIDX_COUNT
}; };
//lock bit masks //lock bit masks
@ -812,7 +812,7 @@ enum
BLB01 = (1 << 2), BLB01 = (1 << 2),
BLB02 = (1 << 3), BLB02 = (1 << 3),
BLB11 = (1 << 4), BLB11 = (1 << 4),
BLB12 = (1 << 5), BLB12 = (1 << 5)
}; };
//extended fuses bit masks //extended fuses bit masks
@ -820,7 +820,7 @@ enum
{ {
BODLEVEL0 = (1 << 0), BODLEVEL0 = (1 << 0),
BODLEVEL1 = (1 << 1), BODLEVEL1 = (1 << 1),
BODLEVEL2 = (1 << 2), BODLEVEL2 = (1 << 2)
}; };
//high fuses bit masks //high fuses bit masks
@ -833,7 +833,7 @@ enum
WDTON = (1 << 4), WDTON = (1 << 4),
SPIEN = (1 << 5), SPIEN = (1 << 5),
JTAGEN = (1 << 6), JTAGEN = (1 << 6),
OCDEN = (1 << 7), OCDEN = (1 << 7)
}; };
//low fuses bit masks //low fuses bit masks
@ -846,7 +846,7 @@ enum
SUT0 = (1 << 4), SUT0 = (1 << 4),
SUT1 = (1 << 5), SUT1 = (1 << 5),
CKOUT = (1 << 6), CKOUT = (1 << 6),
CKDIV8 = (1 << 7), CKDIV8 = (1 << 7)
}; };
#define AVR8_EEARH_MASK 0x01 #define AVR8_EEARH_MASK 0x01

2
src/emu/cpu/cosmac/cosmac.h
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@ -165,7 +165,7 @@ enum
COSMAC_INPUT_LINE_EF1, COSMAC_INPUT_LINE_EF1,
COSMAC_INPUT_LINE_EF2, COSMAC_INPUT_LINE_EF2,
COSMAC_INPUT_LINE_EF3, COSMAC_INPUT_LINE_EF3,
COSMAC_INPUT_LINE_EF4, COSMAC_INPUT_LINE_EF4
}; };

18
src/emu/cpu/cubeqcpu/cubeqcpu.c
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@ -32,7 +32,7 @@ enum alu_src
ZA = 4, ZA = 4,
DA = 5, DA = 5,
DQ = 6, DQ = 6,
DZ = 7, DZ = 7
}; };
enum alu_ins enum alu_ins
@ -44,7 +44,7 @@ enum alu_ins
AND = 4, AND = 4,
NOTRS = 5, NOTRS = 5,
EXOR = 6, EXOR = 6,
EXNOR = 7, EXNOR = 7
}; };
enum alu_dst enum alu_dst
@ -56,7 +56,7 @@ enum alu_dst
RAMQD = 4, RAMQD = 4,
RAMD = 5, RAMD = 5,
RAMQU = 6, RAMQU = 6,
RAMU = 7, RAMU = 7
}; };
/*************************************************************************** /***************************************************************************
@ -496,7 +496,7 @@ enum snd_latch_type
{ {
PLTCH = 0, PLTCH = 0,
DAC = 1, DAC = 1,
ADLATCH = 2, ADLATCH = 2
}; };
int cquestsnd_cpu_device::do_sndjmp(int jmp) int cquestsnd_cpu_device::do_sndjmp(int jmp)
@ -728,7 +728,7 @@ enum rot_spf
SPF_DIV = 6, SPF_DIV = 6,
SPF_MULT = 7, SPF_MULT = 7,
SPF_DRED = 8, SPF_DRED = 8,
SPF_DWRT = 9, SPF_DWRT = 9
}; };
enum rot_yout enum rot_yout
@ -740,7 +740,7 @@ enum rot_yout
YOUT_Y2DAD = 4, YOUT_Y2DAD = 4,
YOUT_Y2DYN = 5, YOUT_Y2DYN = 5,
YOUT_Y2R = 6, YOUT_Y2R = 6,
YOUT_Y2D = 7, YOUT_Y2D = 7
}; };
/* Sync is asserted for the duration of every fourth cycle */ /* Sync is asserted for the duration of every fourth cycle */
@ -1098,7 +1098,7 @@ enum line_spf
LSPF_PWRT = 4, LSPF_PWRT = 4,
LSPF_MULT = 5, LSPF_MULT = 5,
LSPF_LSTOP = 6, LSPF_LSTOP = 6,
LSPF_BRES = 7, LSPF_BRES = 7
}; };
enum line_latch enum line_latch
@ -1110,7 +1110,7 @@ enum line_latch
LLATCH_BADLATCH = 4, LLATCH_BADLATCH = 4,
LLATCH_FADLATCH = 5, LLATCH_FADLATCH = 5,
LLATCH_CLATCH = 6, LLATCH_CLATCH = 6,
LLATCH_ZLATCH = 7, LLATCH_ZLATCH = 7
}; };
enum sreg_bits enum sreg_bits
@ -1122,7 +1122,7 @@ enum sreg_bits
SREG_LE0 = 4, SREG_LE0 = 4,
SREG_LDX_DY = 5, SREG_LDX_DY = 5,
SREG_LDY = 6, SREG_LDY = 6,
SREG_LDX = 7, SREG_LDX = 7
}; };
int cquestlin_cpu_device::do_linjmp(int jmp) int cquestlin_cpu_device::do_linjmp(int jmp)

6
src/emu/cpu/cubeqcpu/cubeqcpu.h
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@ -48,7 +48,7 @@ enum
CQUESTSND_RAMF, CQUESTSND_RAMF,
CQUESTSND_RTNLATCH, CQUESTSND_RTNLATCH,
CQUESTSND_ADRCNTR, CQUESTSND_ADRCNTR,
CQUESTSND_DINLATCH, CQUESTSND_DINLATCH
}; };
enum enum
@ -80,7 +80,7 @@ enum
CQUESTROT_DSRCLATCH, CQUESTROT_DSRCLATCH,
CQUESTROT_RSRCLATCH, CQUESTROT_RSRCLATCH,
CQUESTROT_LDADDR, CQUESTROT_LDADDR,
CQUESTROT_LDDATA, CQUESTROT_LDDATA
}; };
enum enum
@ -110,7 +110,7 @@ enum
CQUESTLIN_XCNT, CQUESTLIN_XCNT,
CQUESTLIN_YCNT, CQUESTLIN_YCNT,
CQUESTLIN_CLATCH, CQUESTLIN_CLATCH,
CQUESTLIN_ZLATCH, CQUESTLIN_ZLATCH
}; };

2
src/emu/cpu/drcbec.c
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@ -127,7 +127,7 @@ enum
OP_FFRI4, OP_FFRI4,
OP_FFRI8, OP_FFRI8,
OP_FFRFS, OP_FFRFS,
OP_FFRFD, OP_FFRFD
}; };

32
src/emu/cpu/esrip/esrip.c
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@ -514,7 +514,7 @@ enum
ACC, ACC,
Y_BUS, Y_BUS,
STATUS, STATUS,
RAM, RAM
}; };
/************************************* /*************************************
@ -652,7 +652,7 @@ enum
SOI = 0x7, SOI = 0x7,
SOZ = 0x8, SOZ = 0x8,
SOZE = 0x9, SOZE = 0x9,
SOSE = 0xa, SOSE = 0xa
}; };
enum enum
@ -660,7 +660,7 @@ enum
NRY = 0, NRY = 0,
NRA = 1, NRA = 1,
NRS = 4, NRS = 4,
NRAS = 5, NRAS = 5
}; };
void esrip_device::sonr(UINT16 inst) void esrip_device::sonr(UINT16 inst)
@ -842,7 +842,7 @@ void esrip_device::tor1(UINT16 inst)
TODRY = 0xb, TODRY = 0xb,
TORAR = 0xc, TORAR = 0xc,
TORIR = 0xe, TORIR = 0xe,
TODRR = 0xf, TODRR = 0xf
}; };
switch (SRC) switch (SRC)
@ -932,7 +932,7 @@ void esrip_device::tor2(UINT16 inst)
{ {
TODAR = 0x1, TODAR = 0x1,
TOAIR = 0x2, TOAIR = 0x2,
TODIR = 0x5, TODIR = 0x5
}; };
switch (SRC) switch (SRC)
@ -1072,7 +1072,7 @@ void esrip_device::bonr(UINT16 inst)
A2NDY = 0x14, A2NDY = 0x14,
S2NDY = 0x15, S2NDY = 0x15,
LD2NY = 0x16, LD2NY = 0x16,
LDC2NY = 0x17, LDC2NY = 0x17
}; };
UINT16 res = 0; UINT16 res = 0;
@ -1189,7 +1189,7 @@ void esrip_device::bor1(UINT16 inst)
{ {
SETNR = 0xd, SETNR = 0xd,
RSTNR = 0xe, RSTNR = 0xe,
TSTNR = 0xf, TSTNR = 0xf
}; };
UINT16 res = 0; UINT16 res = 0;
@ -1234,7 +1234,7 @@ void esrip_device::bor2(UINT16 inst)
LD2NR = 0xc, LD2NR = 0xc,
LDC2NR = 0xd, LDC2NR = 0xd,
A2NR = 0xe, A2NR = 0xe,
S2NR = 0xf, S2NR = 0xf
}; };
UINT32 res = 0; UINT32 res = 0;
@ -1300,7 +1300,7 @@ void esrip_device::rotr1(UINT16 inst)
{ {
RTRA = 0xc, RTRA = 0xc,
RTRY = 0xd, RTRY = 0xd,
RTRR = 0xf, RTRR = 0xf
}; };
UINT16 u = 0; UINT16 u = 0;
@ -1335,7 +1335,7 @@ void esrip_device::rotr2(UINT16 inst)
enum enum
{ {
RTAR = 0, RTAR = 0,
RTDR = 1, RTDR = 1
}; };
UINT16 u = 0; UINT16 u = 0;
@ -1364,7 +1364,7 @@ void esrip_device::rotnr(UINT16 inst)
RTDY = 0x18, RTDY = 0x18,
RTDA = 0x19, RTDA = 0x19,
RTAY = 0x1c, RTAY = 0x1c,
RTAA = 0x1d, RTAA = 0x1d
}; };
UINT16 u = 0; UINT16 u = 0;
@ -1466,7 +1466,7 @@ enum
SHDN1 = 5, SHDN1 = 5,
SHDNL = 6, SHDNL = 6,
SHDNC = 7, SHDNC = 7,
SHDNOV = 8, SHDNOV = 8
}; };
#define SET_LINK_flag(x) (m_new_status &= ~L_FLAG); \ #define SET_LINK_flag(x) (m_new_status &= ~L_FLAG); \
@ -1522,7 +1522,7 @@ void esrip_device::shftr(UINT16 inst)
enum enum
{ {
SHRR = 6, SHRR = 6,
SHDR = 7, SHDR = 7
}; };
UINT16 u = 0; UINT16 u = 0;
@ -1547,7 +1547,7 @@ void esrip_device::shftnr(UINT16 inst)
enum enum
{ {
SHA = 6, SHA = 6,
SHD = 7, SHD = 7
}; };
UINT16 u = 0; UINT16 u = 0;
@ -1591,7 +1591,7 @@ void esrip_device::rstst(UINT16 inst)
RL = 0x5, RL = 0x5,
RF1 = 0x6, RF1 = 0x6,
RF2 = 0x9, RF2 = 0x9,
RF3 = 0xa, RF3 = 0xa
}; };
switch (inst & 0x1f) switch (inst & 0x1f)
@ -1614,7 +1614,7 @@ void esrip_device::setst(UINT16 inst)
SL = 0x5, SL = 0x5,
SF1 = 0x6, SF1 = 0x6,
SF2 = 0x9, SF2 = 0x9,
SF3 = 0xa, SF3 = 0xa
}; };
switch (inst & 0x1f) switch (inst & 0x1f)

2
src/emu/cpu/esrip/esrip.h
View File

@ -97,7 +97,7 @@ enum
ESRIP_ADRL, ESRIP_ADRL,
ESRIP_ADRR, ESRIP_ADRR,
ESRIP_COLR, ESRIP_COLR,
ESRIP_IADDR, ESRIP_IADDR
}; };

2
src/emu/cpu/h6280/h6280.h
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@ -179,7 +179,7 @@ protected:
void prefix##_f8(); void prefix##_f9(); void prefix##_fa(); void prefix##_fb(); \ void prefix##_f8(); void prefix##_f9(); void prefix##_fa(); void prefix##_fb(); \
void prefix##_fc(); void prefix##_fd(); void prefix##_fe(); void prefix##_ff(); void prefix##_fc(); void prefix##_fd(); void prefix##_fe(); void prefix##_ff();
PROTOTYPES(op); PROTOTYPES(op)
UINT32 translated(UINT16 addr); UINT32 translated(UINT16 addr);
void h6280_cycles(int cyc); void h6280_cycles(int cyc);

10
src/emu/cpu/h8/h8.h
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@ -43,7 +43,7 @@ public:
ADC_4, ADC_4,
ADC_5, ADC_5,
ADC_6, ADC_6,
ADC_7, ADC_7
}; };
h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate); h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate);
@ -65,7 +65,7 @@ protected:
enum { enum {
STATE_RESET = 0x10000, STATE_RESET = 0x10000,
STATE_IRQ = 0x10001, STATE_IRQ = 0x10001,
STATE_TRACE = 0x10002, STATE_TRACE = 0x10002
}; };
enum { enum {
@ -80,7 +80,7 @@ protected:
EXR_T = 0x80, EXR_T = 0x80,
EXR_NC = 0x78, EXR_NC = 0x78,
EXR_I = 0x07, EXR_I = 0x07
}; };
enum { enum {
@ -138,7 +138,7 @@ protected:
DASM_ccr, /* internal register ccr */ DASM_ccr, /* internal register ccr */
DASM_exr, /* internal register exr */ DASM_exr, /* internal register exr */
DASM_macl, /* internal register macl */ DASM_macl, /* internal register macl */
DASM_mach, /* internal register mach */ DASM_mach /* internal register mach */
}; };
// device-level overrides // device-level overrides
@ -469,7 +469,7 @@ enum {
H8_E6, H8_E6,
H8_E7, H8_E7,
H8_CCR, H8_CCR,
H8_EXR, H8_EXR
}; };
#endif #endif

2
src/emu/cpu/h8/h8_sci.h
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@ -59,7 +59,7 @@ public:
protected: protected:
enum { enum {
ST_IDLE, ST_START, ST_BIT, ST_PARITY, ST_STOP, ST_LAST_TICK, ST_IDLE, ST_START, ST_BIT, ST_PARITY, ST_STOP, ST_LAST_TICK
}; };
static const char *const state_names[]; static const char *const state_names[];

4
src/emu/cpu/h8/h8_timer16.h
View File

@ -54,7 +54,7 @@ public:
DIV_512, DIV_512,
DIV_1024, DIV_1024,
DIV_2048, DIV_2048,
DIV_4096, DIV_4096
}; };
enum { enum {
@ -69,7 +69,7 @@ public:
IRQ_D = 0x08, IRQ_D = 0x08,
IRQ_V = 0x10, IRQ_V = 0x10,
IRQ_U = 0x20, IRQ_U = 0x20,
IRQ_TRIG = 0x40, IRQ_TRIG = 0x40
}; };

2
src/emu/cpu/hcd62121/hcd62121.h
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@ -16,7 +16,7 @@ enum
HCD62121_R40, HCD62121_R44, HCD62121_R48, HCD62121_R4C, HCD62121_R40, HCD62121_R44, HCD62121_R48, HCD62121_R4C,
HCD62121_R50, HCD62121_R54, HCD62121_R58, HCD62121_R5C, HCD62121_R50, HCD62121_R54, HCD62121_R58, HCD62121_R5C,
HCD62121_R60, HCD62121_R64, HCD62121_R68, HCD62121_R6C, HCD62121_R60, HCD62121_R64, HCD62121_R68, HCD62121_R6C,
HCD62121_R70, HCD62121_R74, HCD62121_R78, HCD62121_R7C, HCD62121_R70, HCD62121_R74, HCD62121_R78, HCD62121_R7C
}; };

2
src/emu/cpu/hd61700/hd61700.h
View File

@ -46,7 +46,7 @@ enum
{ {
HD61700_PC=1, HD61700_F, HD61700_SX, HD61700_SY, HD61700_SZ, HD61700_PE, HD61700_PD, HD61700_PC=1, HD61700_F, HD61700_SX, HD61700_SY, HD61700_SZ, HD61700_PE, HD61700_PD,
HD61700_IB, HD61700_UA, HD61700_IA, HD61700_IE, HD61700_TM, HD61700_IX, HD61700_IB, HD61700_UA, HD61700_IA, HD61700_IE, HD61700_TM, HD61700_IX,
HD61700_IY, HD61700_IZ, HD61700_US, HD61700_SS, HD61700_KY, HD61700_MAINREG, HD61700_IY, HD61700_IZ, HD61700_US, HD61700_SS, HD61700_KY, HD61700_MAINREG
}; };
// input lines // input lines

2
src/emu/cpu/i386/i386dasm.c
View File

@ -70,7 +70,7 @@ enum
PARAM_XMM0, PARAM_XMM0,
PARAM_XMM64, /* 64-bit memory or XMM register */ PARAM_XMM64, /* 64-bit memory or XMM register */
PARAM_XMM32, /* 32-bit memory or XMM register */ PARAM_XMM32, /* 32-bit memory or XMM register */
PARAM_XMM16, /* 16-bit memory or XMM register */ PARAM_XMM16 /* 16-bit memory or XMM register */
}; };
enum enum

4
src/emu/cpu/i386/i386priv.h
View File

@ -209,7 +209,7 @@ enum smram
SMRAM_EIP = 0x1F0, SMRAM_EIP = 0x1F0,
SMRAM_EFLAGS = 0x1F4, SMRAM_EFLAGS = 0x1F4,
SMRAM_CR3 = 0x1F8, SMRAM_CR3 = 0x1F8,
SMRAM_CR0 = 0x1FC, SMRAM_CR0 = 0x1FC
}; };
enum smram_intel_p5 enum smram_intel_p5
@ -245,7 +245,7 @@ enum smram_intel_p5
SMRAM_IP5_IDTACC = 0x198, SMRAM_IP5_IDTACC = 0x198,
SMRAM_IP5_TRLIM = 0x19C, SMRAM_IP5_TRLIM = 0x19C,
SMRAM_IP5_TRBASE = 0x1A0, SMRAM_IP5_TRBASE = 0x1A0,
SMRAM_IP5_TRACC = 0x1A4, SMRAM_IP5_TRACC = 0x1A4
}; };
/* Protected mode exceptions */ /* Protected mode exceptions */

2
src/emu/cpu/i8008/i8008.c
View File

@ -42,7 +42,7 @@ i8008_device::i8008_device(const machine_config &mconfig, const char *tag, devic
{ {
// set our instruction counter // set our instruction counter
m_icountptr = &m_icount; m_icountptr = &m_icount;
}; }
//------------------------------------------------- //-------------------------------------------------
// device_start - start up the device // device_start - start up the device

2
src/emu/cpu/i86/i286.h
View File

@ -57,7 +57,7 @@ enum
I286_LDTR, I286_LDTR,
I286_LDTR_BASE, I286_LDTR_BASE,
I286_LDTR_LIMIT, I286_LDTR_LIMIT,
I286_LDTR_FLAGS, I286_LDTR_FLAGS
}; };
class i80286_cpu_device : public i8086_common_cpu_device class i80286_cpu_device : public i8086_common_cpu_device

2
src/emu/cpu/i860/i860.h
View File

@ -39,7 +39,7 @@ enum
I860_F0, I860_F1, I860_F2, I860_F3, I860_F4, I860_F5, I860_F6, I860_F7, I860_F8, I860_F9, I860_F0, I860_F1, I860_F2, I860_F3, I860_F4, I860_F5, I860_F6, I860_F7, I860_F8, I860_F9,
I860_F10, I860_F11, I860_F12, I860_F13, I860_F14, I860_F15, I860_F16, I860_F17, I860_F18, I860_F19, I860_F10, I860_F11, I860_F12, I860_F13, I860_F14, I860_F15, I860_F16, I860_F17, I860_F18, I860_F19,
I860_F20, I860_F21, I860_F22, I860_F23, I860_F24, I860_F25, I860_F26, I860_F27, I860_F28, I860_F29, I860_F20, I860_F21, I860_F22, I860_F23, I860_F24, I860_F25, I860_F26, I860_F27, I860_F28, I860_F29,
I860_F30, I860_F31, I860_F30, I860_F31
}; };

2
src/emu/cpu/ie15/ie15.c
View File

@ -37,7 +37,7 @@ ie15_device::ie15_device(const machine_config &mconfig, const char *tag, device_
{ {
// set our instruction counter // set our instruction counter
m_icountptr = &m_icount; m_icountptr = &m_icount;
}; }
//------------------------------------------------- //-------------------------------------------------
// device_start - start up the device // device_start - start up the device

2
src/emu/cpu/lh5801/lh5801.h
View File

@ -56,7 +56,7 @@ pc 8bit
// input lines // input lines
enum enum
{ {
LH5801_LINE_MI, //maskable interrupt LH5801_LINE_MI //maskable interrupt
}; };

2
src/emu/cpu/lr35902/lr35902.h
View File

@ -29,7 +29,7 @@ enum
/* Pseudo registers to keep track of the interrupt statuses */ /* Pseudo registers to keep track of the interrupt statuses */
LR35902_IE, LR35902_IF, LR35902_IE, LR35902_IF,
/* Pseudo register to change and check the cpu operating speed */ /* Pseudo register to change and check the cpu operating speed */
LR35902_SPEED, LR35902_SPEED
}; };

2
src/emu/cpu/m6502/deco16.h
View File

@ -54,7 +54,7 @@ protected:
enum { enum {
DECO16_IRQ_LINE = m6502_device::IRQ_LINE, DECO16_IRQ_LINE = m6502_device::IRQ_LINE,
DECO16_NMI_LINE = m6502_device::NMI_LINE, DECO16_NMI_LINE = m6502_device::NMI_LINE,
DECO16_SET_OVERFLOW = m6502_device::V_LINE, DECO16_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type DECO16; extern const device_type DECO16;

2
src/emu/cpu/m6502/m4510.h
View File

@ -74,7 +74,7 @@ protected:
enum { enum {
M4510_IRQ_LINE = m6502_device::IRQ_LINE, M4510_IRQ_LINE = m6502_device::IRQ_LINE,
M4510_NMI_LINE = m6502_device::NMI_LINE, M4510_NMI_LINE = m6502_device::NMI_LINE
}; };
extern const device_type M4510; extern const device_type M4510;

4
src/emu/cpu/m6502/m6502.h
View File

@ -77,7 +77,7 @@ protected:
}; };
enum { enum {
STATE_RESET = 0xff00, STATE_RESET = 0xff00
}; };
enum { enum {
@ -327,7 +327,7 @@ enum {
enum { enum {
M6502_IRQ_LINE = m6502_device::IRQ_LINE, M6502_IRQ_LINE = m6502_device::IRQ_LINE,
M6502_NMI_LINE = m6502_device::NMI_LINE, M6502_NMI_LINE = m6502_device::NMI_LINE,
M6502_SET_OVERFLOW = m6502_device::V_LINE, M6502_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type M6502; extern const device_type M6502;

2
src/emu/cpu/m6502/m6504.h
View File

@ -41,7 +41,7 @@ protected:
enum { enum {
M6504_IRQ_LINE = m6502_device::IRQ_LINE, M6504_IRQ_LINE = m6502_device::IRQ_LINE,
M6504_NMI_LINE = m6502_device::NMI_LINE, M6504_NMI_LINE = m6502_device::NMI_LINE,
M6504_SET_OVERFLOW = m6502_device::V_LINE, M6504_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type M6504; extern const device_type M6504;

2
src/emu/cpu/m6502/m6509.h
View File

@ -74,7 +74,7 @@ protected:
enum { enum {
M6509_IRQ_LINE = m6502_device::IRQ_LINE, M6509_IRQ_LINE = m6502_device::IRQ_LINE,
M6509_NMI_LINE = m6502_device::NMI_LINE, M6509_NMI_LINE = m6502_device::NMI_LINE,
M6509_SET_OVERFLOW = m6502_device::V_LINE, M6509_SET_OVERFLOW = m6502_device::V_LINE
}; };
enum { enum {

2
src/emu/cpu/m6502/m6510.h
View File

@ -91,7 +91,7 @@ protected:
enum { enum {
M6510_IRQ_LINE = m6502_device::IRQ_LINE, M6510_IRQ_LINE = m6502_device::IRQ_LINE,
M6510_NMI_LINE = m6502_device::NMI_LINE, M6510_NMI_LINE = m6502_device::NMI_LINE
}; };
extern const device_type M6510; extern const device_type M6510;

2
src/emu/cpu/m6502/m6510t.h
View File

@ -26,7 +26,7 @@ public:
enum { enum {
M6510T_IRQ_LINE = m6502_device::IRQ_LINE, M6510T_IRQ_LINE = m6502_device::IRQ_LINE,
M6510T_SET_OVERFLOW = m6502_device::V_LINE, M6510T_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type M6510T; extern const device_type M6510T;

2
src/emu/cpu/m6502/m65c02.h
View File

@ -68,7 +68,7 @@ protected:
enum { enum {
M65C02_IRQ_LINE = m6502_device::IRQ_LINE, M65C02_IRQ_LINE = m6502_device::IRQ_LINE,
M65C02_NMI_LINE = m6502_device::NMI_LINE, M65C02_NMI_LINE = m6502_device::NMI_LINE,
M65C02_SET_OVERFLOW = m6502_device::V_LINE, M65C02_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type M65C02; extern const device_type M65C02;

2
src/emu/cpu/m6502/m65ce02.h
View File

@ -139,7 +139,7 @@ protected:
enum { enum {
M65CE02_IRQ_LINE = m6502_device::IRQ_LINE, M65CE02_IRQ_LINE = m6502_device::IRQ_LINE,
M65CE02_NMI_LINE = m6502_device::NMI_LINE, M65CE02_NMI_LINE = m6502_device::NMI_LINE
}; };

2
src/emu/cpu/m6502/m65sc02.h
View File

@ -21,7 +21,7 @@ public:
enum { enum {
M65SC02_IRQ_LINE = m6502_device::IRQ_LINE, M65SC02_IRQ_LINE = m6502_device::IRQ_LINE,
M65SC02_NMI_LINE = m6502_device::NMI_LINE, M65SC02_NMI_LINE = m6502_device::NMI_LINE,
M65SC02_SET_OVERFLOW = m6502_device::V_LINE, M65SC02_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type M65SC02; extern const device_type M65SC02;

2
src/emu/cpu/m6502/m740.h
View File

@ -33,7 +33,7 @@ public:
M740_INT13_LINE, // (ffe2) M740_INT13_LINE, // (ffe2)
M740_INT14_LINE, // (ffe0) M740_INT14_LINE, // (ffe0)
M740_MAX_INT_LINE = M740_INT14_LINE, M740_MAX_INT_LINE = M740_INT14_LINE,
M740_SET_OVERFLOW = m6502_device::V_LINE, M740_SET_OVERFLOW = m6502_device::V_LINE
}; };
m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

2
src/emu/cpu/m6502/m7501.h
View File

@ -26,7 +26,7 @@ public:
enum { enum {
M7501_IRQ_LINE = m6502_device::IRQ_LINE, M7501_IRQ_LINE = m6502_device::IRQ_LINE,
M7501_NMI_LINE = m6502_device::NMI_LINE, M7501_NMI_LINE = m6502_device::NMI_LINE
}; };
extern const device_type M7501; extern const device_type M7501;

2
src/emu/cpu/m6502/m8502.h
View File

@ -26,7 +26,7 @@ public:
enum { enum {
M8502_IRQ_LINE = m6502_device::IRQ_LINE, M8502_IRQ_LINE = m6502_device::IRQ_LINE,
M8502_NMI_LINE = m6502_device::NMI_LINE, M8502_NMI_LINE = m6502_device::NMI_LINE
}; };
extern const device_type M8502; extern const device_type M8502;

2
src/emu/cpu/m6502/n2a03.h
View File

@ -62,7 +62,7 @@ enum {
N2A03_IRQ_LINE = m6502_device::IRQ_LINE, N2A03_IRQ_LINE = m6502_device::IRQ_LINE,
N2A03_APU_IRQ_LINE = m6502_device::APU_IRQ_LINE, N2A03_APU_IRQ_LINE = m6502_device::APU_IRQ_LINE,
N2A03_NMI_LINE = m6502_device::NMI_LINE, N2A03_NMI_LINE = m6502_device::NMI_LINE,
N2A03_SET_OVERFLOW = m6502_device::V_LINE, N2A03_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type N2A03; extern const device_type N2A03;

2
src/emu/cpu/m6502/r65c02.h
View File

@ -28,7 +28,7 @@ public:
enum { enum {
R65C02_IRQ_LINE = m6502_device::IRQ_LINE, R65C02_IRQ_LINE = m6502_device::IRQ_LINE,
R65C02_NMI_LINE = m6502_device::NMI_LINE, R65C02_NMI_LINE = m6502_device::NMI_LINE,
R65C02_SET_OVERFLOW = m6502_device::V_LINE, R65C02_SET_OVERFLOW = m6502_device::V_LINE
}; };
extern const device_type R65C02; extern const device_type R65C02;

38
src/emu/cpu/m68000/m68kcpu.c
View File

@ -2245,25 +2245,25 @@ CPU_DISASSEMBLE( dasm_coldfire )
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_COLDFIRE); return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_COLDFIRE);
} }
offs_t m68000_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }; offs_t m68000_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
offs_t m68000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }; offs_t m68000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
offs_t m68301_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }; offs_t m68301_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
offs_t m68008_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }; offs_t m68008_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
offs_t m68008plcc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }; offs_t m68008plcc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
offs_t m68010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68010)(this, buffer, pc, oprom, opram, options); }; offs_t m68010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68010)(this, buffer, pc, oprom, opram, options); }
offs_t m68ec020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }; offs_t m68ec020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
offs_t m68020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }; offs_t m68020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
offs_t m68020fpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }; offs_t m68020fpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
offs_t m68020pmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }; offs_t m68020pmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
offs_t m68020hmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }; offs_t m68020hmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
offs_t m68ec030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec030)(this, buffer, pc, oprom, opram, options); }; offs_t m68ec030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec030)(this, buffer, pc, oprom, opram, options); }
offs_t m68030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68030)(this, buffer, pc, oprom, opram, options); }; offs_t m68030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68030)(this, buffer, pc, oprom, opram, options); }
offs_t m68ec040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec040)(this, buffer, pc, oprom, opram, options); }; offs_t m68ec040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec040)(this, buffer, pc, oprom, opram, options); }
offs_t m68lc040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68lc040)(this, buffer, pc, oprom, opram, options); }; offs_t m68lc040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68lc040)(this, buffer, pc, oprom, opram, options); }
offs_t m68040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68040)(this, buffer, pc, oprom, opram, options); }; offs_t m68040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68040)(this, buffer, pc, oprom, opram, options); }
offs_t scc68070_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }; offs_t scc68070_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
offs_t fscpu32_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_fscpu32)(this, buffer, pc, oprom, opram, options); }; offs_t fscpu32_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_fscpu32)(this, buffer, pc, oprom, opram, options); }
offs_t mcf5206e_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_coldfire)(this, buffer, pc, oprom, opram, options); }; offs_t mcf5206e_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_coldfire)(this, buffer, pc, oprom, opram, options); }
/* Service an interrupt request and start exception processing */ /* Service an interrupt request and start exception processing */

6
src/emu/cpu/mcs51/mcs51.c
View File

@ -145,7 +145,7 @@ enum
FEATURE_I8052 = 0x01, FEATURE_I8052 = 0x01,
FEATURE_CMOS = 0x02, FEATURE_CMOS = 0x02,
FEATURE_I80C52 = 0x04, FEATURE_I80C52 = 0x04,
FEATURE_DS5002FP = 0x08, FEATURE_DS5002FP = 0x08
}; };
/* Internal address in SFR of registers */ /* Internal address in SFR of registers */
@ -198,7 +198,7 @@ enum
ADDR_TA = 0xc7, ADDR_TA = 0xc7,
ADDR_RNR = 0xcf, ADDR_RNR = 0xcf,
ADDR_RPCTL = 0xd8, ADDR_RPCTL = 0xd8,
ADDR_RPS = 0xda, ADDR_RPS = 0xda
}; };
@ -217,7 +217,7 @@ enum
V_TF2 = 0x02b, /* Timer 2 Overflow */ V_TF2 = 0x02b, /* Timer 2 Overflow */
/* DS5002FP */ /* DS5002FP */
V_PFI = 0x02b, /* Power Failure Interrupt */ V_PFI = 0x02b /* Power Failure Interrupt */
}; };

4
src/emu/cpu/mcs51/mcs51.h
View File

@ -48,7 +48,7 @@ enum
MCS51_T2_LINE, /* P1.0: Timer 2 External Input */ MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */ MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
DS5002FP_PFI_LINE, /* DS5002FP Power fail interrupt */ DS5002FP_PFI_LINE /* DS5002FP Power fail interrupt */
}; };
/* special I/O space ports */ /* special I/O space ports */
@ -59,7 +59,7 @@ enum
MCS51_PORT_P1 = 0x20001, MCS51_PORT_P1 = 0x20001,
MCS51_PORT_P2 = 0x20002, MCS51_PORT_P2 = 0x20002,
MCS51_PORT_P3 = 0x20003, MCS51_PORT_P3 = 0x20003,
MCS51_PORT_TX = 0x20004, /* P3.1 */ MCS51_PORT_TX = 0x20004 /* P3.1 */
}; };
/* At least CMOS devices may be forced to read from ports configured as output. /* At least CMOS devices may be forced to read from ports configured as output.

6
src/emu/cpu/mcs96/mcs96.h
View File

@ -22,7 +22,7 @@ public:
protected: protected:
enum { enum {
STATE_FETCH = 0x200, STATE_FETCH = 0x200,
STATE_FETCH_NOIRQ = 0x201, STATE_FETCH_NOIRQ = 0x201
}; };
enum { enum {
@ -32,7 +32,7 @@ protected:
F_VT = 0x1000, F_VT = 0x1000,
F_V = 0x2000, F_V = 0x2000,
F_N = 0x4000, F_N = 0x4000,
F_Z = 0x8000, F_Z = 0x8000
}; };
struct disasm_entry { struct disasm_entry {
@ -65,7 +65,7 @@ protected:
DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */ DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */
DASM_indexed_1, /* Indexed, short or long, 1 operator */ DASM_indexed_1, /* Indexed, short or long, 1 operator */
DASM_indexed_2, /* Indexed, short or long, 2 operators */ DASM_indexed_2, /* Indexed, short or long, 2 operators */
DASM_indexed_3, /* Indexed, short or long, 3 operators */ DASM_indexed_3 /* Indexed, short or long, 3 operators */
}; };
// device-level overrides // device-level overrides

2
src/emu/cpu/minx/minx.h
View File

@ -10,7 +10,7 @@ enum
{ {
MINX_PC=1, MINX_SP, MINX_BA, MINX_HL, MINX_X, MINX_Y, MINX_PC=1, MINX_SP, MINX_BA, MINX_HL, MINX_X, MINX_Y,
MINX_U, MINX_V, MINX_F, MINX_E, MINX_N, MINX_I, MINX_U, MINX_V, MINX_F, MINX_E, MINX_N, MINX_I,
MINX_XI, MINX_YI, MINX_XI, MINX_YI
}; };

2
src/emu/cpu/mips/r3000.h
View File

@ -73,7 +73,7 @@ protected:
CHIP_TYPE_R3051, CHIP_TYPE_R3051,
CHIP_TYPE_R3052, CHIP_TYPE_R3052,
CHIP_TYPE_R3071, CHIP_TYPE_R3071,
CHIP_TYPE_R3081, CHIP_TYPE_R3081
}; };
// construction/destruction // construction/destruction

6
src/emu/cpu/nec/necpriv.h
View File

@ -17,7 +17,7 @@ enum
NEC_TRAP_VECTOR = 1, NEC_TRAP_VECTOR = 1,
NEC_NMI_VECTOR = 2, NEC_NMI_VECTOR = 2,
NEC_BRKV_VECTOR = 4, NEC_BRKV_VECTOR = 4,
NEC_CHKIND_VECTOR = 5, NEC_CHKIND_VECTOR = 5
}; };
/* interrupt sources */ /* interrupt sources */
@ -25,7 +25,7 @@ enum INTSOURCES
{ {
BRK = 0, BRK = 0,
INT_IRQ = 1, INT_IRQ = 1,
NMI_IRQ = 2, NMI_IRQ = 2
}; };
@ -39,7 +39,7 @@ enum BREGS {
DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5), DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4), DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7), BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6), BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6)
}; };
#define Sreg(x) m_sregs[x] #define Sreg(x) m_sregs[x]

2
src/emu/cpu/pic16c62x/pic16c62x.h
View File

@ -231,7 +231,7 @@ class pic16cr620a_device : public pic16c62x_device
public: public:
// construction/destruction // construction/destruction
pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
}*/; }*/
class pic16c621_device : public pic16c62x_device class pic16c621_device : public pic16c62x_device
{ {

2
src/emu/cpu/powerpc/ppc.h
View File

@ -209,7 +209,7 @@ protected:
PPC_MODEL_7457 = 0x80020101, /* "Apollo 7", version 1.1 */ PPC_MODEL_7457 = 0x80020101, /* "Apollo 7", version 1.1 */
PPC_MODEL_MPC8240 = 0x00810101, /* "Kahlua" */ PPC_MODEL_MPC8240 = 0x00810101, /* "Kahlua" */
PPC_MODEL_MPC8241 = 0x80811014, /* "Kahlua Lt" */ PPC_MODEL_MPC8241 = 0x80811014, /* "Kahlua Lt" */
PPC_MODEL_MPC8245 = 0x80811014, /* "Kahlua II" */ PPC_MODEL_MPC8245 = 0x80811014 /* "Kahlua II" */
}; };
public: public:

2
src/emu/cpu/s2650/s2650.h
View File

@ -19,7 +19,7 @@ enum
S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */ S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */
S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */ S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */
S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */ S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */
S2650_SENSE_PORT = 0x0102, /* Fake Sense Line */ S2650_SENSE_PORT = 0x0102 /* Fake Sense Line */
}; };

2
src/emu/cpu/saturn/saturn.h
View File

@ -53,7 +53,7 @@ enum
SATURN_HST, SATURN_HST,
SATURN_IRQ_STATE, SATURN_IRQ_STATE,
SATURN_SLEEPING, SATURN_SLEEPING
}; };
#define SATURN_IRQ_LINE 0 #define SATURN_IRQ_LINE 0

2
src/emu/cpu/score/score.h
View File

@ -23,7 +23,7 @@ enum
SCORE_CEL, SCORE_CEL,
SCORE_GPR, SCORE_GPR,
SCORE_CR = SCORE_GPR + 0x20, SCORE_CR = SCORE_GPR + 0x20,
SCORE_SR = SCORE_CR + 0x20, SCORE_SR = SCORE_CR + 0x20
}; };

2
src/emu/cpu/sh4/sh4.c
View File

@ -3474,7 +3474,7 @@ inline void sh34_base_device::execute_one_0000(const UINT16 opcode)
case 0xef: MAC_L(opcode); break; case 0xef: MAC_L(opcode); break;
case 0xff: MAC_L(opcode); break; case 0xff: MAC_L(opcode); break;
} }
}; }
inline void sh34_base_device::execute_one_4000(const UINT16 opcode) inline void sh34_base_device::execute_one_4000(const UINT16 opcode)
{ {

2
src/emu/cpu/sharc/sharc.c
View File

@ -37,7 +37,7 @@ enum
SHARC_B0, SHARC_B1, SHARC_B2, SHARC_B3, SHARC_B0, SHARC_B1, SHARC_B2, SHARC_B3,
SHARC_B4, SHARC_B5, SHARC_B6, SHARC_B7, SHARC_B4, SHARC_B5, SHARC_B6, SHARC_B7,
SHARC_B8, SHARC_B9, SHARC_B10, SHARC_B11, SHARC_B8, SHARC_B9, SHARC_B10, SHARC_B11,
SHARC_B12, SHARC_B13, SHARC_B14, SHARC_B15, SHARC_B12, SHARC_B13, SHARC_B14, SHARC_B15
}; };

2
src/emu/cpu/sm8500/sm8500.h
View File

@ -18,7 +18,7 @@ enum
SM8500_RR12, SM8500_RR14, SM8500_RR12, SM8500_RR14,
/* additional internal 8 bit registers */ /* additional internal 8 bit registers */
SM8500_IE0, SM8500_IE1, SM8500_IR0, SM8500_IR1, SM8500_P0, SM8500_P1, SM8500_P2, SM8500_P3, SM8500_SYS, SM8500_CKC, SM8500_IE0, SM8500_IE1, SM8500_IR0, SM8500_IR1, SM8500_P0, SM8500_P1, SM8500_P2, SM8500_P3, SM8500_SYS, SM8500_CKC,
SM8500_SPH, SM8500_SPL, SM8500_PS0, SM8500_PS1, SM8500_P0C, SM8500_P1C, SM8500_P2C, SM8500_P3C, SM8500_SPH, SM8500_SPL, SM8500_PS0, SM8500_PS1, SM8500_P0C, SM8500_P1C, SM8500_P2C, SM8500_P3C
}; };

2
src/emu/cpu/ssem/ssem.h
View File

@ -78,7 +78,7 @@ enum
{ {
SSEM_PC = 1, SSEM_PC = 1,
SSEM_A, SSEM_A,
SSEM_HALT, SSEM_HALT
}; };
CPU_DISASSEMBLE( ssem ); CPU_DISASSEMBLE( ssem );

4
src/emu/cpu/superfx/superfx.h
View File

@ -48,7 +48,7 @@ enum
SUPERFX_RAMCL, SUPERFX_RAMCL,
SUPERFX_RAMAR, SUPERFX_RAMAR,
SUPERFX_RAMDR, SUPERFX_RAMDR,
SUPERFX_RAMADDR, SUPERFX_RAMADDR
}; };
#define SUPERFX_SFR_IRQ 0x8000 // Interrupt Flag #define SUPERFX_SFR_IRQ 0x8000 // Interrupt Flag
@ -186,7 +186,7 @@ private:
inline void superfx_regs_reset(); inline void superfx_regs_reset();
void superfx_update_speed(); void superfx_update_speed();
void superfx_cache_flush();; void superfx_cache_flush();
UINT8 superfx_cache_mmio_read(UINT32 addr); UINT8 superfx_cache_mmio_read(UINT32 addr);
void superfx_cache_mmio_write(UINT32 addr, UINT8 data); void superfx_cache_mmio_write(UINT32 addr, UINT8 data);
void superfx_memory_reset(); void superfx_memory_reset();

2
src/emu/cpu/tlcs900/900tbl.inc
View File

@ -30,7 +30,7 @@ enum e_operand
_M8, /* (8) */ _M8, /* (8) */
_M16, /* (i16) */ _M16, /* (i16) */
_R, /* register (defined by extension) */ _R, /* register (defined by extension) */
_SR, /* status register */ _SR /* status register */
}; };

2
src/emu/cpu/tms32031/tms32031.h
View File

@ -139,7 +139,7 @@ protected:
enum enum
{ {
CHIP_TYPE_TMS32031, CHIP_TYPE_TMS32031,
CHIP_TYPE_TMS32032, CHIP_TYPE_TMS32032
}; };
// construction/destruction // construction/destruction

2
src/emu/cpu/tms32051/tms32051.c
View File

@ -35,7 +35,7 @@ enum
TMS32051_AR4, TMS32051_AR4,
TMS32051_AR5, TMS32051_AR5,
TMS32051_AR6, TMS32051_AR6,
TMS32051_AR7, TMS32051_AR7
}; };

6
src/emu/cpu/tms32082/tms32082.h
View File

@ -55,7 +55,7 @@ public:
MP_IN1P, MP_IN1P,
MP_OUTP, MP_OUTP,
MP_IE, MP_IE,
MP_INTPEN, MP_INTPEN
}; };
enum enum
@ -63,7 +63,7 @@ public:
INPUT_X1 = 1, INPUT_X1 = 1,
INPUT_X2 = 2, INPUT_X2 = 2,
INPUT_X3 = 3, INPUT_X3 = 3,
INPUT_X4 = 4, INPUT_X4 = 4
}; };
DECLARE_READ32_MEMBER(mp_param_r); DECLARE_READ32_MEMBER(mp_param_r);
@ -158,7 +158,7 @@ public:
enum enum
{ {
PP_PC = 1, PP_PC = 1
}; };
protected: protected:

2
src/emu/cpu/tms57002/tms57002.h
View File

@ -211,7 +211,7 @@ enum {
TMS57002_XBA, TMS57002_XBA,
TMS57002_XOA, TMS57002_XOA,
TMS57002_XRD, TMS57002_XRD,
TMS57002_XWR, TMS57002_XWR
}; };
extern const device_type TMS57002; extern const device_type TMS57002;

2
src/emu/cpu/uml.h
View File

@ -655,7 +655,7 @@ namespace uml
const parameter M7(parameter::make_mapvar(MAPVAR_M0 + 7)); const parameter M7(parameter::make_mapvar(MAPVAR_M0 + 7));
const parameter M8(parameter::make_mapvar(MAPVAR_M0 + 8)); const parameter M8(parameter::make_mapvar(MAPVAR_M0 + 8));
const parameter M9(parameter::make_mapvar(MAPVAR_M0 + 9)); const parameter M9(parameter::make_mapvar(MAPVAR_M0 + 9));
}; }
#endif /* __UML_H__ */ #endif /* __UML_H__ */

2
src/emu/cpu/unsp/unsp.h
View File

@ -28,7 +28,7 @@ enum
UNSP_IRQ, UNSP_IRQ,
UNSP_FIQ, UNSP_FIQ,
UNSP_SB, UNSP_SB
}; };

2
src/emu/cpu/x86emit.h
View File

@ -3181,7 +3181,7 @@ inline void emit_cvttpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref m
inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); } inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
inline void emit_roundpd_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); } inline void emit_roundpd_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
}; }
#undef X86EMIT_SIZE #undef X86EMIT_SIZE

252
src/emu/cpu/z8/z8.h
View File

@ -150,134 +150,134 @@ private:
inline void swap(UINT8 dst); inline void swap(UINT8 dst);
#define INSTRUCTION(inst) void inst(UINT8 opcode, int *cycles); #define INSTRUCTION(inst) void inst(UINT8 opcode, int *cycles);
INSTRUCTION( illegal ); INSTRUCTION( illegal )
INSTRUCTION( clr_R1 ); INSTRUCTION( clr_R1 )
INSTRUCTION( clr_IR1 ); INSTRUCTION( clr_IR1 )
INSTRUCTION( ld_r1_IM ); INSTRUCTION( ld_r1_IM )
INSTRUCTION( ld_r1_R2 ); INSTRUCTION( ld_r1_R2 )
INSTRUCTION( ld_r2_R1 ); INSTRUCTION( ld_r2_R1 )
INSTRUCTION( ld_Ir1_r2 ); INSTRUCTION( ld_Ir1_r2 )
INSTRUCTION( ld_R2_IR1 ); INSTRUCTION( ld_R2_IR1 )
INSTRUCTION( ld_r1_x_R2 ); INSTRUCTION( ld_r1_x_R2 )
INSTRUCTION( ld_r2_x_R1 ); INSTRUCTION( ld_r2_x_R1 )
INSTRUCTION( ld_r1_r2 ); INSTRUCTION( ld_r1_r2 )
INSTRUCTION( ld_r1_Ir2 ); INSTRUCTION( ld_r1_Ir2 )
INSTRUCTION( ld_R2_R1 ); INSTRUCTION( ld_R2_R1 )
INSTRUCTION( ld_IR2_R1 ); INSTRUCTION( ld_IR2_R1 )
INSTRUCTION( ld_R1_IM ); INSTRUCTION( ld_R1_IM )
INSTRUCTION( ld_IR1_IM ); INSTRUCTION( ld_IR1_IM )
INSTRUCTION( ldc_r1_Irr2 ); INSTRUCTION( ldc_r1_Irr2 )
INSTRUCTION( ldc_r2_Irr1 ); INSTRUCTION( ldc_r2_Irr1 )
INSTRUCTION( ldci_Ir1_Irr2 ); INSTRUCTION( ldci_Ir1_Irr2 )
INSTRUCTION( ldci_Ir2_Irr1 ); INSTRUCTION( ldci_Ir2_Irr1 )
INSTRUCTION( lde_r1_Irr2 ); INSTRUCTION( lde_r1_Irr2 )
INSTRUCTION( lde_r2_Irr1 ); INSTRUCTION( lde_r2_Irr1 )
INSTRUCTION( ldei_Ir1_Irr2 ); INSTRUCTION( ldei_Ir1_Irr2 )
INSTRUCTION( ldei_Ir2_Irr1 ); INSTRUCTION( ldei_Ir2_Irr1 )
INSTRUCTION( pop_R1 ); INSTRUCTION( pop_R1 )
INSTRUCTION( pop_IR1 ); INSTRUCTION( pop_IR1 )
INSTRUCTION( push_R2 ); INSTRUCTION( push_R2 )
INSTRUCTION( push_IR2 ); INSTRUCTION( push_IR2 )
INSTRUCTION( adc_r1_r2 ); INSTRUCTION( adc_r1_r2 )
INSTRUCTION( adc_r1_Ir2 ); INSTRUCTION( adc_r1_Ir2 )
INSTRUCTION( adc_R2_R1 ); INSTRUCTION( adc_R2_R1 )
INSTRUCTION( adc_IR2_R1 ); INSTRUCTION( adc_IR2_R1 )
INSTRUCTION( adc_R1_IM ); INSTRUCTION( adc_R1_IM )
INSTRUCTION( adc_IR1_IM ); INSTRUCTION( adc_IR1_IM )
INSTRUCTION( add_r1_r2 ); INSTRUCTION( add_r1_r2 )
INSTRUCTION( add_r1_Ir2 ); INSTRUCTION( add_r1_Ir2 )
INSTRUCTION( add_R2_R1 ); INSTRUCTION( add_R2_R1 )
INSTRUCTION( add_IR2_R1 ); INSTRUCTION( add_IR2_R1 )
INSTRUCTION( add_R1_IM ); INSTRUCTION( add_R1_IM )
INSTRUCTION( add_IR1_IM ); INSTRUCTION( add_IR1_IM )
INSTRUCTION( cp_r1_r2 ); INSTRUCTION( cp_r1_r2 )
INSTRUCTION( cp_r1_Ir2 ); INSTRUCTION( cp_r1_Ir2 )
INSTRUCTION( cp_R2_R1 ); INSTRUCTION( cp_R2_R1 )
INSTRUCTION( cp_IR2_R1 ); INSTRUCTION( cp_IR2_R1 )
INSTRUCTION( cp_R1_IM ); INSTRUCTION( cp_R1_IM )
INSTRUCTION( cp_IR1_IM ); INSTRUCTION( cp_IR1_IM )
INSTRUCTION( da_R1 ); INSTRUCTION( da_R1 )
INSTRUCTION( da_IR1 ); INSTRUCTION( da_IR1 )
INSTRUCTION( dec_R1 ); INSTRUCTION( dec_R1 )
INSTRUCTION( dec_IR1 ); INSTRUCTION( dec_IR1 )
INSTRUCTION( decw_RR1 ); INSTRUCTION( decw_RR1 )
INSTRUCTION( decw_IR1 ); INSTRUCTION( decw_IR1 )
INSTRUCTION( inc_r1 ); INSTRUCTION( inc_r1 )
INSTRUCTION( inc_R1 ); INSTRUCTION( inc_R1 )
INSTRUCTION( inc_IR1 ); INSTRUCTION( inc_IR1 )
INSTRUCTION( incw_RR1 ); INSTRUCTION( incw_RR1 )
INSTRUCTION( incw_IR1 ); INSTRUCTION( incw_IR1 )
INSTRUCTION( sbc_r1_r2 ); INSTRUCTION( sbc_r1_r2 )
INSTRUCTION( sbc_r1_Ir2 ); INSTRUCTION( sbc_r1_Ir2 )
INSTRUCTION( sbc_R2_R1 ); INSTRUCTION( sbc_R2_R1 )
INSTRUCTION( sbc_IR2_R1 ); INSTRUCTION( sbc_IR2_R1 )
INSTRUCTION( sbc_R1_IM ); INSTRUCTION( sbc_R1_IM )
INSTRUCTION( sbc_IR1_IM ); INSTRUCTION( sbc_IR1_IM )
INSTRUCTION( sub_r1_r2 ); INSTRUCTION( sub_r1_r2 )
INSTRUCTION( sub_r1_Ir2 ); INSTRUCTION( sub_r1_Ir2 )
INSTRUCTION( sub_R2_R1 ); INSTRUCTION( sub_R2_R1 )
INSTRUCTION( sub_IR2_R1 ); INSTRUCTION( sub_IR2_R1 )
INSTRUCTION( sub_R1_IM ); INSTRUCTION( sub_R1_IM )
INSTRUCTION( sub_IR1_IM ); INSTRUCTION( sub_IR1_IM )
INSTRUCTION( and_r1_r2 ); INSTRUCTION( and_r1_r2 )
INSTRUCTION( and_r1_Ir2 ); INSTRUCTION( and_r1_Ir2 )
INSTRUCTION( and_R2_R1 ); INSTRUCTION( and_R2_R1 )
INSTRUCTION( and_IR2_R1 ); INSTRUCTION( and_IR2_R1 )
INSTRUCTION( and_R1_IM ); INSTRUCTION( and_R1_IM )
INSTRUCTION( and_IR1_IM ); INSTRUCTION( and_IR1_IM )
INSTRUCTION( com_R1 ); INSTRUCTION( com_R1 )
INSTRUCTION( com_IR1 ); INSTRUCTION( com_IR1 )
INSTRUCTION( or_r1_r2 ); INSTRUCTION( or_r1_r2 )
INSTRUCTION( or_r1_Ir2 ); INSTRUCTION( or_r1_Ir2 )
INSTRUCTION( or_R2_R1 ); INSTRUCTION( or_R2_R1 )
INSTRUCTION( or_IR2_R1 ); INSTRUCTION( or_IR2_R1 )
INSTRUCTION( or_R1_IM ); INSTRUCTION( or_R1_IM )
INSTRUCTION( or_IR1_IM ); INSTRUCTION( or_IR1_IM )
INSTRUCTION( xor_r1_r2 ); INSTRUCTION( xor_r1_r2 )
INSTRUCTION( xor_r1_Ir2 ); INSTRUCTION( xor_r1_Ir2 )
INSTRUCTION( xor_R2_R1 ); INSTRUCTION( xor_R2_R1 )
INSTRUCTION( xor_IR2_R1 ); INSTRUCTION( xor_IR2_R1 )
INSTRUCTION( xor_R1_IM ); INSTRUCTION( xor_R1_IM )
INSTRUCTION( xor_IR1_IM ); INSTRUCTION( xor_IR1_IM )
INSTRUCTION( call_IRR1 ); INSTRUCTION( call_IRR1 )
INSTRUCTION( call_DA ); INSTRUCTION( call_DA )
INSTRUCTION( djnz_r1_RA ); INSTRUCTION( djnz_r1_RA )
INSTRUCTION( iret ); INSTRUCTION( iret )
INSTRUCTION( ret ); INSTRUCTION( ret )
INSTRUCTION( jp_IRR1 ); INSTRUCTION( jp_IRR1 )
INSTRUCTION( jp_cc_DA ) INSTRUCTION( jp_cc_DA )
INSTRUCTION( jr_cc_RA ) INSTRUCTION( jr_cc_RA )
INSTRUCTION( tcm_r1_r2 ); INSTRUCTION( tcm_r1_r2 )
INSTRUCTION( tcm_r1_Ir2 ); INSTRUCTION( tcm_r1_Ir2 )
INSTRUCTION( tcm_R2_R1 ); INSTRUCTION( tcm_R2_R1 )
INSTRUCTION( tcm_IR2_R1 ); INSTRUCTION( tcm_IR2_R1 )
INSTRUCTION( tcm_R1_IM ); INSTRUCTION( tcm_R1_IM )
INSTRUCTION( tcm_IR1_IM ); INSTRUCTION( tcm_IR1_IM )
INSTRUCTION( tm_r1_r2 ); INSTRUCTION( tm_r1_r2 )
INSTRUCTION( tm_r1_Ir2 ); INSTRUCTION( tm_r1_Ir2 )
INSTRUCTION( tm_R2_R1 ); INSTRUCTION( tm_R2_R1 )
INSTRUCTION( tm_IR2_R1 ); INSTRUCTION( tm_IR2_R1 )
INSTRUCTION( tm_R1_IM ); INSTRUCTION( tm_R1_IM )
INSTRUCTION( tm_IR1_IM ); INSTRUCTION( tm_IR1_IM )
INSTRUCTION( rl_R1 ); INSTRUCTION( rl_R1 )
INSTRUCTION( rl_IR1 ); INSTRUCTION( rl_IR1 )
INSTRUCTION( rlc_R1 ); INSTRUCTION( rlc_R1 )
INSTRUCTION( rlc_IR1 ); INSTRUCTION( rlc_IR1 )
INSTRUCTION( rr_R1 ); INSTRUCTION( rr_R1 )
INSTRUCTION( rr_IR1 ); INSTRUCTION( rr_IR1 )
INSTRUCTION( rrc_R1 ); INSTRUCTION( rrc_R1 )
INSTRUCTION( rrc_IR1 ); INSTRUCTION( rrc_IR1 )
INSTRUCTION( sra_R1 ); INSTRUCTION( sra_R1 )
INSTRUCTION( sra_IR1 ); INSTRUCTION( sra_IR1 )
INSTRUCTION( swap_R1 ); INSTRUCTION( swap_R1 )
INSTRUCTION( swap_IR1 ); INSTRUCTION( swap_IR1 )
INSTRUCTION( ccf ); INSTRUCTION( ccf )
INSTRUCTION( di ); INSTRUCTION( di )
INSTRUCTION( ei ); INSTRUCTION( ei )
INSTRUCTION( nop ); INSTRUCTION( nop )
INSTRUCTION( rcf ); INSTRUCTION( rcf )
INSTRUCTION( scf ); INSTRUCTION( scf )
INSTRUCTION( srp_IM ); INSTRUCTION( srp_IM )
#undef INSTRUCTION #undef INSTRUCTION
typedef void (z8_device::*z8_opcode_func) (UINT8 opcode, int *cycles); typedef void (z8_device::*z8_opcode_func) (UINT8 opcode, int *cycles);

12
src/emu/cpu/z80/z80.h
View File

@ -137,12 +137,12 @@ protected:
void illegal_1(); void illegal_1();
void illegal_2(); void illegal_2();
PROTOTYPES(op); PROTOTYPES(op)
PROTOTYPES(cb); PROTOTYPES(cb)
PROTOTYPES(dd); PROTOTYPES(dd)
PROTOTYPES(ed); PROTOTYPES(ed)
PROTOTYPES(fd); PROTOTYPES(fd)
PROTOTYPES(xycb); PROTOTYPES(xycb)
void halt(); void halt();
void leave_halt(); void leave_halt();

2
src/emu/ioport.c
View File

@ -1102,7 +1102,7 @@ void natural_keyboard::build_codes(ioport_manager &manager)
if (LOG_NATURAL_KEYBOARD) if (LOG_NATURAL_KEYBOARD)
{ {
std::string tempstr; std::string tempstr;
logerror("natural_keyboard: code=%i (%s) port=%p field->name='%s'\n", int(code), unicode_to_string(tempstr, code), port, field->name()); logerror("natural_keyboard: code=%i (%s) port=%p field->name='%s'\n", int(code), unicode_to_string(tempstr, code), (void *)port, field->name());
} }
} }
} }

2
src/emu/machine/t10spc.h
View File

@ -73,7 +73,7 @@ protected:
T10SBC_CMD_READ_CAPACITY = 0x25, T10SBC_CMD_READ_CAPACITY = 0x25,
T10SBC_CMD_WRITE_10 = 0x2a, T10SBC_CMD_WRITE_10 = 0x2a,
T10SBC_CMD_SEEK_10 = 0x2b, T10SBC_CMD_SEEK_10 = 0x2b,
T10SBC_CMD_READ_12 = 0xa8, T10SBC_CMD_READ_12 = 0xa8
}; };
enum enum

6
src/emu/machine/upd765.h
View File

@ -193,7 +193,7 @@ protected:
FIF_DIS = 0x20, FIF_DIS = 0x20,
FIF_EIS = 0x40, FIF_EIS = 0x40,
SPEC_ND = 0x0001, SPEC_ND = 0x0001
}; };
@ -258,7 +258,7 @@ protected:
WRITE_TRACK_SECTOR_BYTE, WRITE_TRACK_SECTOR_BYTE,
WRITE_TRACK_POST_SECTORS, WRITE_TRACK_POST_SECTORS,
WRITE_TRACK_POST_SECTORS_BYTE, WRITE_TRACK_POST_SECTORS_BYTE
}; };
struct pll_t { struct pll_t {
@ -354,7 +354,7 @@ protected:
C_SCAN_HIGH, C_SCAN_HIGH,
C_INVALID, C_INVALID,
C_INCOMPLETE, C_INCOMPLETE
}; };
void delay_cycles(emu_timer *tm, int cycles); void delay_cycles(emu_timer *tm, int cycles);

2
src/emu/machine/wd_fdc.h
View File

@ -322,7 +322,7 @@ private:
WRITE_BYTE, WRITE_BYTE,
WRITE_BYTE_DONE, WRITE_BYTE_DONE,
WRITE_SECTOR_PRE, WRITE_SECTOR_PRE,
WRITE_SECTOR_PRE_BYTE, WRITE_SECTOR_PRE_BYTE
}; };
struct live_info { struct live_info {

4
src/emu/memory.c
View File

@ -2639,7 +2639,7 @@ memory_bank &address_space::bank_find_or_allocate(const char *tag, offs_t addrst
membank = global_alloc(memory_bank(*this, banknum, bytestart, byteend, tag)); membank = global_alloc(memory_bank(*this, banknum, bytestart, byteend, tag));
std::string temptag; std::string temptag;
if (tag == NULL) { if (tag == NULL) {
strprintf(temptag, "anon_%p", membank); strprintf(temptag, "anon_%p", (void *) membank);
tag = temptag.c_str(); tag = temptag.c_str();
} }
manager().m_banklist.append(tag, *membank); manager().m_banklist.append(tag, *membank);
@ -2788,7 +2788,7 @@ namespace {
offs_t start, end; offs_t start, end;
subrange(offs_t _start, offs_t _end) : start(_start), end(_end) {} subrange(offs_t _start, offs_t _end) : start(_start), end(_end) {}
}; };
}; }
void address_table::setup_range_masked(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, UINT64 mask, std::list<UINT32> &entries) void address_table::setup_range_masked(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, UINT64 mask, std::list<UINT32> &entries)
{ {

5
src/emu/rendlay.c
View File

@ -261,13 +261,14 @@ static int xml_get_attribute_int_with_subst(running_machine &machine, xml_data_n
{ {
const char *string = xml_get_attribute_string_with_subst(machine, node, attribute, NULL); const char *string = xml_get_attribute_string_with_subst(machine, node, attribute, NULL);
int value; int value;
unsigned int uvalue;
if (string == NULL) if (string == NULL)
return defvalue; return defvalue;
if (string[0] == '$') if (string[0] == '$')
return (sscanf(&string[1], "%X", &value) == 1) ? value : defvalue; return (sscanf(&string[1], "%X", &uvalue) == 1) ? uvalue : defvalue;
if (string[0] == '0' && string[1] == 'x') if (string[0] == '0' && string[1] == 'x')
return (sscanf(&string[2], "%X", &value) == 1) ? value : defvalue; return (sscanf(&string[2], "%X", &uvalue) == 1) ? uvalue : defvalue;
if (string[0] == '#') if (string[0] == '#')
return (sscanf(&string[1], "%d", &value) == 1) ? value : defvalue; return (sscanf(&string[1], "%d", &value) == 1) ? value : defvalue;
return (sscanf(&string[0], "%d", &value) == 1) ? value : defvalue; return (sscanf(&string[0], "%d", &value) == 1) ? value : defvalue;

8
src/emu/sound.c
View File

@ -225,8 +225,8 @@ int sound_stream::input_source_outputnum(int inputnum) const
void sound_stream::set_input(int index, sound_stream *input_stream, int output_index, float gain) void sound_stream::set_input(int index, sound_stream *input_stream, int output_index, float gain)
{ {
VPRINTF(("stream_set_input(%p, '%s', %d, %p, %d, %f)\n", this, m_device.tag(), VPRINTF(("stream_set_input(%p, '%s', %d, %p, %d, %f)\n", (void *)this, m_device.tag(),
index, input_stream, output_index, (double) gain)); index, (void *)input_stream, output_index, (double) gain));
// make sure it's a valid input // make sure it's a valid input
if (index >= m_input.size()) if (index >= m_input.size())
@ -605,7 +605,7 @@ void sound_stream::generate_samples(int samples)
if (samples <= 0) if (samples <= 0)
return; return;
VPRINTF(("generate_samples(%p, %d)\n", this, samples)); VPRINTF(("generate_samples(%p, %d)\n", (void *) this, samples));
// ensure all inputs are up to date and generate resampled data // ensure all inputs are up to date and generate resampled data
for (unsigned int inputnum = 0; inputnum < m_input.size(); inputnum++) for (unsigned int inputnum = 0; inputnum < m_input.size(); inputnum++)
@ -637,7 +637,7 @@ void sound_stream::generate_samples(int samples)
} }
// run the callback // run the callback
VPRINTF((" callback(%p, %d)\n", this, samples)); VPRINTF((" callback(%p, %d)\n", (void *)this, samples));
m_callback(*this, inputs, outputs, samples); m_callback(*this, inputs, outputs, samples);
VPRINTF((" callback done\n")); VPRINTF((" callback done\n"));
} }

2
src/emu/sound/spu.h
View File

@ -41,7 +41,7 @@ class spu_device : public device_t, public device_sound_interface
dirtyflag_voice_mask=0x00ffffff, dirtyflag_voice_mask=0x00ffffff,
dirtyflag_reverb=0x01000000, dirtyflag_reverb=0x01000000,
dirtyflag_ram=0x02000000, dirtyflag_ram=0x02000000,
dirtyflag_irq=0x04000000, dirtyflag_irq=0x04000000
}; };
protected: protected:

2
src/emu/ui/mainmenu.h
View File

@ -44,7 +44,7 @@ private:
CHEAT, CHEAT,
SELECT_GAME, SELECT_GAME,
BIOS_SELECTION, BIOS_SELECTION,
BARCODE_READ, BARCODE_READ
}; };
}; };

2
src/emu/ui/swlist.h
View File

@ -15,7 +15,7 @@
class ui_menu_software_parts : public ui_menu { class ui_menu_software_parts : public ui_menu {
public: public:
enum { T_EMPTY, T_FMGR, T_SWLIST, T_ENTRY, }; enum { T_EMPTY, T_FMGR, T_SWLIST, T_ENTRY };
ui_menu_software_parts(running_machine &machine, render_container *container, const software_info *info, const char *interface, const software_part **part, bool other_opt, int *result); ui_menu_software_parts(running_machine &machine, render_container *container, const software_info *info, const char *interface, const software_part **part, bool other_opt, int *result);
virtual ~ui_menu_software_parts(); virtual ~ui_menu_software_parts();
virtual void populate(); virtual void populate();

2
src/lib/formats/d64_dsk.h
View File

@ -53,7 +53,7 @@ protected:
ERROR_27, /* checksum error in header block */ ERROR_27, /* checksum error in header block */
ERROR_28, /* write error UNIMPLEMENTED */ ERROR_28, /* write error UNIMPLEMENTED */
ERROR_29, /* disk ID mismatch */ ERROR_29, /* disk ID mismatch */
ERROR_74, /* disk not ready (no device 1) UNIMPLEMENTED */ ERROR_74 /* disk not ready (no device 1) UNIMPLEMENTED */
}; };
const format *formats; const format *formats;

8
src/lib/formats/flopimg.h
View File

@ -357,7 +357,7 @@ protected:
SECTOR_LOOP_START, //!< Start of the per-sector loop, sector number goes from p1 to p2 inclusive SECTOR_LOOP_START, //!< Start of the per-sector loop, sector number goes from p1 to p2 inclusive
SECTOR_LOOP_END, //!< End of the per-sector loop SECTOR_LOOP_END, //!< End of the per-sector loop
SECTOR_INTERLEAVE_SKEW, //!< Defines interleave and skew for sector counting SECTOR_INTERLEAVE_SKEW //!< Defines interleave and skew for sector counting
}; };
//! Sector data description //! Sector data description
@ -686,7 +686,7 @@ public:
FF_3 = 0x20202033, //!< "3 " 3 inch disk FF_3 = 0x20202033, //!< "3 " 3 inch disk
FF_35 = 0x20203533, //!< "35 " 3.5 inch disk FF_35 = 0x20203533, //!< "35 " 3.5 inch disk
FF_525 = 0x20353235, //!< "525 " 5.25 inch disk FF_525 = 0x20353235, //!< "525 " 5.25 inch disk
FF_8 = 0x20202038, //!< "8 " 8 inch disk FF_8 = 0x20202038 //!< "8 " 8 inch disk
}; };
//! Variants //! Variants
@ -698,14 +698,14 @@ public:
DSDD = 0x44445344, //!< "DSDD", Double-sided double-density (720K in 3.5, 360K in 5.25) DSDD = 0x44445344, //!< "DSDD", Double-sided double-density (720K in 3.5, 360K in 5.25)
DSQD = 0x44515344, //!< "DSQD", Double-sided quad-density (720K in 5.25, means DD+80 tracks) DSQD = 0x44515344, //!< "DSQD", Double-sided quad-density (720K in 5.25, means DD+80 tracks)
DSHD = 0x44485344, //!< "DSHD", Double-sided high-density (1440K) DSHD = 0x44485344, //!< "DSHD", Double-sided high-density (1440K)
DSED = 0x44455344, //!< "DSED", Double-sided extra-density (2880K) DSED = 0x44455344 //!< "DSED", Double-sided extra-density (2880K)
}; };
//! Encodings //! Encodings
enum { enum {
FM = 0x2020464D, //!< " FM", frequency modulation FM = 0x2020464D, //!< " FM", frequency modulation
MFM = 0x204D464D, //!< " MFM", modified frequency modulation MFM = 0x204D464D, //!< " MFM", modified frequency modulation
M2FM = 0x4D32464D, //!< "M2FM", modified modified frequency modulation M2FM = 0x4D32464D //!< "M2FM", modified modified frequency modulation
}; };
// construction/destruction // construction/destruction

5
src/lib/util/xmlfile.c
View File

@ -411,13 +411,14 @@ int xml_get_attribute_int(xml_data_node *node, const char *attribute, int defval
{ {
const char *string = xml_get_attribute_string(node, attribute, NULL); const char *string = xml_get_attribute_string(node, attribute, NULL);
int value; int value;
unsigned int uvalue;
if (string == NULL) if (string == NULL)
return defvalue; return defvalue;
if (string[0] == '$') if (string[0] == '$')
return (sscanf(&string[1], "%X", &value) == 1) ? value : defvalue; return (sscanf(&string[1], "%X", &uvalue) == 1) ? uvalue : defvalue;
if (string[0] == '0' && string[1] == 'x') if (string[0] == '0' && string[1] == 'x')
return (sscanf(&string[2], "%X", &value) == 1) ? value : defvalue; return (sscanf(&string[2], "%X", &uvalue) == 1) ? uvalue : defvalue;
if (string[0] == '#') if (string[0] == '#')
return (sscanf(&string[1], "%d", &value) == 1) ? value : defvalue; return (sscanf(&string[1], "%d", &value) == 1) ? value : defvalue;
return (sscanf(&string[0], "%d", &value) == 1) ? value : defvalue; return (sscanf(&string[0], "%d", &value) == 1) ? value : defvalue;

2
src/mess/includes/hec2hrp.h
View File

@ -88,7 +88,7 @@ public:
m_floppy0(*this, "wd179x:0") m_floppy0(*this, "wd179x:0")
{} {}
DECLARE_FLOPPY_FORMATS(minidisc_formats); DECLARE_FLOPPY_FORMATS(minidisc_formats)
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_disc2cpu; optional_device<cpu_device> m_disc2cpu;

4
src/osd/modules/debugger/debugint.c
View File

@ -64,7 +64,7 @@ enum
RECT_DVIEW_TITLE, RECT_DVIEW_TITLE,
RECT_DVIEW_HSB, RECT_DVIEW_HSB,
RECT_DVIEW_VSB, RECT_DVIEW_VSB,
RECT_DVIEW_SIZE, RECT_DVIEW_SIZE
}; };
enum enum
@ -73,7 +73,7 @@ enum
VIEW_STATE_MOVING = 0x02, VIEW_STATE_MOVING = 0x02,
VIEW_STATE_SIZING = 0x04, VIEW_STATE_SIZING = 0x04,
VIEW_STATE_NEEDS_UPDATE = 0x08, VIEW_STATE_NEEDS_UPDATE = 0x08,
VIEW_STATE_FOLLOW_CPU = 0x10, VIEW_STATE_FOLLOW_CPU = 0x10
}; };
/*************************************************************************** /***************************************************************************

2
src/osd/modules/opengl/gl_shader_mgr.h
View File

@ -11,7 +11,7 @@ enum GLSL_SHADER_FEATURE {
GLSL_SHADER_FEAT_BILINEAR, GLSL_SHADER_FEAT_BILINEAR,
GLSL_SHADER_FEAT_INT_NUMBER, GLSL_SHADER_FEAT_INT_NUMBER,
GLSL_SHADER_FEAT_CUSTOM = GLSL_SHADER_FEAT_INT_NUMBER, GLSL_SHADER_FEAT_CUSTOM = GLSL_SHADER_FEAT_INT_NUMBER,
GLSL_SHADER_FEAT_MAX_NUMBER, GLSL_SHADER_FEAT_MAX_NUMBER
}; };
// old code passed sdl_info * to functions here // old code passed sdl_info * to functions here

4
src/osd/modules/render/d3d/d3dhlsl.h
View File

@ -36,7 +36,7 @@ public:
UT_FLOAT, UT_FLOAT,
UT_INT, UT_INT,
UT_MATRIX, UT_MATRIX,
UT_SAMPLER, UT_SAMPLER
} uniform_type; } uniform_type;
enum enum
@ -96,7 +96,7 @@ public:
CU_BLOOM_LVL4567_WEIGHTS, CU_BLOOM_LVL4567_WEIGHTS,
CU_BLOOM_LVL89A_WEIGHTS, CU_BLOOM_LVL89A_WEIGHTS,
CU_COUNT, CU_COUNT
}; };
uniform(effect *shader, const char *name, uniform_type type, int id); uniform(effect *shader, const char *name, uniform_type type, int id);