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m68000 callbacks to delegates (nw)

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This commit is contained in:
Miodrag Milanovic 2014-04-22 14:18:30 +00:00
parent c0d35f1990
commit a822b12416
37 changed files with 161 additions and 198 deletions
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47
src/emu/cpu/m68000/m68000.h
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@ -111,26 +111,11 @@ enum
M68K_GENPCBASE = STATE_GENPCBASE M68K_GENPCBASE = STATE_GENPCBASE
}; };
typedef void (*m68k_bkpt_ack_func)(device_t *device, UINT32 data);
typedef void (*m68k_reset_func)(device_t *device);
typedef void (*m68k_cmpild_func)(device_t *device, UINT32 data, UINT8 reg);
typedef void (*m68k_rte_func)(device_t *device);
typedef int (*m68k_tas_func)(device_t *device);
unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type); unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type);
class m68000_base_device; class m68000_base_device;
typedef int (*instruction_hook_t)(m68000_base_device *device, offs_t curpc);
extern const device_type M68K; extern const device_type M68K;
class m68000_base_device : public cpu_device class m68000_base_device : public cpu_device
@ -183,8 +168,15 @@ public:
void define_state(void); void define_state(void);
void set_reset_callback(write_line_delegate callback);
void set_cmpild_callback(write32_delegate callback);
void set_rte_callback(write_line_delegate callback);
void set_tas_callback(read_line_delegate callback);
UINT16 get_fc();
void set_encrypted_opcode_range(offs_t start, offs_t end);
void set_hmmu_enable(int enable);
void set_instruction_hook(read32_delegate ihook);
void set_buserror_details(UINT32 fault_addr, UINT8 rw, UINT8 fc);
public: public:
@ -261,11 +253,11 @@ public:
/* Callbacks to host */ /* Callbacks to host */
device_irq_acknowledge_callback int_ack_callback; /* Interrupt Acknowledge */ device_irq_acknowledge_callback int_ack_callback; /* Interrupt Acknowledge */
m68k_bkpt_ack_func bkpt_ack_callback; /* Breakpoint Acknowledge */ write32_delegate bkpt_ack_callback; /* Breakpoint Acknowledge */
m68k_reset_func reset_instr_callback; /* Called when a RESET instruction is encountered */ write_line_delegate reset_instr_callback; /* Called when a RESET instruction is encountered */
m68k_cmpild_func cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
m68k_rte_func rte_instr_callback; /* Called when a RTE instruction is encountered */ write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */
m68k_tas_func tas_instr_callback; /* Called when a TAS instruction is encountered, allows / disallows writeback */ read_line_delegate tas_instr_callback; /* Called when a TAS instruction is encountered, allows / disallows writeback */
address_space *program; address_space *program;
@ -373,7 +365,7 @@ public:
/* external instruction hook (does not depend on debug mode) */ /* external instruction hook (does not depend on debug mode) */
instruction_hook_t instruction_hook; read32_delegate instruction_hook;
@ -790,14 +782,5 @@ extern const device_type SCC68070;
extern const device_type FSCPU32; extern const device_type FSCPU32;
extern const device_type MCF5206E; extern const device_type MCF5206E;
extern void m68k_set_reset_callback(m68000_base_device *device, m68k_reset_func callback);
extern void m68k_set_cmpild_callback(m68000_base_device *device, m68k_cmpild_func callback);
extern void m68k_set_rte_callback(m68000_base_device *device, m68k_rte_func callback);
extern void m68k_set_tas_callback(m68000_base_device *device, m68k_tas_func callback);
extern UINT16 m68k_get_fc(m68000_base_device *device);
extern void m68k_set_encrypted_opcode_range(m68000_base_device *device, offs_t start, offs_t end);
extern void m68k_set_hmmu_enable(m68000_base_device *device, int enable);
extern void m68k_set_instruction_hook(m68000_base_device *device, instruction_hook_t ihook);
extern void m68k_set_buserror_details(m68000_base_device *device, UINT32 fault_addr, UINT8 rw, UINT8 fc);
#endif /* __M68000_H__ */ #endif /* __M68000_H__ */

20
src/emu/cpu/m68000/m68k_in.c
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@ -3158,8 +3158,8 @@ M68KMAKE_OP(bkpt, 0, ., .)
{ {
if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type))
{ {
if ((mc68kcpu)->bkpt_ack_callback != NULL) if (!(mc68kcpu)->bkpt_ack_callback.isnull())
(*(mc68kcpu)->bkpt_ack_callback)((mc68kcpu), CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) ? (mc68kcpu)->ir & 7 : 0); ((mc68kcpu)->bkpt_ack_callback)((*mc68kcpu->program), 0, CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) ? (mc68kcpu)->ir & 7 : 0, 0xffffffff);
} }
m68ki_exception_illegal(mc68kcpu); m68ki_exception_illegal(mc68kcpu);
} }
@ -4281,8 +4281,8 @@ M68KMAKE_OP(cmpi, 32, ., d)
UINT32 dst = DY(mc68kcpu); UINT32 dst = DY(mc68kcpu);
UINT32 res = dst - src; UINT32 res = dst - src;
if ((mc68kcpu)->cmpild_instr_callback != NULL) if (!(mc68kcpu)->cmpild_instr_callback.isnull())
(*(mc68kcpu)->cmpild_instr_callback)((mc68kcpu), src, (mc68kcpu)->ir & 7); ((mc68kcpu)->cmpild_instr_callback)(*(mc68kcpu)->program, (mc68kcpu)->ir & 7, src, 0xffffffff);
(mc68kcpu)->n_flag = NFLAG_32(res); (mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@ -8282,8 +8282,8 @@ M68KMAKE_OP(reset, 0, ., .)
{ {
if((mc68kcpu)->s_flag) if((mc68kcpu)->s_flag)
{ {
if ((mc68kcpu)->reset_instr_callback != NULL) if (!(mc68kcpu)->reset_instr_callback.isnull())
(*(mc68kcpu)->reset_instr_callback)((mc68kcpu)); ((mc68kcpu)->reset_instr_callback)(1);
(mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_reset; (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_reset;
return; return;
} }
@ -8988,8 +8988,8 @@ M68KMAKE_OP(rte, 32, ., .)
UINT32 new_pc; UINT32 new_pc;
UINT32 format_word; UINT32 format_word;
if ((mc68kcpu)->rte_instr_callback != NULL) if (!(mc68kcpu)->rte_instr_callback.isnull())
(*(mc68kcpu)->rte_instr_callback)((mc68kcpu)); ((mc68kcpu)->rte_instr_callback)(1);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
@ -10026,8 +10026,8 @@ M68KMAKE_OP(tas, 8, ., .)
disabled in order to function properly. Some Amiga software may also rely disabled in order to function properly. Some Amiga software may also rely
on this, but only when accessing specific addresses so additional functionality on this, but only when accessing specific addresses so additional functionality
will be needed. */ will be needed. */
if ((mc68kcpu)->tas_instr_callback != NULL) if (!(mc68kcpu)->tas_instr_callback.isnull())
allow_writeback = (*(mc68kcpu)->tas_instr_callback)((mc68kcpu)); allow_writeback = ((mc68kcpu)->tas_instr_callback)();
if (allow_writeback) if (allow_writeback)
m68ki_write_8((mc68kcpu), ea, dst | 0x80); m68ki_write_8((mc68kcpu), ea, dst | 0x80);

59
src/emu/cpu/m68000/m68kcpu.c
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@ -840,8 +840,8 @@ inline void m68000_base_device::cpu_execute(void)
debugger_instruction_hook(this, REG_PC(this)); debugger_instruction_hook(this, REG_PC(this));
/* call external instruction hook (independent of debug mode) */ /* call external instruction hook (independent of debug mode) */
if (instruction_hook != NULL) if (!instruction_hook.isnull())
instruction_hook(this, REG_PC(this)); instruction_hook(*program, REG_PC(this), 0xffffffff);
/* Record previous program counter */ /* Record previous program counter */
REG_PPC(this) = REG_PC(this); REG_PPC(this) = REG_PC(this);
@ -1085,11 +1085,6 @@ void m68000_base_device::reset_cpu(void)
// clear instruction cache // clear instruction cache
m68ki_ic_clear(this); m68ki_ic_clear(this);
} }
// disable instruction hook
instruction_hook = NULL;
} }
@ -1239,20 +1234,20 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, as
/* global access */ /* global access */
void m68k_set_encrypted_opcode_range(m68000_base_device *device, offs_t start, offs_t end) void m68000_base_device::set_encrypted_opcode_range(offs_t start, offs_t end)
{ {
device->encrypted_start = start; encrypted_start = start;
device->encrypted_end = end; encrypted_end = end;
} }
void m68k_set_hmmu_enable(m68000_base_device *device, int enable) void m68000_base_device::set_hmmu_enable(int enable)
{ {
device->hmmu_enabled = enable; hmmu_enabled = enable;
} }
void m68k_set_instruction_hook(m68000_base_device *device, instruction_hook_t ihook) void m68000_base_device::set_instruction_hook(read32_delegate ihook)
{ {
device->instruction_hook = ihook; instruction_hook = ihook;
} }
/**************************************************************************** /****************************************************************************
@ -1676,39 +1671,39 @@ void m68000_base_device::init32hmmu(address_space &space)
write32 = m68k_write32_delegate(FUNC(m68000_base_device::writelong_d32_hmmu), this); write32 = m68k_write32_delegate(FUNC(m68000_base_device::writelong_d32_hmmu), this);
} }
void m68k_set_reset_callback(m68000_base_device *device, m68k_reset_func callback) void m68000_base_device::set_reset_callback(write_line_delegate callback)
{ {
device->reset_instr_callback = callback; reset_instr_callback = callback;
} }
// fault_addr = address to indicate fault at // fault_addr = address to indicate fault at
// rw = 0 for read, 1 for write // rw = 0 for read, 1 for write
// fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here) // fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here)
void m68k_set_buserror_details(m68000_base_device *device, UINT32 fault_addr, UINT8 rw, UINT8 fc) void m68000_base_device::set_buserror_details(UINT32 fault_addr, UINT8 rw, UINT8 fc)
{ {
device->aerr_address = fault_addr; aerr_address = fault_addr;
device->aerr_write_mode = rw; aerr_write_mode = rw;
device->aerr_fc = fc; aerr_fc = fc;
} }
void m68k_set_cmpild_callback(m68000_base_device *device, m68k_cmpild_func callback) void m68000_base_device::set_cmpild_callback(write32_delegate callback)
{ {
device->cmpild_instr_callback = callback; cmpild_instr_callback = callback;
} }
void m68k_set_rte_callback(m68000_base_device *device, m68k_rte_func callback) void m68000_base_device::set_rte_callback(write_line_delegate callback)
{ {
device->rte_instr_callback = callback; rte_instr_callback = callback;
} }
void m68k_set_tas_callback(m68000_base_device *device, m68k_tas_func callback) void m68000_base_device::set_tas_callback(read_line_delegate callback)
{ {
device->tas_instr_callback = callback; tas_instr_callback = callback;
} }
UINT16 m68k_get_fc(m68000_base_device *device) UINT16 m68000_base_device::get_fc()
{ {
return device->mmu_tmp_fc; return mmu_tmp_fc;
} }
/**************************************************************************** /****************************************************************************
@ -2417,12 +2412,6 @@ void m68000_base_device::clear_all()
cyc_exception = 0; cyc_exception = 0;
int_ack_callback = 0; int_ack_callback = 0;
bkpt_ack_callback = 0;
reset_instr_callback = 0;
cmpild_instr_callback = 0;
rte_instr_callback = 0;
tas_instr_callback = 0;
program = 0; program = 0;
opcode_xor = 0; opcode_xor = 0;
@ -2477,8 +2466,6 @@ void m68000_base_device::clear_all()
ic_data[i] = 0; ic_data[i] = 0;
internal = 0; internal = 0;
instruction_hook = 0;
} }

5
src/emu/machine/saturn.c
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@ -744,10 +744,9 @@ TIMER_CALLBACK_MEMBER(saturn_state::stv_rtc_increment)
/* Official documentation says that the "RESET/TAS opcodes aren't supported", but Out Run definitely contradicts with it. /* Official documentation says that the "RESET/TAS opcodes aren't supported", but Out Run definitely contradicts with it.
Since that m68k can't reset itself via the RESET opcode I suppose that the SMPC actually do it by reading an i/o Since that m68k can't reset itself via the RESET opcode I suppose that the SMPC actually do it by reading an i/o
connected to this opcode. */ connected to this opcode. */
void saturn_state::m68k_reset_callback(device_t *device) WRITE_LINE_MEMBER(saturn_state::m68k_reset_callback)
{ {
saturn_state *state = device->machine().driver_data<saturn_state>(); machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(saturn_state::smpc_audio_reset_line_pulse), this));
device->machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(saturn_state::smpc_audio_reset_line_pulse), state));
printf("m68k RESET opcode triggered\n"); printf("m68k RESET opcode triggered\n");
} }

2
src/mame/drivers/cps2.c
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@ -8457,7 +8457,7 @@ DRIVER_INIT_MEMBER(cps_state,gigaman2)
space.install_readwrite_handler(0x618000, 0x619fff, read16_delegate(FUNC(cps_state::gigaman2_dummyqsound_r),this), write16_delegate(FUNC(cps_state::gigaman2_dummyqsound_w), this)); // no qsound.. space.install_readwrite_handler(0x618000, 0x619fff, read16_delegate(FUNC(cps_state::gigaman2_dummyqsound_r),this), write16_delegate(FUNC(cps_state::gigaman2_dummyqsound_w), this)); // no qsound..
space.set_decrypted_region(0x000000, (length) - 1, &rom[length/4]); space.set_decrypted_region(0x000000, (length) - 1, &rom[length/4]);
m68k_set_encrypted_opcode_range(m_maincpu, 0, length); m_maincpu->set_encrypted_opcode_range(0, length);
/* no digital volume switches on this? */ /* no digital volume switches on this? */
m_digital_volume_timer->adjust(attotime::never, 0, attotime::never); m_digital_volume_timer->adjust(attotime::never, 0, attotime::never);

10
src/mame/drivers/mpu4vid.c
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@ -297,6 +297,7 @@ public:
DECLARE_READ16_MEMBER( characteriser16_r ); DECLARE_READ16_MEMBER( characteriser16_r );
DECLARE_WRITE16_MEMBER( bwb_characteriser16_w ); DECLARE_WRITE16_MEMBER( bwb_characteriser16_w );
DECLARE_READ16_MEMBER( bwb_characteriser16_r ); DECLARE_READ16_MEMBER( bwb_characteriser16_r );
DECLARE_WRITE_LINE_MEMBER(mpu_video_reset);
}; };
/************************************* /*************************************
@ -1251,11 +1252,10 @@ static INPUT_PORTS_START( adders )
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_COIN4) PORT_NAME("100p")//PORT_IMPULSE(5) PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_COIN4) PORT_NAME("100p")//PORT_IMPULSE(5)
INPUT_PORTS_END INPUT_PORTS_END
static void video_reset(device_t *device) WRITE_LINE_MEMBER(mpu4vid_state::mpu_video_reset)
{ {
mpu4vid_state *state = device->machine().driver_data<mpu4vid_state>(); m_ptm->reset();
state->m_ptm->reset(); m_acia_1->reset();
state->m_acia_1->reset();
} }
/* machine start (called only once) */ /* machine start (called only once) */
@ -1271,7 +1271,7 @@ MACHINE_START_MEMBER(mpu4vid_state,mpu4_vid)
MechMtr_config(machine(),8); MechMtr_config(machine(),8);
/* Hook the reset line */ /* Hook the reset line */
m68k_set_reset_callback(m_videocpu, ::video_reset); m_videocpu->set_reset_callback(write_line_delegate(FUNC(mpu4vid_state::mpu_video_reset),this));
} }
MACHINE_RESET_MEMBER(mpu4vid_state,mpu4_vid) MACHINE_RESET_MEMBER(mpu4vid_state,mpu4_vid)

7
src/mame/drivers/segaorun.c
View File

@ -571,7 +571,7 @@ void segaorun_state::machine_reset()
m_segaic16vid->segaic16_tilemap_reset(*m_screen); m_segaic16vid->segaic16_tilemap_reset(*m_screen);
// hook the RESET line, which resets CPU #1 // hook the RESET line, which resets CPU #1
m68k_set_reset_callback(m_maincpu, m68k_reset_callback); m_maincpu->set_reset_callback(write_line_delegate(FUNC(segaorun_state::m68k_reset_callback),this));
// start timers to track interrupts // start timers to track interrupts
m_scanline_timer->adjust(m_screen->time_until_pos(223), 223); m_scanline_timer->adjust(m_screen->time_until_pos(223), 223);
@ -875,10 +875,9 @@ void segaorun_state::update_main_irqs()
// main 68000 is reset // main 68000 is reset
//------------------------------------------------- //-------------------------------------------------
void segaorun_state::m68k_reset_callback(device_t *device) WRITE_LINE_MEMBER(segaorun_state::m68k_reset_callback)
{ {
segaorun_state *state = device->machine().driver_data<segaorun_state>(); m_subcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
state->m_subcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
} }

11
src/mame/drivers/segaxbd.c
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@ -642,8 +642,8 @@ void segaxbd_state::machine_reset()
{ {
m_segaic16vid->segaic16_tilemap_reset(*m_screen); m_segaic16vid->segaic16_tilemap_reset(*m_screen);
// hook the RESET line, which resets CPU #1 // hook the RESET line, which resets CPU #1
m68k_set_reset_callback(m_maincpu, &segaxbd_state::m68k_reset_callback); m_maincpu->set_reset_callback(write_line_delegate(FUNC(segaxbd_state::m68k_reset_callback),this));
// start timers to track interrupts // start timers to track interrupts
m_scanline_timer->adjust(m_screen->time_until_pos(1), 1); m_scanline_timer->adjust(m_screen->time_until_pos(1), 1);
@ -858,11 +858,10 @@ void segaxbd_state::update_main_irqs()
// main 68000 is reset // main 68000 is reset
//------------------------------------------------- //-------------------------------------------------
void segaxbd_state::m68k_reset_callback(device_t *device) WRITE_LINE_MEMBER(segaxbd_state::m68k_reset_callback)
{ {
segaxbd_state *state = device->machine().driver_data<segaxbd_state>(); m_subcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
state->m_subcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
} }

2
src/mame/drivers/stv.c
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@ -1334,7 +1334,7 @@ MACHINE_START_MEMBER(stv_state,stv)
m_stv_rtc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(stv_state::stv_rtc_increment),this)); m_stv_rtc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(stv_state::stv_rtc_increment),this));
m68k_set_reset_callback(m_audiocpu, &saturn_state::m68k_reset_callback); m_audiocpu->set_reset_callback(write_line_delegate(FUNC(stv_state::m68k_reset_callback),this));
} }

7
src/mame/drivers/tatsumi.c
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@ -852,10 +852,9 @@ INTERRUPT_GEN_MEMBER(tatsumi_state::roundup5_interrupt)
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xc8/4); /* VBL */ device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xc8/4); /* VBL */
} }
static void apache3_68000_reset(device_t *device) WRITE_LINE_MEMBER(tatsumi_state::apache3_68000_reset)
{ {
tatsumi_state *state = device->machine().driver_data<tatsumi_state>(); m_subcpu2->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
state->m_subcpu2->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
} }
MACHINE_RESET_MEMBER(tatsumi_state,apache3) MACHINE_RESET_MEMBER(tatsumi_state,apache3)
@ -863,7 +862,7 @@ MACHINE_RESET_MEMBER(tatsumi_state,apache3)
m_subcpu2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // TODO m_subcpu2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // TODO
/* Hook the RESET line, which resets the Z80 */ /* Hook the RESET line, which resets the Z80 */
m68k_set_reset_callback(m_subcpu, apache3_68000_reset); m_subcpu->set_reset_callback(write_line_delegate(FUNC(tatsumi_state::apache3_68000_reset),this));
} }

10
src/mame/drivers/toaplan2.c
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@ -374,12 +374,10 @@ MACHINE_START_MEMBER(toaplan2_state,toaplan2)
} }
static void toaplan2_reset(device_t *device) WRITE_LINE_MEMBER(toaplan2_state::toaplan2_reset)
{ {
toaplan2_state *state = device->machine().driver_data<toaplan2_state>(); if (m_audiocpu != NULL)
m_audiocpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
if (state->m_audiocpu != NULL)
state->m_audiocpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
} }
@ -390,7 +388,7 @@ MACHINE_RESET_MEMBER(toaplan2_state,toaplan2)
// All games execute a RESET instruction on init, presumably to reset the sound CPU. // All games execute a RESET instruction on init, presumably to reset the sound CPU.
// This is important for games with common RAM; the RAM test will fail // This is important for games with common RAM; the RAM test will fail
// when leaving service mode if the sound CPU is not reset. // when leaving service mode if the sound CPU is not reset.
m68k_set_reset_callback(m_maincpu, toaplan2_reset); m_maincpu->set_reset_callback(write_line_delegate(FUNC(toaplan2_state::toaplan2_reset),this));
} }

2
src/mame/includes/amiga.h
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@ -526,6 +526,8 @@ public:
DECLARE_READ8_MEMBER( amigacd_tpi6525_portc_r ); DECLARE_READ8_MEMBER( amigacd_tpi6525_portc_r );
DECLARE_WRITE8_MEMBER( amigacd_tpi6525_portb_w ); DECLARE_WRITE8_MEMBER( amigacd_tpi6525_portb_w );
DECLARE_WRITE_LINE_MEMBER( amigacd_tpi6525_irq ); DECLARE_WRITE_LINE_MEMBER( amigacd_tpi6525_irq );
DECLARE_WRITE_LINE_MEMBER(amiga_m68k_reset);
int m_centronics_busy; int m_centronics_busy;
int m_centronics_perror; int m_centronics_perror;

2
src/mame/includes/megadriv.h
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@ -122,6 +122,8 @@ public:
DECLARE_VIDEO_START( megadriv ); DECLARE_VIDEO_START( megadriv );
UINT32 screen_update_megadriv(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); UINT32 screen_update_megadriv(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void screen_eof_megadriv(screen_device &screen, bool state); void screen_eof_megadriv(screen_device &screen, bool state);
READ_LINE_MEMBER(megadriv_tas_callback);
}; };

2
src/mame/includes/segaorun.h
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@ -102,7 +102,7 @@ protected:
// internal helpers // internal helpers
void update_main_irqs(); void update_main_irqs();
static void m68k_reset_callback(device_t *device); DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
// custom I/O // custom I/O
DECLARE_READ16_MEMBER( outrun_custom_io_r ); DECLARE_READ16_MEMBER( outrun_custom_io_r );

2
src/mame/includes/segaxbd.h
View File

@ -103,7 +103,7 @@ protected:
// internal helpers // internal helpers
void update_main_irqs(); void update_main_irqs();
static void m68k_reset_callback(device_t *device); DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
// custom I/O // custom I/O
void generic_iochip0_lamps_w(UINT8 data); void generic_iochip0_lamps_w(UINT8 data);

2
src/mame/includes/stv.h
View File

@ -639,7 +639,7 @@ public:
int numfiles; // # of entries in current directory int numfiles; // # of entries in current directory
int firstfile; // first non-directory file int firstfile; // first non-directory file
static void m68k_reset_callback(device_t *device); DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
int DectoBCD(int num); int DectoBCD(int num);
DECLARE_WRITE_LINE_MEMBER(scudsp_end_w); DECLARE_WRITE_LINE_MEMBER(scudsp_end_w);

1
src/mame/includes/tatsumi.h
View File

@ -137,6 +137,7 @@ public:
INTERRUPT_GEN_MEMBER(roundup5_interrupt); INTERRUPT_GEN_MEMBER(roundup5_interrupt);
DECLARE_READ8_MEMBER(tatsumi_hack_ym2151_r); DECLARE_READ8_MEMBER(tatsumi_hack_ym2151_r);
DECLARE_READ8_MEMBER(tatsumi_hack_oki_r); DECLARE_READ8_MEMBER(tatsumi_hack_oki_r);
DECLARE_WRITE_LINE_MEMBER(apache3_68000_reset);
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu; required_device<cpu_device> m_audiocpu;
required_device<m68000_base_device> m_subcpu; required_device<m68000_base_device> m_subcpu;

1
src/mame/includes/toaplan1.h
View File

@ -151,6 +151,7 @@ public:
void demonwld_driver_savestate(); void demonwld_driver_savestate();
void vimana_driver_savestate(); void vimana_driver_savestate();
DECLARE_WRITE_LINE_MEMBER(irqhandler); DECLARE_WRITE_LINE_MEMBER(irqhandler);
DECLARE_WRITE_LINE_MEMBER(toaplan1_reset_callback);
required_device<m68000_device> m_maincpu; required_device<m68000_device> m_maincpu;
required_device<cpu_device> m_audiocpu; required_device<cpu_device> m_audiocpu;
optional_device<cpu_device> m_dsp; optional_device<cpu_device> m_dsp;

3
src/mame/includes/toaplan2.h
View File

@ -159,7 +159,8 @@ public:
UINT8 m_pwrkick_hopper; UINT8 m_pwrkick_hopper;
DECLARE_CUSTOM_INPUT_MEMBER(pwrkick_hopper_status_r); DECLARE_CUSTOM_INPUT_MEMBER(pwrkick_hopper_status_r);
DECLARE_WRITE8_MEMBER(pwrkick_coin_w); DECLARE_WRITE8_MEMBER(pwrkick_coin_w);
DECLARE_WRITE_LINE_MEMBER(toaplan2_reset);
protected: protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
}; };

21
src/mame/machine/amiga.c
View File

@ -256,27 +256,26 @@ void amiga_machine_config(running_machine &machine, const amiga_machine_interfac
} }
static void amiga_m68k_reset(device_t *device) WRITE_LINE_MEMBER(amiga_state::amiga_m68k_reset)
{ {
amiga_state *state = device->machine().driver_data<amiga_state>(); address_space &space = m_maincpu->space(AS_PROGRAM);
address_space &space = device->memory().space(AS_PROGRAM);
logerror("Executed RESET at PC=%06x\n", space.device().safe_pc()); logerror("Executed RESET at PC=%06x\n", space.device().safe_pc());
/* Initialize the various chips */ /* Initialize the various chips */
state->m_cia_0->reset(); m_cia_0->reset();
state->m_cia_1->reset(); m_cia_1->reset();
custom_reset(device->machine()); custom_reset(machine());
autoconfig_reset(device->machine()); autoconfig_reset(machine());
/* set the overlay bit */ /* set the overlay bit */
if ( IS_AGA(state->m_intf) ) if ( IS_AGA(m_intf) )
{ {
space.write_byte( 0xbfa001, 1 ); space.write_byte( 0xbfa001, 1 );
} }
else else
{ {
state->amiga_cia_w(space, 0x1001/2, 1, 0xffff); amiga_cia_w(space, 0x1001/2, 1, 0xffff);
} }
} }
@ -288,9 +287,9 @@ MACHINE_START_MEMBER(amiga_state,amiga)
MACHINE_RESET_MEMBER(amiga_state,amiga) MACHINE_RESET_MEMBER(amiga_state,amiga)
{ {
/* set m68k reset function */ /* set m68k reset function */
m68k_set_reset_callback(m_maincpu, amiga_m68k_reset); m_maincpu->set_reset_callback(write_line_delegate(FUNC(amiga_state::amiga_m68k_reset),this));
amiga_m68k_reset(m_maincpu); amiga_m68k_reset(1);
/* call the system-specific callback */ /* call the system-specific callback */
if (m_intf->reset_callback) if (m_intf->reset_callback)

2
src/mame/machine/cps2crpt.c
View File

@ -721,7 +721,7 @@ static void cps2_decrypt(running_machine &machine, const UINT32 *master_key, UIN
} }
space.set_decrypted_region(0x000000, length - 1, dec); space.set_decrypted_region(0x000000, length - 1, dec);
m68k_set_encrypted_opcode_range((m68000_base_device*)machine.device("maincpu"), 0, length); ((m68000_base_device*)machine.device("maincpu"))->set_encrypted_opcode_range(0, length);
} }

2
src/mame/machine/deco102.c
View File

@ -59,7 +59,7 @@ void deco102_decrypt_cpu(running_machine &machine, const char *cputag, int addre
memcpy(buf, rom, size); memcpy(buf, rom, size);
space.set_decrypted_region(0, size - 1, opcodes); space.set_decrypted_region(0, size - 1, opcodes);
m68k_set_encrypted_opcode_range((m68000_base_device*)machine.device(cputag), 0, size); ((m68000_base_device*)machine.device(cputag))->set_encrypted_opcode_range(0, size);
for (i = 0; i < size / 2; i++) for (i = 0; i < size / 2; i++)
{ {

14
src/mame/machine/fd1094.c
View File

@ -720,8 +720,8 @@ void fd1094_device::device_start()
m_cache.configure(0x000000, m_srcbytes, 0x000000); m_cache.configure(0x000000, m_srcbytes, 0x000000);
// register for the state changing callbacks we need in the m68000 // register for the state changing callbacks we need in the m68000
m68k_set_cmpild_callback(this, &fd1094_device::cmp_callback); set_cmpild_callback(write32_delegate(FUNC(fd1094_device::cmp_callback),this));
m68k_set_rte_callback(this, &fd1094_device::rte_callback); set_rte_callback(write_line_delegate(FUNC(fd1094_device::rte_callback),this));
set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fd1094_device::irq_callback),this)); set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fd1094_device::irq_callback),this));
// save state // save state
@ -976,10 +976,10 @@ void fd1094_device::default_state_change(UINT8 state)
// (state change) // (state change)
//------------------------------------------------- //-------------------------------------------------
void fd1094_device::cmp_callback(device_t *device, UINT32 val, UINT8 reg) WRITE32_MEMBER(fd1094_device::cmp_callback)
{ {
if (reg == 0 && (val & 0x0000ffff) == 0x0000ffff) if (offset == 0 && (data & 0x0000ffff) == 0x0000ffff)
downcast<fd1094_device *>(device)->change_state(val >> 16); change_state(data >> 16);
} }
@ -1000,9 +1000,9 @@ IRQ_CALLBACK_MEMBER( fd1094_device::irq_callback )
// is encountered // is encountered
//------------------------------------------------- //-------------------------------------------------
void fd1094_device::rte_callback(device_t *device) WRITE_LINE_MEMBER(fd1094_device::rte_callback)
{ {
downcast<fd1094_device *>(device)->change_state(STATE_RTE); change_state(STATE_RTE);
} }

4
src/mame/machine/fd1094.h
View File

@ -98,8 +98,8 @@ protected:
IRQ_CALLBACK_MEMBER( irq_callback ); IRQ_CALLBACK_MEMBER( irq_callback );
// static helpers // static helpers
static void cmp_callback(device_t *device, UINT32 val, UINT8 reg); DECLARE_WRITE32_MEMBER(cmp_callback);
static void rte_callback(device_t *device); DECLARE_WRITE_LINE_MEMBER(rte_callback);
// internal state // internal state
UINT8 m_state; UINT8 m_state;

4
src/mame/machine/megadriv.c
View File

@ -1017,7 +1017,7 @@ MACHINE_CONFIG_FRAGMENT( md_pal )
MACHINE_CONFIG_END MACHINE_CONFIG_END
static int megadriv_tas_callback(device_t *device) READ_LINE_MEMBER(md_base_state::megadriv_tas_callback)
{ {
return 0; // writeback not allowed return 0; // writeback not allowed
} }
@ -1034,7 +1034,7 @@ void md_base_state::megadriv_init_common()
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(md_base_state::genesis_int_callback),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(md_base_state::genesis_int_callback),this));
m68k_set_tas_callback(m_maincpu, megadriv_tas_callback); m_maincpu->set_tas_callback(read_line_delegate(FUNC(md_base_state::megadriv_tas_callback),this));
m_megadrive_io_read_data_port_ptr = read8_delegate(FUNC(md_base_state::megadrive_io_read_data_port_3button),this); m_megadrive_io_read_data_port_ptr = read8_delegate(FUNC(md_base_state::megadrive_io_read_data_port_3button),this);
m_megadrive_io_write_data_port_ptr = write16_delegate(FUNC(md_base_state::megadrive_io_write_data_port_3button),this); m_megadrive_io_write_data_port_ptr = write16_delegate(FUNC(md_base_state::megadrive_io_write_data_port_3button),this);

10
src/mame/machine/toaplan1.c
View File

@ -366,11 +366,9 @@ WRITE16_MEMBER(toaplan1_state::samesame_coin_w)
} }
} }
static void toaplan1_reset_callback(device_t *device) WRITE_LINE_MEMBER(toaplan1_state::toaplan1_reset_callback)
{ {
toaplan1_state *state = device->machine().driver_data<toaplan1_state>(); toaplan1_reset_sound();
state->toaplan1_reset_sound();
} }
MACHINE_RESET_MEMBER(toaplan1_state,toaplan1) MACHINE_RESET_MEMBER(toaplan1_state,toaplan1)
@ -384,7 +382,7 @@ MACHINE_RESET_MEMBER(toaplan1_state,toaplan1)
MACHINE_RESET_MEMBER(toaplan1_state,zerowing) MACHINE_RESET_MEMBER(toaplan1_state,zerowing)
{ {
MACHINE_RESET_CALL_MEMBER(toaplan1); MACHINE_RESET_CALL_MEMBER(toaplan1);
m68k_set_reset_callback(m_maincpu, toaplan1_reset_callback); m_maincpu->set_reset_callback(write_line_delegate(FUNC(toaplan1_state::toaplan1_reset_callback),this));
} }
MACHINE_RESET_MEMBER(toaplan1_state,demonwld) MACHINE_RESET_MEMBER(toaplan1_state,demonwld)
@ -401,7 +399,7 @@ MACHINE_RESET_MEMBER(toaplan1_state,vimana)
m_vimana_coins[0] = m_vimana_coins[1] = 0; m_vimana_coins[0] = m_vimana_coins[1] = 0;
m_vimana_credits = 0; m_vimana_credits = 0;
m_vimana_latch = 0; m_vimana_latch = 0;
m68k_set_reset_callback(m_maincpu, toaplan1_reset_callback); m_maincpu->set_reset_callback(write_line_delegate(FUNC(toaplan1_state::toaplan1_reset_callback),this));
} }

39
src/mess/drivers/apollo.c
View File

@ -221,17 +221,15 @@ UINT32 apollo_get_node_id(void) {
apollo_instruction_hook apollo_instruction_hook
must be called by the CPU core before executing each instruction must be called by the CPU core before executing each instruction
***************************************************************************/ ***************************************************************************/
int apollo_instruction_hook(m68000_base_device *device, offs_t curpc) READ32_MEMBER(apollo_state::apollo_instruction_hook)
{ {
m68000_base_device *m68k = device;
static UINT16 idle_counter = 0; static UINT16 idle_counter = 0;
// m68k->ir still has previous instruction // m_maincpu->ir still has previous instruction
UINT16 last_ir = m68k->ir; UINT16 last_ir = m_maincpu->ir;
// get next instruction (or 0 if unavailable) // get next instruction (or 0 if unavailable)
UINT16 next_ir = (m68k->pref_addr == REG_PC(m68k)) ? m68k->pref_data : 0; UINT16 next_ir = (m_maincpu->pref_addr == REG_PC(m_maincpu)) ? m_maincpu->pref_data : 0;
// check for NULLPROC: // check for NULLPROC:
// 027C F8FF AND.W #F8FF,SR // 027C F8FF AND.W #F8FF,SR
@ -240,7 +238,7 @@ int apollo_instruction_hook(m68000_base_device *device, offs_t curpc)
if ((next_ir == 0x60fa && last_ir == 0x027c) || (next_ir == 0x027c && last_ir == 0x60fa)) if ((next_ir == 0x60fa && last_ir == 0x027c) || (next_ir == 0x027c && last_ir == 0x60fa))
{ {
// we are within the idle loop, slow down CPU to reduce power usage // we are within the idle loop, slow down CPU to reduce power usage
m68k->remaining_cycles -= 500; m_maincpu->remaining_cycles -= 500;
if (apollo_config(APOLLO_CONF_IDLE_SLEEP) && apollo_is_dsp3x00() && ++idle_counter >= 1000) if (apollo_config(APOLLO_CONF_IDLE_SLEEP) && apollo_is_dsp3x00() && ++idle_counter >= 1000)
{ {
@ -256,19 +254,19 @@ int apollo_instruction_hook(m68000_base_device *device, offs_t curpc)
idle_counter = 0; idle_counter = 0;
} }
if (!m68k->has_fpu && !m68k->pmmu_enabled && (m68k->ir & 0xff00) == 0xf200) if (!m_maincpu->has_fpu && !m_maincpu->pmmu_enabled && (m_maincpu->ir & 0xff00) == 0xf200)
{ {
// set APOLLO_CSR_SR_FP_TRAP in cpu status register for /sau7/self_test // set APOLLO_CSR_SR_FP_TRAP in cpu status register for /sau7/self_test
apollo_csr_set_status_register(APOLLO_CSR_SR_FP_TRAP, APOLLO_CSR_SR_FP_TRAP); apollo_csr_set_status_register(APOLLO_CSR_SR_FP_TRAP, APOLLO_CSR_SR_FP_TRAP);
} }
if (m68k->t1_flag && !m68k->s_flag) if (m_maincpu->t1_flag && !m_maincpu->s_flag)
{ {
// FIXME: trace emulation is disabled in m68kcpu.h; why??? // FIXME: trace emulation is disabled in m68kcpu.h; why???
m68ki_exception_trace(m68k); m68ki_exception_trace(m_maincpu);
} }
return apollo_debug_instruction_hook(device, curpc); return apollo_debug_instruction_hook(m_maincpu, offset);
} }
/*************************************************************************** /***************************************************************************
@ -930,26 +928,23 @@ void apollo_state::machine_reset()
} }
#endif #endif
m68k_set_instruction_hook(m_maincpu, apollo_instruction_hook); m_maincpu->set_instruction_hook(read32_delegate(FUNC(apollo_state::apollo_instruction_hook),this));
} }
static void apollo_reset_instr_callback(device_t *device) WRITE_LINE_MEMBER(apollo_state::apollo_reset_instr_callback)
{ {
running_machine &machine = device->machine(); MLOG1(("apollo_reset_instr_callback"));
apollo_state *apollo = machine.driver_data<apollo_state>();
DLOG1(("apollo_reset_instr_callback"));
// reset the CPU board devices // reset the CPU board devices
apollo->MACHINE_RESET_CALL_MEMBER(apollo); MACHINE_RESET_CALL_MEMBER(apollo);
// reset the ISA bus devices // reset the ISA bus devices
apollo->m_isa->reset(); m_isa->reset();
if (!apollo_is_dsp3x00()) if (!apollo_is_dsp3x00())
{ {
machine.device(APOLLO_SCREEN_TAG)->reset(); machine().device(APOLLO_SCREEN_TAG)->reset();
machine.device(APOLLO_KBD_TAG )->reset(); machine().device(APOLLO_KBD_TAG )->reset();
} }
} }
@ -978,7 +973,7 @@ DRIVER_INIT_MEMBER(apollo_state,dn3500)
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(apollo_state::apollo_irq_acknowledge),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(apollo_state::apollo_irq_acknowledge),this));
/* hook the RESET line, which resets a slew of other components */ /* hook the RESET line, which resets a slew of other components */
m68k_set_reset_callback(m_maincpu, apollo_reset_instr_callback); m_maincpu->set_reset_callback(write_line_delegate(FUNC(apollo_state::apollo_reset_instr_callback),this));
ram_base_address = DN3500_RAM_BASE; ram_base_address = DN3500_RAM_BASE;
ram_end_address = DN3500_RAM_END; ram_end_address = DN3500_RAM_END;

38
src/mess/drivers/dectalk.c
View File

@ -350,6 +350,7 @@ public:
void dectalk_clear_all_fifos( ); void dectalk_clear_all_fifos( );
void dectalk_semaphore_w ( UINT16 data ); void dectalk_semaphore_w ( UINT16 data );
UINT16 dectalk_outfifo_r ( ); UINT16 dectalk_outfifo_r ( );
DECLARE_WRITE_LINE_MEMBER(dectalk_reset);
protected: protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@ -458,33 +459,32 @@ UINT16 dectalk_state::dectalk_outfifo_r ( )
} }
/* Machine reset and friends: stuff that needs setting up which IS directly affected by reset */ /* Machine reset and friends: stuff that needs setting up which IS directly affected by reset */
static void dectalk_reset(device_t *device) WRITE_LINE_MEMBER(dectalk_state::dectalk_reset)
{ {
dectalk_state *state = device->machine().driver_data<dectalk_state>(); m_hack_self_test = 0; // hack
state->m_hack_self_test = 0; // hack
// stuff that is DIRECTLY affected by the RESET line // stuff that is DIRECTLY affected by the RESET line
device->machine().device<x2212_device>("x2212")->recall(0); machine().device<x2212_device>("x2212")->recall(0);
device->machine().device<x2212_device>("x2212")->recall(1); machine().device<x2212_device>("x2212")->recall(1);
device->machine().device<x2212_device>("x2212")->recall(0); // nvram recall machine().device<x2212_device>("x2212")->recall(0); // nvram recall
state->m_m68k_spcflags_latch = 1; // initial status is speech reset(d0) active and spc int(d6) disabled m_m68k_spcflags_latch = 1; // initial status is speech reset(d0) active and spc int(d6) disabled
state->m_m68k_tlcflags_latch = 0; // initial status is tone detect int(d6) off, answer phone(d8) off, ring detect int(d14) off m_m68k_tlcflags_latch = 0; // initial status is tone detect int(d6) off, answer phone(d8) off, ring detect int(d14) off
device->machine().device("duartn68681")->reset(); // reset the DUART machine().device("duartn68681")->reset(); // reset the DUART
// stuff that is INDIRECTLY affected by the RESET line // stuff that is INDIRECTLY affected by the RESET line
state->dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function. dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
state->dectalk_semaphore_w(0); // on the original DECtalk DTC-01 pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true. dectalk_semaphore_w(0); // on the original DECtalk DTC-01 pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
state->m_spc_error_latch = 0; // spc error latch is cleared on /reset m_spc_error_latch = 0; // spc error latch is cleared on /reset
state->m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010 m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
state->m_tlc_tonedetect = 0; // TODO, needed for selftest pass m_tlc_tonedetect = 0; // TODO, needed for selftest pass
state->m_tlc_ringdetect = 0; // TODO m_tlc_ringdetect = 0; // TODO
state->m_tlc_dtmf = 0; // TODO m_tlc_dtmf = 0; // TODO
state->m_duart_inport = 0xF; m_duart_inport = 0xF;
state->m_duart_outport = 0; m_duart_outport = 0;
} }
void dectalk_state::machine_reset() void dectalk_state::machine_reset()
{ {
/* hook the RESET line, which resets a slew of other components */ /* hook the RESET line, which resets a slew of other components */
m68k_set_reset_callback(m_maincpu, dectalk_reset); m_maincpu->set_reset_callback(write_line_delegate(FUNC(dectalk_state::dectalk_reset),this));
} }
/* Begin 68k i/o handlers */ /* Begin 68k i/o handlers */

6
src/mess/drivers/esq5505.c
View File

@ -345,7 +345,7 @@ READ16_MEMBER(esq5505_state::lower_r)
m_ram = (UINT16 *)(void *)memshare("osram")->ptr(); m_ram = (UINT16 *)(void *)memshare("osram")->ptr();
} }
if (m68k_get_fc(m_maincpu) == 0x6) // supervisor mode = ROM if (m_maincpu->get_fc() == 0x6) // supervisor mode = ROM
{ {
return m_rom[offset]; return m_rom[offset];
} }
@ -361,13 +361,13 @@ WRITE16_MEMBER(esq5505_state::lower_w)
if (offset < 0x4000) if (offset < 0x4000)
{ {
if (m68k_get_fc(m_maincpu) != 0x6) // if not supervisor mode, RAM if (m_maincpu->get_fc() != 0x6) // if not supervisor mode, RAM
{ {
COMBINE_DATA(&m_ram[offset]); COMBINE_DATA(&m_ram[offset]);
} }
else else
{ {
logerror("Write to ROM: %x @ %x (fc=%x)\n", data, offset, m68k_get_fc(m_maincpu)); logerror("Write to ROM: %x @ %x (fc=%x)\n", data, offset, m_maincpu->get_fc());
} }
} }
else else

3
src/mess/drivers/mac.c
View File

@ -304,8 +304,7 @@ WRITE8_MEMBER ( mac_state::mac_rbv_w )
case 0x00: case 0x00:
if (m_model == MODEL_MAC_LC) if (m_model == MODEL_MAC_LC)
{ {
m68000_base_device *m68k = downcast<m68000_base_device *>(m_maincpu.target()); m_maincpu->set_hmmu_enable((data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_LC);
m68k_set_hmmu_enable(m68k, (data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_LC);
} }
break; break;

2
src/mess/drivers/saturn.c
View File

@ -651,7 +651,7 @@ MACHINE_START_MEMBER(sat_console_state, saturn)
m_stv_rtc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(sat_console_state::stv_rtc_increment),this)); m_stv_rtc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(sat_console_state::stv_rtc_increment),this));
m68k_set_reset_callback(m_audiocpu, &sat_console_state::m68k_reset_callback); m_audiocpu->set_reset_callback(write_line_delegate(FUNC(sat_console_state::m68k_reset_callback),this));
} }
/* Die Hard Trilogy tests RAM address 0x25e7ffe bit 2 with Slave during FRT minit irq, in-development tool for breaking execution of it? */ /* Die Hard Trilogy tests RAM address 0x25e7ffe bit 2 with Slave during FRT minit irq, in-development tool for breaking execution of it? */

4
src/mess/drivers/wicat.c
View File

@ -390,7 +390,7 @@ READ16_MEMBER( wicat_state::invalid_r )
{ {
if(!space.debugger_access()) if(!space.debugger_access())
{ {
m68k_set_buserror_details(m_maincpu,0x300000+offset*2-2,0,m68k_get_fc(m_maincpu)); m_maincpu->set_buserror_details(0x300000+offset*2-2,0,m_maincpu->get_fc());
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
} }
@ -401,7 +401,7 @@ WRITE16_MEMBER( wicat_state::invalid_w )
{ {
if(!space.debugger_access()) if(!space.debugger_access())
{ {
m68k_set_buserror_details(m_maincpu,0x300000+offset*2-2,1,m68k_get_fc(m_maincpu)); m_maincpu->set_buserror_details(0x300000+offset*2-2,1,m_maincpu->get_fc());
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
} }

2
src/mess/drivers/x68k.c
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@ -1021,7 +1021,7 @@ void x68k_state::set_bus_error(UINT32 address, bool write, UINT16 mem_mask)
if(!ACCESSING_BITS_8_15) if(!ACCESSING_BITS_8_15)
address++; address++;
m_bus_error = true; m_bus_error = true;
m68k_set_buserror_details(m_maincpu, address, write, m68k_get_fc(m_maincpu)); m_maincpu->set_buserror_details(address, write, m_maincpu->get_fc());
m_maincpu->mmu_tmp_buserror_address = address; // Hack for x68030 m_maincpu->mmu_tmp_buserror_address = address; // Hack for x68030
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);

3
src/mess/includes/apollo.h
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@ -232,6 +232,9 @@ public:
void apollo_pic_set_irq_line(int irq, int state); void apollo_pic_set_irq_line(int irq, int state);
void select_dma_channel(int channel, bool state); void select_dma_channel(int channel, bool state);
DECLARE_WRITE_LINE_MEMBER(apollo_reset_instr_callback);
DECLARE_READ32_MEMBER(apollo_instruction_hook);
private: private:
UINT32 ptm_counter; UINT32 ptm_counter;

2
src/mess/includes/mac.h
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@ -222,7 +222,7 @@ public:
{ {
} }
required_device<cpu_device> m_maincpu; required_device<m68000_base_device> m_maincpu;
required_device<via6522_device> m_via1; required_device<via6522_device> m_via1;
optional_device<via6522_device> m_via2; optional_device<via6522_device> m_via2;
optional_device<asc_device> m_asc; optional_device<asc_device> m_asc;

2
src/mess/machine/abc1600mac.c
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@ -321,7 +321,7 @@ void abc1600_mac_device::write_supervisor_memory(address_space &space, offs_t of
int abc1600_mac_device::get_fc() int abc1600_mac_device::get_fc()
{ {
UINT16 fc = m68k_get_fc(m_cpu); UINT16 fc = m_cpu->get_fc();
m_ifc2 = !(!(MAGIC || FC0) || FC2); m_ifc2 = !(!(MAGIC || FC0) || FC2);

6
src/mess/machine/mac.c
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@ -1650,8 +1650,7 @@ WRITE8_MEMBER(mac_state::mac_via2_out_b)
if (m_model == MODEL_MAC_II) if (m_model == MODEL_MAC_II)
{ {
m68000_base_device *m68k = downcast<m68000_base_device *>(m_maincpu.target()); m_maincpu->set_hmmu_enable((data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_II);
m68k_set_hmmu_enable(m68k, (data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_II);
} }
} }
@ -1825,8 +1824,7 @@ void mac_state::machine_reset()
// default to 32-bit mode on LC // default to 32-bit mode on LC
if (m_model == MODEL_MAC_LC) if (m_model == MODEL_MAC_LC)
{ {
m68000_base_device *m68k = downcast<m68000_base_device *>(m_maincpu.target()); m_maincpu->set_hmmu_enable(M68K_HMMU_DISABLE);
m68k_set_hmmu_enable(m68k, M68K_HMMU_DISABLE);
} }
m_last_taken_interrupt = -1; m_last_taken_interrupt = -1;