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https://github.com/holub/mame
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hd6305: update copyright holders now that a large part of this file is OG's, and make code style consistent
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Aaron Giles, Vas Crabb
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// copyright-holders:Aaron Giles, Vas Crabb, Olivier Galibert
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#include "emu.h"
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#include "hd6305.h"
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@ -314,7 +314,7 @@ void hd6305v0_device::sci_ssr_w(u8 data)
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u8 hd6305v0_device::sci_data_r()
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{
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logerror("sci data r\n");\
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logerror("sci data r\n");
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return 0x00;
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}
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@ -336,45 +336,36 @@ void hd6305v0_device::sci_data_w(u8 data)
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void hd6305v0_device::execute_set_input(int inputnum, int state)
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{
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// TODO: edge vs. level on int1
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if (inputnum == M6805V0_INT_IRQ1 || inputnum == M6805V0_INT_IRQ2)
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{
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if (m_irq_state[inputnum] != state)
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{
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if(inputnum == M6805V0_INT_IRQ1 || inputnum == M6805V0_INT_IRQ2) {
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if(m_irq_state[inputnum] != state) {
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m_irq_state[inputnum] = state;
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if (state != CLEAR_LINE)
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{
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if(state != CLEAR_LINE)
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m_pending_interrupts |= 1 << inputnum;
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}
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}
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}
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}
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void hd6305v0_device::interrupt_vector()
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{
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if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ1)) != 0)
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{
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if((m_pending_interrupts & (1 << M6805V0_INT_IRQ1)) != 0) {
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m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ1);
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rm16<false>(0x1ffa, m_pc);
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}
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else if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ2)) != 0)
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{
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else if((m_pending_interrupts & (1 << M6805V0_INT_IRQ2)) != 0) {
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m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ2);
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rm16<false>(0x1ff8, m_pc);
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}
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else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER1)) != 0)
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{
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else if((m_pending_interrupts & (1 << M6805V0_INT_TIMER1)) != 0) {
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// TODO: 1ff6 when in wait...
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m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER1);
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rm16<false>(0x1ff8, m_pc);
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}
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else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER2)) != 0)
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{
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else if((m_pending_interrupts & (1 << M6805V0_INT_TIMER2)) != 0) {
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m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER2);
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rm16<false>(0x1ff4, m_pc);
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}
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else if ((m_pending_interrupts & (1 << M6805V0_INT_SCI)) != 0)
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{
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else if((m_pending_interrupts & (1 << M6805V0_INT_SCI)) != 0) {
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m_pending_interrupts &= ~(1 << M6805V0_INT_SCI);
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rm16<false>(0x1ff4, m_pc);
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}
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@ -420,28 +411,20 @@ void hd63705z0_device::internal_map(address_map &map)
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void hd63705z0_device::execute_set_input(int inputnum, int state)
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{
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if (inputnum == INPUT_LINE_NMI)
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{
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if (m_nmi_state != state)
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{
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if(inputnum == INPUT_LINE_NMI) {
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if(m_nmi_state != state) {
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m_nmi_state = state;
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if (state != CLEAR_LINE)
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{
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if(state != CLEAR_LINE)
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m_pending_interrupts |= 1 << HD63705_INT_NMI;
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}
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}
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}
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else if (inputnum <= HD63705_INT_ADCONV)
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{
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if (m_irq_state[inputnum] != state)
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{
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else if(inputnum <= HD63705_INT_ADCONV) {
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if(m_irq_state[inputnum] != state) {
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m_irq_state[inputnum] = state;
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if (state != CLEAR_LINE)
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{
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if(state != CLEAR_LINE)
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m_pending_interrupts |= 1 << inputnum;
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}
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}
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}
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}
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@ -451,43 +434,35 @@ void hd63705z0_device::interrupt_vector()
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// Need to add emulation of other interrupt sources here KW-2/4/99
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// This is just a quick patch for Namco System 2 operation
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if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0)
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{
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if((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1);
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rm16<true>(0x1ff8, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2);
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rm16<true>(0x1fec, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV);
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rm16<true>(0x1fea, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1);
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rm16<true>(0x1ff6, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2);
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rm16<true>(0x1ff4, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0) {
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m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3);
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rm16<true>(0x1ff2, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_PCI);
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rm16<true>(0x1ff0, m_pc);
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}
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else if ((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0)
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{
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else if((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0) {
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m_pending_interrupts &= ~(1 << HD63705_INT_SCI);
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rm16<true>(0x1fee, m_pc);
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}
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@ -499,8 +474,7 @@ void hd63705z0_device::interrupt()
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// pending_interrupts until the interrupt is taken, no matter what the
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// external IRQ pin does.
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if (BIT(m_pending_interrupts, HD63705_INT_NMI))
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{
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if(BIT(m_pending_interrupts, HD63705_INT_NMI)) {
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pushword<true>(m_pc);
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pushbyte<true>(m_x);
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pushbyte<true>(m_a);
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@ -516,10 +490,8 @@ void hd63705z0_device::interrupt()
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m_icount -= 11;
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burn_cycles(11);
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}
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else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0)
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{
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if ((CC & IFLAG) == 0)
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{
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else if((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0) {
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if((CC & IFLAG) == 0) {
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// standard IRQ
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pushword<true>(m_pc);
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pushbyte<true>(m_x);
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Aaron Giles
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// copyright-holders:Aaron Giles, Vas Crabb, Olivier Galibert
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#ifndef MAME_CPU_M6805_HD6305_H
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#define MAME_CPU_M6805_HD6305_H
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@ -19,7 +19,6 @@ DECLARE_DEVICE_TYPE(HD6305Y2, hd6305y2_device)
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DECLARE_DEVICE_TYPE(HD63705Z0, hd63705z0_device)
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// ======================> hd6305_device
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class hd6305_device : public m6805_base_device
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@ -154,6 +153,7 @@ private:
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/****************************************************************************
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* 6805V0 section
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****************************************************************************/
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#define M6805V0_INT_IRQ1 0x00
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#define M6805V0_INT_IRQ2 0x01
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#define M6805V0_INT_TIMER1 0x02
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// license:BSD-3-Clause
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// copyright-holders:Aaron Giles
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// copyright-holders:Aaron Giles, Vas Crabb
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/*** m6805: Portable 6805 emulator ******************************************/
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#ifndef MAME_CPU_M6805_M6805_H
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#define MAME_CPU_M6805_M6805_H
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