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https://github.com/holub/mame
synced 2025-05-23 06:08:48 +03:00
Updated Archimedes to the latest source, not worth mentioning
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@ -58,7 +58,7 @@ static ADDRESS_MAP_START( hotstuff_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x400000, 0x40ffff) AM_RAM
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AM_RANGE(0x980000, 0x9bffff) AM_RAM AM_BASE(&hotstuff_bitmapram)
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AM_RANGE(0x980000, 0x9bffff) AM_RAM AM_BASE(&hotstuff_bitmapram)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( hotstuff )
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@ -64,7 +64,7 @@ void archimedes_request_irq_b(running_machine *machine, int mask)
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if (ioc_regs[10] & mask)
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{
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cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, PULSE_LINE);
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generic_pulse_irq_line(machine->device("maincpu"), ARM_IRQ_LINE);
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}
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}
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@ -74,7 +74,7 @@ void archimedes_request_fiq(running_machine *machine, int mask)
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if (ioc_regs[14] & mask)
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{
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cputag_set_input_line(machine, "maincpu", ARM_FIRQ_LINE, PULSE_LINE);
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generic_pulse_irq_line(machine->device("maincpu"), ARM_FIRQ_LINE);
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}
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}
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@ -153,6 +153,9 @@ void archimedes_reset(running_machine *machine)
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{
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memc_pages[i] = -1; // indicate unmapped
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}
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ioc_regs[4] = 0x10; //set up POR (Power On Reset) at start-up
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ioc_regs[8] = 0x02; //set up IL[1] On
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}
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void archimedes_init(running_machine *machine)
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@ -319,7 +322,7 @@ READ32_HANDLER(archimedes_ioc_r)
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#ifdef MESS
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running_device *fdc = (running_device *)space->machine->device("wd1772");
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#endif
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if (offset >= 0x80000 && offset < 0xc0000)
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if (offset*4 >= 0x200000 && offset*4 < 0x300000)
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{
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switch (offset & 0x1f)
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{
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@ -345,11 +348,11 @@ READ32_HANDLER(archimedes_ioc_r)
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return (ioc_timerout[3]>>8)&0xff;
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}
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logerror("IOC: R %s = %02x (PC=%x)\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], cpu_get_pc( space->cpu ));
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logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], cpu_get_pc( space->cpu ),offset & 0x1f);
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return ioc_regs[offset&0x1f];
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}
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#ifdef MESS
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else if (offset >= 0xc4000 && offset <= 0xc4010)
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else if (offset*4 >= 0x310000 && offset*4 < 0x310040)
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{
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logerror("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
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return wd17xx_data_r(fdc, offset&0xf);
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@ -370,14 +373,14 @@ WRITE32_HANDLER(archimedes_ioc_w)
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running_device *fdc = (running_device *)space->machine->device("wd1772");
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#endif
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if (offset >= 0x80000 && offset < 0xc0000)
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if (offset*4 >= 0x200000 && offset*4 < 0x300000)
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{
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// logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], cpu_get_pc( space->cpu ));
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// logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], cpu_get_pc( space->cpu ));
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switch (offset&0x1f)
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{
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case 0: // I2C bus control
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logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
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//logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
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break;
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case 5: // IRQ clear A
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@ -452,12 +455,12 @@ WRITE32_HANDLER(archimedes_ioc_w)
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}
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}
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#ifdef MESS
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else if (offset >= 0xc4000 && offset <= 0xc4010)
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else if (offset*4 >= 0x310000 && offset*4 < 0x310040)
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{
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logerror("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
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wd17xx_data_w(fdc, offset&0xf, data&0xff);
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}
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else if (offset == 0xd4006)
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else if (offset*4 == 0x350018)
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{
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// latch A
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if (data & 1)
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@ -480,7 +483,7 @@ WRITE32_HANDLER(archimedes_ioc_w)
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wd17xx_set_side(fdc,(data & 0x10)>>4);
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}
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else if (offset == 0xd4010)
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else if (offset*4 == 0x350040)
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{
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// latch B
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wd17xx_dden_w(fdc, BIT(data, 1));
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@ -523,7 +526,22 @@ WRITE32_HANDLER(archimedes_vidc_w)
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};
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#endif
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if (reg >= 0x80 && reg <= 0xbc)
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// 0x00 - 0x3c Video Palette Logical Colors (16 colors)
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// 0x40 Border Color
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// 0x44 - 0x4c Cursor Palette Logical Colors
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if (reg >= 0x00 && reg <= 0x4c)
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{
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int r,g,b;
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//TODO: 8bpp mode uses a different formula
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//i = (val & 0x1000) >> 12; //supremacy bit
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b = (val & 0x0f00) >> 8;
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g = (val & 0x00f0) >> 4;
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r = (val & 0x000f) >> 0;
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palette_set_color_rgb(space->machine, reg >> 2, pal4bit(r), pal4bit(g), pal4bit(b) );
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}
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else if (reg >= 0x80 && reg <= 0xbc)
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{
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#ifdef DEBUG
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logerror("VIDC: %s = %d\n", vrnames[(reg-0x80)/4], val>>12);
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