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very small macro removal bunch (nw)

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This commit is contained in:
Ivan Vangelista 2020-05-24 10:02:40 +02:00
parent 6195222a4a
commit a976bddc0c
20 changed files with 82 additions and 82 deletions
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8
src/devices/video/decsfb.cpp
View File

@ -89,12 +89,12 @@ void decsfb_device::device_reset()
0x100074 Interrupt Enable
*/
READ32_MEMBER(decsfb_device::read)
u32 decsfb_device::read(offs_t offset)
{
return m_regs[offset];
}
WRITE32_MEMBER(decsfb_device::write)
void decsfb_device::write(offs_t offset, u32 data, u32 mem_mask)
{
COMBINE_DATA(&m_regs[offset]);
@ -104,12 +104,12 @@ WRITE32_MEMBER(decsfb_device::write)
}
}
READ32_MEMBER(decsfb_device::vram_r)
u32 decsfb_device::vram_r(offs_t offset)
{
return m_vram[offset];
}
WRITE32_MEMBER(decsfb_device::vram_w)
void decsfb_device::vram_w(offs_t offset, u32 data, u32 mem_mask)
{
switch (m_regs[0x30/4])
{

8
src/devices/video/decsfb.h
View File

@ -13,10 +13,10 @@ public:
auto int_cb() { return m_int_cb.bind(); }
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( vram_r );
DECLARE_WRITE32_MEMBER( vram_w );
u32 read(offs_t offset);
void write(offs_t offset, u32 data, u32 mem_mask = ~0);
uint32_t vram_r(offs_t offset);
void vram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
u32 *get_vram() { return m_vram; }

16
src/devices/video/gba_lcd.cpp
View File

@ -1556,7 +1556,7 @@ static char const *const reg_names[] = {
"Unused", "Unused", "Unused", "Unused",
};
READ32_MEMBER(gba_lcd_device::video_r)
uint32_t gba_lcd_device::video_r(offs_t offset, uint32_t mem_mask)
{
uint32_t retval = 0;
@ -1589,7 +1589,7 @@ READ32_MEMBER(gba_lcd_device::video_r)
return retval;
}
WRITE32_MEMBER(gba_lcd_device::video_w)
void gba_lcd_device::video_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_regs[offset]);
@ -1619,32 +1619,32 @@ WRITE32_MEMBER(gba_lcd_device::video_w)
}
}
READ32_MEMBER(gba_lcd_device::gba_pram_r)
uint32_t gba_lcd_device::gba_pram_r(offs_t offset)
{
return m_pram[offset];
}
WRITE32_MEMBER(gba_lcd_device::gba_pram_w)
void gba_lcd_device::gba_pram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_pram[offset]);
}
READ32_MEMBER(gba_lcd_device::gba_vram_r)
uint32_t gba_lcd_device::gba_vram_r(offs_t offset)
{
return m_vram[offset];
}
WRITE32_MEMBER(gba_lcd_device::gba_vram_w)
void gba_lcd_device::gba_vram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_vram[offset]);
}
READ32_MEMBER(gba_lcd_device::gba_oam_r)
uint32_t gba_lcd_device::gba_oam_r(offs_t offset)
{
return m_oam[offset];
}
WRITE32_MEMBER(gba_lcd_device::gba_oam_w)
void gba_lcd_device::gba_oam_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_oam[offset]);
}

16
src/devices/video/gba_lcd.h
View File

@ -65,14 +65,14 @@ class gba_lcd_device
public:
gba_lcd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER(video_r);
DECLARE_WRITE32_MEMBER(video_w);
DECLARE_READ32_MEMBER(gba_pram_r);
DECLARE_WRITE32_MEMBER(gba_pram_w);
DECLARE_READ32_MEMBER(gba_vram_r);
DECLARE_WRITE32_MEMBER(gba_vram_w);
DECLARE_READ32_MEMBER(gba_oam_r);
DECLARE_WRITE32_MEMBER(gba_oam_w);
uint32_t video_r(offs_t offset, uint32_t mem_mask = ~0);
void video_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t gba_pram_r(offs_t offset);
void gba_pram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t gba_vram_r(offs_t offset);
void gba_vram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t gba_oam_r(offs_t offset);
void gba_oam_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
TIMER_CALLBACK_MEMBER(perform_hbl);
TIMER_CALLBACK_MEMBER(perform_scan);

4
src/devices/video/gf4500.cpp
View File

@ -103,7 +103,7 @@ uint32_t gf4500_device::screen_update(screen_device &device, bitmap_rgb32 &bitma
return 0;
}
READ32_MEMBER( gf4500_device::read )
uint32_t gf4500_device::read(offs_t offset)
{
uint32_t data = m_data[offset];
switch (offset)
@ -119,7 +119,7 @@ READ32_MEMBER( gf4500_device::read )
return data;
}
WRITE32_MEMBER( gf4500_device::write )
void gf4500_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_data[offset]);
if ((offset < (GF4500_FRAMEBUF_OFFSET / 4)) || (offset >= ((GF4500_FRAMEBUF_OFFSET + (321 * 240 * 2)) / 4)))

4
src/devices/video/gf4500.h
View File

@ -20,8 +20,8 @@ public:
gf4500_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
uint32_t read(offs_t offset);
void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);

4
src/devices/video/huc6272.cpp
View File

@ -190,7 +190,7 @@ void huc6272_device::write_microprg_data(offs_t address, uint16_t data)
// READ/WRITE HANDLERS
//**************************************************************************
READ32_MEMBER( huc6272_device::read )
uint32_t huc6272_device::read(offs_t offset)
{
uint32_t res = 0;
@ -264,7 +264,7 @@ READ32_MEMBER( huc6272_device::read )
return res;
}
WRITE32_MEMBER( huc6272_device::write )
void huc6272_device::write(offs_t offset, uint32_t data)
{
if((offset & 1) == 0)
m_register = data & 0x7f;

4
src/devices/video/huc6272.h
View File

@ -36,8 +36,8 @@ public:
template <typename T> void set_rainbow_tag(T &&tag) { m_huc6271.set_tag(std::forward<T>(tag)); }
// I/O operations
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
void write(offs_t offset, uint32_t data);
uint32_t read(offs_t offset);
// ADPCM operations
uint8_t adpcm_update_0();

4
src/devices/video/ps2gif.cpp
View File

@ -94,7 +94,7 @@ void ps2_gif_device::gif_reset()
m_vu_mem_address = 0;
}
READ32_MEMBER(ps2_gif_device::read)
uint32_t ps2_gif_device::read(offs_t offset)
{
uint32_t ret = 0;
switch (offset)
@ -163,7 +163,7 @@ READ32_MEMBER(ps2_gif_device::read)
return ret;
}
WRITE32_MEMBER(ps2_gif_device::write)
void ps2_gif_device::write(offs_t offset, uint32_t data)
{
switch (offset)
{

4
src/devices/video/ps2gif.h
View File

@ -33,8 +33,8 @@ public:
ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_gif_device() override;
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
uint32_t read(offs_t offset);
void write(offs_t offset, uint32_t data);
void kick_path1(uint32_t address);
void write_path1(uint64_t hi, uint64_t lo);

16
src/devices/video/ps2gs.cpp
View File

@ -255,7 +255,7 @@ void ps2_gs_device::device_reset()
m_kick_count = 0;
}
READ64_MEMBER(ps2_gs_device::priv_regs0_r)
uint64_t ps2_gs_device::priv_regs0_r(offs_t offset)
{
uint64_t ret = m_base_regs[offset >> 1];
switch (offset)
@ -300,7 +300,7 @@ READ64_MEMBER(ps2_gs_device::priv_regs0_r)
return ret;
}
WRITE64_MEMBER(ps2_gs_device::priv_regs0_w)
void ps2_gs_device::priv_regs0_w(offs_t offset, uint64_t data)
{
switch (offset)
{
@ -373,7 +373,7 @@ WRITE64_MEMBER(ps2_gs_device::priv_regs0_w)
m_base_regs[offset >> 1] = data;
}
READ64_MEMBER(ps2_gs_device::priv_regs1_r)
uint64_t ps2_gs_device::priv_regs1_r(offs_t offset)
{
uint64_t ret = 0;
switch (offset)
@ -401,7 +401,7 @@ READ64_MEMBER(ps2_gs_device::priv_regs1_r)
return ret;
}
WRITE64_MEMBER(ps2_gs_device::priv_regs1_w)
void ps2_gs_device::priv_regs1_w(offs_t offset, uint64_t data)
{
switch (offset)
{
@ -748,12 +748,12 @@ ps2_gif_device* ps2_gs_device::interface()
return m_gif.target();
}
READ32_MEMBER(ps2_gs_device::gif_r)
uint32_t ps2_gs_device::gif_r(offs_t offset)
{
return m_gif->read(space, offset, mem_mask);
return m_gif->read(offset);
}
WRITE32_MEMBER(ps2_gs_device::gif_w)
void ps2_gs_device::gif_w(offs_t offset, uint32_t data)
{
m_gif->write(space, offset, data, mem_mask);
m_gif->write(offset, data);
}

12
src/devices/video/ps2gs.h
View File

@ -35,15 +35,15 @@ public:
ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_gs_device() override;
DECLARE_READ64_MEMBER(priv_regs0_r);
DECLARE_WRITE64_MEMBER(priv_regs0_w);
DECLARE_READ64_MEMBER(priv_regs1_r);
DECLARE_WRITE64_MEMBER(priv_regs1_w);
uint64_t priv_regs0_r(offs_t offset);
void priv_regs0_w(offs_t offset, uint64_t data);
uint64_t priv_regs1_r(offs_t offset);
void priv_regs1_w(offs_t offset, uint64_t data);
void regs_w(offs_t offset, uint64_t data);
DECLARE_READ32_MEMBER(gif_r);
DECLARE_WRITE32_MEMBER(gif_w);
uint32_t gif_r(offs_t offset);
void gif_w(offs_t offset, uint32_t data);
ps2_gif_device* interface();

12
src/devices/video/voodoo_pci.cpp
View File

@ -178,7 +178,7 @@ void voodoo_banshee_pci_device::map_extra(uint64_t memory_window_start, uint64_t
// Should really be dependent on voodoo VGAINIT0 bit 8 and IO base + 0xc3 bit 0
uint64_t start = io_offset + 0x3b0;
uint64_t end = io_offset + 0x3df;
io_space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(voodoo_pci_device::vga_r)), write32_delegate(*this, FUNC(voodoo_pci_device::vga_w)));
io_space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(voodoo_pci_device::vga_r)), write32s_delegate(*this, FUNC(voodoo_pci_device::vga_w)));
logerror("%s: map %s at %0*x-%0*x\n", this->tag(), "vga_r/w", 4, uint32_t(start), 4, uint32_t(end));
}
@ -191,7 +191,7 @@ void voodoo_3_pci_device::map_extra(uint64_t memory_window_start, uint64_t memor
// Should really be dependent on voodoo VGAINIT0 bit 8 and IO base + 0xc3 bit 0
uint64_t start = io_offset + 0x3b0;
uint64_t end = io_offset + 0x3df;
io_space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(voodoo_pci_device::vga_r)), write32_delegate(*this, FUNC(voodoo_pci_device::vga_w)));
io_space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(voodoo_pci_device::vga_r)), write32s_delegate(*this, FUNC(voodoo_pci_device::vga_w)));
logerror("%s: map %s at %0*x-%0*x\n", this->tag(), "vga_r/w", 4, uint32_t(start), 4, uint32_t(end));
}
@ -201,7 +201,7 @@ uint32_t voodoo_pci_device::screen_update(screen_device &screen, bitmap_rgb32 &b
}
// PCI bus control
READ32_MEMBER (voodoo_pci_device::pcictrl_r)
uint32_t voodoo_pci_device::pcictrl_r(offs_t offset, uint32_t mem_mask)
{
uint32_t result = m_pcictrl_reg[offset];
// The address map starts at 0x40
@ -227,7 +227,7 @@ READ32_MEMBER (voodoo_pci_device::pcictrl_r)
logerror("%s:voodoo_pci_device pcictrl_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4 + 0x40, result, mem_mask);
return result;
}
WRITE32_MEMBER (voodoo_pci_device::pcictrl_w)
void voodoo_pci_device::pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_pcictrl_reg[offset]);
// The address map starts at 0x40
@ -244,7 +244,7 @@ WRITE32_MEMBER (voodoo_pci_device::pcictrl_w)
}
// VGA legacy accesses
READ32_MEMBER(voodoo_pci_device::vga_r)
uint32_t voodoo_pci_device::vga_r(offs_t offset, uint32_t mem_mask)
{
uint32_t result = 0;
if (ACCESSING_BITS_0_7)
@ -259,7 +259,7 @@ READ32_MEMBER(voodoo_pci_device::vga_r)
logerror("%s voodoo_pci_device vga_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask);
return result;
}
WRITE32_MEMBER(voodoo_pci_device::vga_w)
void voodoo_pci_device::vga_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (ACCESSING_BITS_0_7)
downcast<voodoo_banshee_device *>(m_voodoo.target())->banshee_vga_w(offset * 4 + 0 + 0xb0, data >> 0);

8
src/devices/video/voodoo_pci.h
View File

@ -19,8 +19,8 @@ public:
void set_tmumem(int tmumem0, int tmumem1) { m_tmumem0 = tmumem0; m_tmumem1 = tmumem1; }
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_READ32_MEMBER(vga_r);
DECLARE_WRITE32_MEMBER(vga_w);
uint32_t vga_r(offs_t offset, uint32_t mem_mask = ~0);
void vga_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void voodoo_reg_map(address_map &map);
void banshee_reg_map(address_map &map);
@ -47,8 +47,8 @@ protected:
uint32_t m_pcictrl_reg[0x20];
DECLARE_READ32_MEMBER(pcictrl_r);
DECLARE_WRITE32_MEMBER(pcictrl_w);
uint32_t pcictrl_r(offs_t offset, uint32_t mem_mask = ~0);
void pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
};
class voodoo_1_pci_device : public voodoo_pci_device

4
src/mame/drivers/xorworld.cpp
View File

@ -51,12 +51,12 @@ EEPROM chip: 93C46
EEPROM read/write/control
****************************************************************/
WRITE16_MEMBER(xorworld_state::irq2_ack_w)
void xorworld_state::irq2_ack_w(uint16_t data)
{
m_maincpu->set_input_line(2, CLEAR_LINE);
}
WRITE16_MEMBER(xorworld_state::irq6_ack_w)
void xorworld_state::irq6_ack_w(uint16_t data)
{
m_maincpu->set_input_line(6, CLEAR_LINE);
}

28
src/mame/drivers/xtom3d.cpp
View File

@ -71,15 +71,15 @@ private:
uint8_t m_mtxc_config_reg[256];
uint8_t m_piix4_config_reg[4][256];
DECLARE_WRITE32_MEMBER( isa_ram1_w );
DECLARE_WRITE32_MEMBER( isa_ram2_w );
void isa_ram1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void isa_ram2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_WRITE32_MEMBER( bios_ext1_ram_w );
DECLARE_WRITE32_MEMBER( bios_ext2_ram_w );
DECLARE_WRITE32_MEMBER( bios_ext3_ram_w );
DECLARE_WRITE32_MEMBER( bios_ext4_ram_w );
void bios_ext1_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void bios_ext2_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void bios_ext3_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void bios_ext4_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_WRITE32_MEMBER( bios_ram_w );
void bios_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
virtual void machine_start() override;
virtual void machine_reset() override;
void intel82439tx_init();
@ -298,7 +298,7 @@ void xtom3d_state::intel82371ab_pci_w(int function, int reg, uint32_t data, uint
}
WRITE32_MEMBER(xtom3d_state::isa_ram1_w)
void xtom3d_state::isa_ram1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5a] & 0x2) // write to RAM if this region is write-enabled
{
@ -306,7 +306,7 @@ WRITE32_MEMBER(xtom3d_state::isa_ram1_w)
}
}
WRITE32_MEMBER(xtom3d_state::isa_ram2_w)
void xtom3d_state::isa_ram2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5a] & 0x2) // write to RAM if this region is write-enabled
{
@ -314,7 +314,7 @@ WRITE32_MEMBER(xtom3d_state::isa_ram2_w)
}
}
WRITE32_MEMBER(xtom3d_state::bios_ext1_ram_w)
void xtom3d_state::bios_ext1_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5e] & 0x2) // write to RAM if this region is write-enabled
{
@ -323,7 +323,7 @@ WRITE32_MEMBER(xtom3d_state::bios_ext1_ram_w)
}
WRITE32_MEMBER(xtom3d_state::bios_ext2_ram_w)
void xtom3d_state::bios_ext2_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5e] & 0x20) // write to RAM if this region is write-enabled
{
@ -332,7 +332,7 @@ WRITE32_MEMBER(xtom3d_state::bios_ext2_ram_w)
}
WRITE32_MEMBER(xtom3d_state::bios_ext3_ram_w)
void xtom3d_state::bios_ext3_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5f] & 0x2) // write to RAM if this region is write-enabled
{
@ -341,7 +341,7 @@ WRITE32_MEMBER(xtom3d_state::bios_ext3_ram_w)
}
WRITE32_MEMBER(xtom3d_state::bios_ext4_ram_w)
void xtom3d_state::bios_ext4_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x5f] & 0x20) // write to RAM if this region is write-enabled
{
@ -350,7 +350,7 @@ WRITE32_MEMBER(xtom3d_state::bios_ext4_ram_w)
}
WRITE32_MEMBER(xtom3d_state::bios_ram_w)
void xtom3d_state::bios_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_mtxc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled
{

2
src/mame/drivers/xybots.cpp
View File

@ -49,7 +49,7 @@ void xybots_state::video_int_ack_w(uint16_t data)
*
*************************************/
READ16_MEMBER(xybots_state::special_port1_r)
uint16_t xybots_state::special_port1_r()
{
int result = ioport("FFE200")->read();
result ^= m_h256 ^= 0x0400;

6
src/mame/includes/xorworld.h
View File

@ -37,9 +37,9 @@ private:
tilemap_t *m_bg_tilemap;
DECLARE_WRITE16_MEMBER(irq2_ack_w);
DECLARE_WRITE16_MEMBER(irq6_ack_w);
DECLARE_WRITE16_MEMBER(videoram_w);
void irq2_ack_w(uint16_t data);
void irq6_ack_w(uint16_t data);
void videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TILE_GET_INFO_MEMBER(get_bg_tile_info);

2
src/mame/includes/xybots.h
View File

@ -37,7 +37,7 @@ public:
private:
void video_int_ack_w(uint16_t data = 0);
DECLARE_READ16_MEMBER(special_port1_r);
uint16_t special_port1_r();
TILE_GET_INFO_MEMBER(get_alpha_tile_info);
TILE_GET_INFO_MEMBER(get_playfield_tile_info);
uint32_t screen_update_xybots(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

2
src/mame/video/xorworld.cpp
View File

@ -50,7 +50,7 @@ void xorworld_state::xorworld_palette(palette_device &palette) const
}
}
WRITE16_MEMBER(xorworld_state::videoram_w)
void xorworld_state::videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_videoram[offset]);
m_bg_tilemap->mark_tile_dirty(offset);