From a977684012daa8b3d7f99af3189830ee0b7d2f85 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 15 Apr 2020 20:36:10 -0400 Subject: [PATCH] rx01_cpu: Add the rest of the branch conditions (nw) --- src/devices/cpu/rx01/rx01.cpp | 29 ++++++++++++++++++++++++++++- src/devices/cpu/rx01/rx01.h | 4 +++- 2 files changed, 31 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/rx01/rx01.cpp b/src/devices/cpu/rx01/rx01.cpp index fcf03c67a17..18053c7069a 100644 --- a/src/devices/cpu/rx01/rx01.cpp +++ b/src/devices/cpu/rx01/rx01.cpp @@ -55,6 +55,7 @@ rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag, , m_flags(0) , m_unit(false) , m_load_head(false) + , m_syn_index(false) , m_icount(0) { std::fill(std::begin(m_sp), std::end(m_sp), 0); @@ -95,6 +96,7 @@ void rx01_cpu_device::device_start() state_add(RX01_CRC, "CRC", m_crc).formatstr("%06O"); state_add(RX01_UNIT, "UNIT", m_unit); state_add(RX01_LDHD, "LDHD", m_load_head); + state_add(RX01_INDEX, "INDEX", m_syn_index); // Save state registration save_item(NAME(m_pc)); @@ -111,6 +113,7 @@ void rx01_cpu_device::device_start() save_item(NAME(m_flags)); save_item(NAME(m_unit)); save_item(NAME(m_load_head)); + save_item(NAME(m_syn_index)); } void rx01_cpu_device::device_reset() @@ -149,6 +152,12 @@ bool rx01_cpu_device::sep_data() return false; } +bool rx01_cpu_device::sep_clk() +{ + // TODO + return false; +} + bool rx01_cpu_device::missing_clk() { // TODO @@ -185,6 +194,10 @@ bool rx01_cpu_device::test_condition() // Serial data from interface return data_in(); + case 014: + // Drive index latch + return m_syn_index; + case 020: // MSB of shift register return BIT(m_sr, 7); @@ -201,6 +214,18 @@ bool rx01_cpu_device::test_condition() // Track zero of selected drive on head return (m_flags & FF_IOB0) && (m_flags & FF_IOB3) && drv_sel_trk0(); + case 040: + // Drive write protect (TODO) + return false; + + case 044: + // Separated clock + return sep_clk(); + + case 050: + // 12-bit interface mode selected (TODO) + return false; + case 054: // Separated data equals shift register MSB return BIT(m_sr, 7) == sep_data(); @@ -225,7 +250,8 @@ bool rx01_cpu_device::test_condition() return (m_flags & FF_FLAG) != 0; default: - LOG("%04o: Unhandled branch condition %d\n", m_ppc, (m_mb & 074) >> 2); + // Shouldn't happen + logerror("%04o: Unhandled branch condition %d\n", m_ppc, (m_mb & 074) >> 2); return true; } } @@ -357,6 +383,7 @@ void rx01_cpu_device::execute_run() case 040: m_load_head = BIT(m_mb, 1); + m_syn_index = false; break; case 044: diff --git a/src/devices/cpu/rx01/rx01.h b/src/devices/cpu/rx01/rx01.h index 5c46eefdc79..1b138472b04 100644 --- a/src/devices/cpu/rx01/rx01.h +++ b/src/devices/cpu/rx01/rx01.h @@ -16,7 +16,7 @@ public: RX01_R8, RX01_R9, RX01_R10, RX01_R11, RX01_R12, RX01_R13, RX01_R14, RX01_R15, RX01_BAR, RX01_CRC, - RX01_UNIT, RX01_LDHD + RX01_UNIT, RX01_LDHD, RX01_INDEX }; enum : u16 { @@ -58,6 +58,7 @@ private: u8 mux_out(); bool data_in(); bool sep_data(); + bool sep_clk(); bool missing_clk(); bool drv_sel_trk0(); bool sec_buf_in(); @@ -88,6 +89,7 @@ private: u16 m_flags; bool m_unit; bool m_load_head; + bool m_syn_index; s32 m_icount; };