diff --git a/src/devices/cpu/8x300/8x300.cpp b/src/devices/cpu/8x300/8x300.cpp index 9800d6bf57e..827c064783a 100644 --- a/src/devices/cpu/8x300/8x300.cpp +++ b/src/devices/cpu/8x300/8x300.cpp @@ -28,10 +28,10 @@ #define DST_IS_RIGHT_BANK (opcode & 0x0008) #define SRC_LSB ((opcode & 0x0700) >> 8) #define DST_LSB (opcode & 0x0007) -#define SET_PC(x) do { m_PC = (x); m_AR = m_PC; m_genPC = m_PC << 1; } while (0) +#define SET_PC(x) do { m_PC = (x); m_AR = m_PC; } while (0) // for XEC intruction, which sets the AR, but not PC, so that after the instruction at the relative address is done, execution // returns back to next instruction after XEC, unless a JMP or successful NZT is there. -#define SET_AR(x) do { m_AR = (x); m_genPC = m_AR << 1; m_PC--;} while (0) +#define SET_AR(x) do { m_AR = (x); m_increment_pc = false; } while (0) #define SRC_LATCH do { if(SRC_IS_RIGHT_BANK) m_right_IV = READPORT(m_IVR+0x100); else m_left_IV = READPORT(m_IVL); } while (0) #define DST_LATCH do { if(DST_IS_RIGHT_BANK) m_right_IV = READPORT(m_IVR+0x100); else m_left_IV = READPORT(m_IVL); } while (0) #define SET_OVF do { if(result & 0xff00) m_OVF = 1; else m_OVF = 0; } while (0) @@ -106,6 +106,8 @@ void n8x300_cpu_device::device_start() save_item(NAME(m_OVF)); save_item(NAME(m_left_IV)); save_item(NAME(m_right_IV)); + save_item(NAME(m_genPC)); + save_item(NAME(m_increment_pc)); // reset registers here, since they are unchanged when /RESET goes low. m_R1 = 0; @@ -119,15 +121,12 @@ void n8x300_cpu_device::device_start() m_IVR = 0; m_AUX = 0; - m_PC = 0; - m_AR = 0; m_IR = 0; m_OVF = 0; - m_genPC = 0; // Register state for debugger - state_add( _8X300_PC, "PC", m_PC).mask(0x1fff).formatstr("%04X"); - state_add( _8X300_AR, "AR", m_AR).mask(0x1fff).formatstr("%04X"); + state_add( _8X300_PC, "PC", m_PC).mask(0x1fff).callimport().formatstr("%04X"); + state_add( _8X300_AR, "AR", m_AR).mask(0x1fff).callimport().formatstr("%04X"); state_add( _8X300_IR, "IR", m_IR).mask(0xffff).formatstr("%04X"); state_add( _8X300_AUX, "AUX", m_AUX).mask(0xff).formatstr("%02X"); state_add( _8X300_R1, "R1", m_R1).mask(0xff).formatstr("%02X"); @@ -140,18 +139,48 @@ void n8x300_cpu_device::device_start() state_add( _8X300_OVF, "OVF", m_OVF).mask(0x01).formatstr("%01X"); state_add( _8X300_IVL, "IVL", m_IVL).mask(0xff).formatstr("%02X"); state_add( _8X300_IVR, "IVR", m_IVR).mask(0xff).formatstr("%02X"); - state_add(STATE_GENPC, "GENPC", m_genPC).noshow(); - state_add(STATE_GENPCBASE, "CURPC", m_genPC).noshow(); + state_add(STATE_GENPC, "GENPC", m_genPC).mask(0x3ffe).callimport().noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_genPC).mask(0x3ffe).callimport().noshow(); m_icountptr = &m_icount; } +//------------------------------------------------- +// state_import - import state into the device, +// after it has been set +//------------------------------------------------- + +void n8x300_cpu_device::state_import(const device_state_entry &entry) +{ + switch (entry.index()) + { + case _8X300_PC: + m_AR = m_PC; + m_genPC = m_AR << 1; + m_increment_pc = true; + break; + + case _8X300_AR: + m_genPC = m_AR << 1; + m_increment_pc = false; + break; + + case STATE_GENPC: + case STATE_GENPCBASE: + m_AR = m_genPC >> 1; + m_PC = m_AR; + m_increment_pc = true; + break; + } +} + void n8x300_cpu_device::device_reset() { /* zero registers */ m_PC = 0; m_AR = 0; - m_IR = 0; + m_genPC = 0; + m_increment_pc = true; } void n8x300_cpu_device::execute_run() @@ -166,13 +195,22 @@ void n8x300_cpu_device::execute_run() uint16_t result; /* fetch the opcode */ + m_genPC = m_AR << 1; debugger_instruction_hook(this, m_genPC); opcode = FETCHOP(m_genPC); - m_PC++; - m_PC &= 0x1fff; + + if (m_increment_pc) + { + m_PC++; + m_PC &= 0x1fff; + } + else + { + m_increment_pc = true; + } + m_AR = m_PC; m_IR = opcode; - m_genPC = m_PC << 1; switch (OP) { diff --git a/src/devices/cpu/8x300/8x300.h b/src/devices/cpu/8x300/8x300.h index ef34c7b00b8..286701142f9 100644 --- a/src/devices/cpu/8x300/8x300.h +++ b/src/devices/cpu/8x300/8x300.h @@ -50,6 +50,9 @@ protected: virtual void device_start() override; virtual void device_reset() override; + // device_state_interface overrides + virtual void state_import(const device_state_entry &entry) override; + // device_execute_interface overrides virtual uint32_t execute_min_cycles() const override { return 1; } virtual uint32_t execute_max_cycles() const override { return 1; } @@ -76,6 +79,7 @@ protected: address_space_config m_io_config; int m_icount; + bool m_increment_pc; address_space *m_program; direct_read_data *m_direct;