mirror of
https://github.com/holub/mame
synced 2025-05-23 06:08:48 +03:00
Cleaned up Namco 5xxx docs, listing both MB88xx pin IDs and
Namco custom IDs where appropriate. Added clocks to the Namco 06xx in anticipation of improved device interconnection. Added new file devtempl.h which can be used to generate the DEVICE_GET_INFO function. Updated all the Namco I/O devices to use this. Updated galaga driver to use computed video timing.
This commit is contained in:
Aaron Giles
parent
c800e27eae
commit
a9d29f2d78
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -518,6 +518,7 @@ src/emu/devcb.h svneol=native#text/plain
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src/emu/devconv.h svneol=native#text/plain
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src/emu/devintrf.c svneol=native#text/plain
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src/emu/devintrf.h svneol=native#text/plain
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src/emu/devtempl.h svneol=native#text/plain
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src/emu/drawgfx.c svneol=native#text/plain
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src/emu/drawgfx.h svneol=native#text/plain
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src/emu/drawgfxm.h svneol=native#text/plain
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275
src/emu/devtempl.h
Normal file
275
src/emu/devtempl.h
Normal file
@ -0,0 +1,275 @@
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/***************************************************************************
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devtempl.h
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Template include for defining devices.
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Copyright Nicola Salmoria and the MAME Team.
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Visit http://mamedev.org for licensing and usage restrictions.
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****************************************************************************
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Typical usage is as follows:
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static const char *DEVTEMPLATE_SOURCE = __FILE__;
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// for a primary device....
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#define DEVTEMPLATE_ID(p,s) p##devicenameprefix##s
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#define DEVTEMPLATE_FEATURES DT_HAS_xxx | DT_HAS_yyy | ...
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#define DEVTEMPLATE_NAME "Device Name String"
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#define DEVTEMPLATE_FAMILY "Device Family String"
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#define DEVTEMPLATE_CLASS DEVICE_CLASS_xxxx
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#include "devtempl.h"
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// for a derived device....
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#define DEVTEMPLATE_DERIVED_ID(p,s) p##derivednameprefix##s
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#define DEVTEMPLATE_DERIVED_FEATURES DT_HAS_xxx | DT_HAS_yyy | ...
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#define DEVTEMPLATE_NAME "Derived Name String"
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#include "devtempl.h"
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****************************************************************************
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Parameters are as follows:
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DEVTEMPLATE_ID(p,s) - required - macro to produce device function and
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type names with a prefix of 'p' and a suffix of 's'
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DEVTEMPLATE_FEATURES - required - bitmask consisting of one of the
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DT_HAS_* flags, indicating which standard-named callbacks or
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pointers are specified by this device (everything else is assumed
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to be NULL, which is the default)
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DEVTEMPLATE_NAME - required - a string describing the device
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DEVTEMPLATE_FAMILY - required - a string describing the device family
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name
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DEVTEMPLATE_STATE - optional - the name of the device's state
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structure; by default, this is assumed to be
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DEVTEMPLATE_ID(,_state)
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DEVTEMPLATE_CLASS - optional - the device's class (default is
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DEVICE_CLASS_PERIPHERAL)
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DEVTEMPLATE_VERSION - optional - the device's version string (default
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is "1.0")
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DEVTEMPLATE_CREDITS - optional - the device's credit string (default
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is "Copyright Nicola Salmoria and the MAME Team")
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DEVTEMPLATE_INLINE_CONFIG - optional - the name of the device's
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inline configuration structure; by default, it is assumed the
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device does not have any inline configuration
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***************************************************************************/
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/* flag bits for DEVTEMPLATE_FEATURES */
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#define DT_HAS_RESET 0x0001
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#define DT_HAS_STOP 0x0002
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#define DT_HAS_EXECUTE 0x0004
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#define DT_HAS_NVRAM 0x0008
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#define DT_HAS_VALIDITY_CHECK 0x0010
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#define DT_HAS_CUSTOM_CONFIG 0x0020
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#define DT_HAS_ROM_REGION 0x0040
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#define DT_HAS_MACHINE_CONFIG 0x0080
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#define DT_HAS_INLINE_CONFIG 0x0100
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/* verify core stuff is specified */
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#ifndef DEVTEMPLATE_ID
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#error DEVTEMPLATE_ID must be specified!
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#endif
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#ifndef DEVTEMPLATE_FEATURES
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#error DEVTEMPLATE_FEATURES must be specified!
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#endif
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#ifndef DEVTEMPLATE_NAME
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#error DEVTEMPLATE_NAME must be specified!
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#endif
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#ifndef DEVTEMPLATE_FAMILY
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#error DEVTEMPLATE_FAMILY must be specified!
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#endif
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#ifdef DEVTEMPLATE_DERIVED_FEATURES
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#ifndef DEVTEMPLATE_DERIVED_NAME
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#error DEVTEMPLATE_DERIVED_NAME must be specified!
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#endif
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#endif
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/* primary device case */
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#ifndef DEVTEMPLATE_DERIVED_FEATURES
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/* derive standard state name (unless explicitly provided) */
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#ifndef DEVTEMPLATE_STATE
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#define DEVTEMPLATE_STATE DEVTEMPLATE_ID(,_state)
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#endif
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/* default to DEVICE_CLASS_PERIPHERAL */
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#ifndef DEVTEMPLATE_CLASS
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#define DEVTEMPLATE_CLASS DEVICE_CLASS_PERIPHERAL
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#endif
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/* default to version 1.0 */
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#ifndef DEVTEMPLATE_VERSION
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#define DEVTEMPLATE_VERSION "1.0"
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#endif
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/* default to the standard copyright attribution */
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#ifndef DEVTEMPLATE_CREDITS
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#define DEVTEMPLATE_CREDITS "Copyright Nicola Salmoria and the MAME Team"
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#endif
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/* declare callback functions */
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_RESET)
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static DEVICE_RESET( DEVTEMPLATE_ID(,) );
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_STOP)
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static DEVICE_STOP( DEVTEMPLATE_ID(,) );
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_EXECUTE)
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static DEVICE_EXECUTE( DEVTEMPLATE_ID(,) );
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_NVRAM)
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static DEVICE_NVRAM( DEVTEMPLATE_ID(,) );
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_VALIDITY_CHECK)
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static DEVICE_VALIDITY_CHECK( DEVTEMPLATE_ID(,) );
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_CUSTOM_CONFIG)
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static DEVICE_CUSTOM_CONFIG( DEVTEMPLATE_ID(,) );
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#endif
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/* the actual get_info function */
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DEVICE_GET_INFO( DEVTEMPLATE_ID(,) )
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{
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(DEVTEMPLATE_STATE); break;
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_INLINE_CONFIG)
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case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(DEVTEMPLATE_ID(,_config)); break;
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#endif
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case DEVINFO_INT_CLASS: info->i = DEVTEMPLATE_CLASS; break;
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/* --- the following bits of info are returned as pointers --- */
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_ROM_REGION)
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case DEVINFO_PTR_ROM_REGION: info->romregion = DEVTEMPLATE_ID(rom_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_MACHINE_CONFIG)
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case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = DEVTEMPLATE_ID(machine_config_,); break;
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#endif
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case DEVINFO_FCT_START: info->start = DEVTEMPLATE_ID(device_start_,); break;
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_RESET)
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case DEVINFO_FCT_RESET: info->reset = DEVTEMPLATE_ID(device_reset_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_STOP)
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case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_ID(device_stop_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_EXECUTE)
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case DEVINFO_FCT_EXECUTE: info->execute = DEVTEMPLATE_ID(device_execute_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_NVRAM)
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case DEVINFO_FCT_NVRAM: info->nvram = DEVTEMPLATE_ID(device_nvram_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_VALIDITY_CHECK)
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case DEVINFO_FCT_VALIDITY_CHECK: info->validity_check = DEVTEMPLATE_ID(device_validity_check_,); break;
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#endif
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#if ((DEVTEMPLATE_FEATURES) & DT_HAS_CUSTOM_CONFIG)
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case DEVINFO_FCT_CUSTOM_CONFIG: info->custom_config = DEVTEMPLATE_ID(device_custom_config_,); break;
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#endif
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case DEVINFO_STR_NAME: strcpy(info->s, DEVTEMPLATE_NAME); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, DEVTEMPLATE_FAMILY); break;
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case DEVINFO_STR_VERSION: strcpy(info->s, DEVTEMPLATE_VERSION); break;
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case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, DEVTEMPLATE_SOURCE); break;
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case DEVINFO_STR_CREDITS: strcpy(info->s, DEVTEMPLATE_CREDITS); break;
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}
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}
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/* derived device case */
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#else
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/* declare callback functions */
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_RESET)
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static DEVICE_RESET( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_STOP)
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static DEVICE_STOP( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_EXECUTE)
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static DEVICE_EXECUTE( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_NVRAM)
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static DEVICE_NVRAM( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_VALIDITY_CHECK)
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static DEVICE_VALIDITY_CHECK( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_CUSTOM_CONFIG)
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static DEVICE_CUSTOM_CONFIG( DEVTEMPLATE_DERIVED_ID(,) );
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#endif
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/* the actual get_info function */
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DEVICE_GET_INFO( DEVTEMPLATE_DERIVED_ID(,) )
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{
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switch (state)
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{
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/* --- the following bits of info are returned as pointers --- */
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_ROM_REGION)
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case DEVINFO_PTR_ROM_REGION: info->romregion = DEVTEMPLATE_DERIVED_ID(rom_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_MACHINE_CONFIG)
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case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = DEVTEMPLATE_DERIVED_ID(machine_config_,); break;
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#endif
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case DEVINFO_FCT_START: info->start = DEVTEMPLATE_ID(device_start_,); break;
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_RESET)
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case DEVINFO_FCT_RESET: info->reset = DEVTEMPLATE_DERIVED_ID(device_reset_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_STOP)
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case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_DERIVED_ID(device_stop_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_EXECUTE)
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case DEVINFO_FCT_EXECUTE: info->execute = DEVTEMPLATE_DERIVED_ID(device_execute_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_NVRAM)
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case DEVINFO_FCT_NVRAM: info->nvram = DEVTEMPLATE_DERIVED_ID(device_nvram_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_VALIDITY_CHECK)
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case DEVINFO_FCT_VALIDITY_CHECK: info->validity_check = DEVTEMPLATE_DERIVED_ID(device_validity_check_,); break;
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#endif
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#if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_CUSTOM_CONFIG)
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case DEVINFO_FCT_CUSTOM_CONFIG: info->custom_config = DEVTEMPLATE_DERIVED_ID(device_custom_config_,); break;
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#endif
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case DEVINFO_STR_NAME: strcpy(info->s, DEVTEMPLATE_DERIVED_NAME); break;
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default: DEVICE_GET_INFO_CALL(DEVTEMPLATE_ID(,)); break;
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}
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}
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#endif
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#undef DT_HAS_RESET
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#undef DT_HAS_STOP
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#undef DT_HAS_EXECUTE
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#undef DT_HAS_NVRAM
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#undef DT_HAS_VALIDITY_CHECK
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#undef DT_HAS_CUSTOM_CONFIG
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#undef DT_HAS_ROM_REGION
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#undef DT_HAS_MACHINE_CONFIG
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#undef DEVTEMPLATE_DERIVED_ID
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#undef DEVTEMPLATE_DERIVED_FEATURES
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#undef DEVTEMPLATE_DERIVED_NAME
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@ -1,55 +1,47 @@
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/***************************************************************************
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Namco 52XX
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Namco 52XX
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This instance of the Fujitsu MB8843 MCU is programmed to act as a sample player.
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It is used by just two games: Bosconian and Pole Position.
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This instance of the Fujitsu MB8843 MCU is programmed to act as a
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sample player. It is used by just two games: Bosconian and Pole
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Position.
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A0-A15 = address to read from sample ROMs
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D0-D7 = data freom sample ROMs
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CMD = command from CPU (sample to play, 0 = none)
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OUT = sound output
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A0-A15 = address to read from sample ROMs
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D0-D7 = data from sample ROMs
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CMD0-CMD3 = command from CPU (sample to play, 0 = none)
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OUT0-OUT3 = sound output
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+------+
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EXTAL|1 42|Vcc
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XTAL|2 41|CMD3
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/RESET|3 40|CMD2
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/IRQ|4 39|CMD1
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n.c.|5 38|CMD0
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[2] |6 37|A7
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n.c.|7 36|A6
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[1] |8 35|A5
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OUT0|9 34|A4
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OUT1|10 33|A3
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OUT2|11 32|A2
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OUT3|12 31|A1
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A8|13 30|A0
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A9|14 29|D7
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A10|15 28|D6
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A11|16 27|D5
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[3]A12|17 26|D4
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[3]A13|18 25|D3
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[3]A14|19 24|D2
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[3]A15|20 23|D1
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GND|21 22|D0
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+------+
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+------+
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EX|1 42|Vcc
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X|2 41|K3 (CMD3)
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/RESET|3 40|K2 (CMD2)
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/IRQ|4 39|K1 (CMD1)
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(n.c.) SO|5 38|K0 (CMD0)
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[1] SI|6 37|R15 (A7)
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(n.c.) /SC/TO|7 36|R14 (A6)
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[2] /TC|8 35|R13 (A5)
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(OUT0) P0|9 34|R12 (A4)
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(OUT1) P1|10 33|R11 (A3)
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(OUT2) P2|11 32|R10 (A2)
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(OUT3) P3|12 31|R9 (A1)
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(A8) O0|13 30|R8 (A0)
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(A9) O1|14 29|R7 (D7)
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(A10) O2|15 28|R6 (D6)
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(A11) O3|16 27|R5 (D5)
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(A12) O4|17 26|R4 (D4)
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(A13) O5|18 25|R3 (D3)
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(A14) O6|19 24|R2 (D2)
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(A15) O7|20 23|R1 (D1)
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GND|21 22|R0 (D0)
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+------+
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[1] in polepos, GND; in bosco, 4kHz output from a 555 timer
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[2] in polepos, +5V; in bosco, GND
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[3] in polepos, these are true address lines, in bosco they are chip select lines
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(each one select one of the four ROM chips). Behaviour related to [2]
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[1] in polepos, +5V; in bosco, GND
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this value controls the ROM addressing mode:
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if 0 (GND), A12-A15 are direct active-low chip enables
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if 1 (Vcc), A12-A15 are address lines
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||||
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||||
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CMD0-CMD3 -> K0-K3
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D0-D3 -> R0-R3
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D4-D7 -> R4-R7
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||||
A0-A3 -> R8-R11
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A4-A7 -> R12-R15
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A8-A11 -> O0-O3
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A12-A15 -> O4-O7
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OUT0-OUT3 -> P0-P3
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/TC -> [1]
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||||
SI -> [2]
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[2] in polepos, GND; in bosco, output from a 555 timer
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||||
this value is an external timer, which is used for some samples
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||||
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***************************************************************************/
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@ -235,40 +227,13 @@ static DEVICE_START( namco_52xx )
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/*-------------------------------------------------
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device reset callback
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||||
device definition
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||||
-------------------------------------------------*/
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||||
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static DEVICE_RESET( namco_52xx )
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{
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||||
// namco_52xx_state *state = get_safe_token(device);
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}
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||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
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||||
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||||
/*-------------------------------------------------
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||||
device get info callback
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||||
-------------------------------------------------*/
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||||
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||||
DEVICE_GET_INFO( namco_52xx )
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||||
{
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||||
switch (state)
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||||
{
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||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
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||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_52xx_state); break;
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||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
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||||
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/* --- the following bits of info are returned as pointers --- */
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||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_52xx); break;
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||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_52xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 52xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_52xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_ROM_REGION | DT_HAS_MACHINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 52xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
@ -1,50 +1,49 @@
|
||||
/***************************************************************************
|
||||
|
||||
Namco 54XX
|
||||
Namco 54XX
|
||||
|
||||
This custom chip is a Fujitsu MB8844 MCU programmed to act as a noise
|
||||
generator. It is used for explosions, the shoot sound in Bosconian, and the
|
||||
tire screech sound in Pole Position.
|
||||
This custom chip is a Fujitsu MB8844 MCU programmed to act as a noise
|
||||
generator. It is used for explosions, the shoot sound in Bosconian,
|
||||
and the tire screech sound in Pole Position.
|
||||
|
||||
CMD = command from main CPU
|
||||
OUTn = sound outputs (3 channels)
|
||||
CMD = command from main CPU
|
||||
OUTn = sound outputs (3 channels)
|
||||
|
||||
The chip reads the command when the /IRQ is pulled down.
|
||||
The chip reads the command when the /IRQ is pulled down.
|
||||
|
||||
+------+
|
||||
EXTAL|1 28|Vcc
|
||||
XTAL|2 27|CMD7
|
||||
/RESET|3 26|CMD6
|
||||
OUT0.0|4 25|CMD5
|
||||
OUT0.1|5 24|CMD4
|
||||
OUT0.2|6 23|/IRQ
|
||||
OUT0.3|7 22|n.c. [1]
|
||||
OUT1.0|8 21|n.c. [1]
|
||||
OUT1.1|9 20|OUT2.3
|
||||
OUT1.2|10 19|OUT2.2
|
||||
OUT1.3|11 18|OUT2.1
|
||||
CMD0|12 17|OUT2.0
|
||||
CMD1|13 16|CMD3
|
||||
GND|14 15|CMD2
|
||||
+------+
|
||||
+------+
|
||||
EX|1 28|Vcc
|
||||
X|2 27|K3 (CMD7)
|
||||
/RESET|3 26|K2 (CMD6)
|
||||
(OUT0.0) O0|4 25|K1 (CMD5)
|
||||
(OUT0.1) O1|5 24|K0 (CMD4)
|
||||
(OUT0.2) O2|6 23|R10/IRQ
|
||||
(OUT0.3) O3|7 22|R9/TC
|
||||
(OUT1.0) O4|8 21|R8
|
||||
(OUT1.1) O5|9 20|R7 (OUT2.3)
|
||||
(OUT1.2) O6|10 19|R6 (OUT2.2)
|
||||
(OUT1.3) O7|11 18|R5 (OUT2.1)
|
||||
(CMD0) R0|12 17|R4 (OUT2.0)
|
||||
(CMD1) R1|13 16|R3 (CMD3)
|
||||
GND|14 15|R2 (CMD2)
|
||||
+------+
|
||||
|
||||
[1] The RNG that drives the type A output is output on pin 21, and
|
||||
the one that drives the type B output is output on pin 22, but those
|
||||
pins are not connected on the board.
|
||||
|
||||
|
||||
[1] The RNG that drives the type A output is output on pin 21, and the one that
|
||||
drives the type B output is output on pin 22, but those pins are not connected
|
||||
on the board.
|
||||
The command format is very simple:
|
||||
|
||||
|
||||
The command format is very simple:
|
||||
|
||||
0x: nop
|
||||
1x: play sound type A
|
||||
2x: play sound type B
|
||||
3x: set parameters (type A) (followed by 4 bytes)
|
||||
4x: set parameters (type B) (followed by 4 bytes)
|
||||
5x: play sound type C
|
||||
6x: set parameters (type C) (followed by 5 bytes)
|
||||
7x: set volume for sound type C to x
|
||||
8x-Fx: nop
|
||||
0x: nop
|
||||
1x: play sound type A
|
||||
2x: play sound type B
|
||||
3x: set parameters (type A) (followed by 4 bytes)
|
||||
4x: set parameters (type B) (followed by 4 bytes)
|
||||
5x: play sound type C
|
||||
6x: set parameters (type C) (followed by 5 bytes)
|
||||
7x: set volume for sound type C to x
|
||||
8x-Fx: nop
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -184,41 +183,13 @@ static DEVICE_START( namco_54xx )
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device reset callback
|
||||
device definition
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_RESET( namco_54xx )
|
||||
{
|
||||
// namco_54xx_state *state = get_safe_token(device);
|
||||
}
|
||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_54xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_54xx_state); break;
|
||||
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(namco_54xx_config); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_54xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_54xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_54xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_54xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 54xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_54xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_ROM_REGION | DT_HAS_MACHINE_CONFIG | DT_HAS_INLINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 54xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
@ -1669,14 +1669,14 @@ static MACHINE_DRIVER_START( bosco )
|
||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(bosco_map)
|
||||
|
||||
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/12, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/6/2) /* 1.536 MHz */
|
||||
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/6/2) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/6/2, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx_0", "maincpu", "51xx", NULL, "50xx_1", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx_1", "sub", "50xx_2", "52xx", NULL, NULL)
|
||||
MDRV_NAMCO_06XX_ADD("06xx_0", MASTER_CLOCK/6/64, "maincpu", "51xx", NULL, "50xx_1", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx_1", MASTER_CLOCK/6/64, "sub", "50xx_2", "52xx", NULL, NULL)
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(8)
|
||||
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
|
||||
@ -1686,11 +1686,8 @@ static MACHINE_DRIVER_START( bosco )
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60.606060)
|
||||
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
||||
MDRV_SCREEN_SIZE(36*8, 272) /* guess */
|
||||
MDRV_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 2*8, 30*8-1)
|
||||
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 16, 224+16)
|
||||
|
||||
MDRV_GFXDECODE(bosco)
|
||||
MDRV_PALETTE_LENGTH(64*4+64*4+4+64)
|
||||
@ -1728,10 +1725,10 @@ static MACHINE_DRIVER_START( galaga )
|
||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(galaga_map)
|
||||
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", NULL, NULL, "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "maincpu", "51xx", NULL, NULL, "54xx")
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(8)
|
||||
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
|
||||
@ -1741,11 +1738,8 @@ static MACHINE_DRIVER_START( galaga )
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60.606060)
|
||||
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
||||
MDRV_SCREEN_SIZE(36*8, 272) /* guess */
|
||||
MDRV_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
|
||||
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
|
||||
|
||||
MDRV_GFXDECODE(galaga)
|
||||
MDRV_PALETTE_LENGTH(64*4+64*4+64)
|
||||
@ -1797,11 +1791,11 @@ static MACHINE_DRIVER_START( xevious )
|
||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(xevious_map)
|
||||
|
||||
MDRV_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
MDRV_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", NULL, "50xx", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "maincpu", "51xx", NULL, "50xx", "54xx")
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(8)
|
||||
MDRV_QUANTUM_TIME(HZ(60000)) /* 1000 CPU slices per frame - an high value to ensure proper */
|
||||
@ -1811,11 +1805,8 @@ static MACHINE_DRIVER_START( xevious )
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60.606060)
|
||||
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
||||
MDRV_SCREEN_SIZE(36*8, 272) /* guess */
|
||||
MDRV_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
|
||||
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
|
||||
|
||||
MDRV_GFXDECODE(xevious)
|
||||
MDRV_PALETTE_LENGTH(128*4+64*8+64*2)
|
||||
@ -1877,10 +1868,10 @@ static MACHINE_DRIVER_START( digdug )
|
||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(digdug_map)
|
||||
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/12, namco_53xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/6/2, namco_53xx_intf) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", "53xx", NULL, NULL)
|
||||
MDRV_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "maincpu", "51xx", "53xx", NULL, NULL)
|
||||
|
||||
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
|
||||
/* synchronization of the CPUs */
|
||||
@ -1891,11 +1882,8 @@ static MACHINE_DRIVER_START( digdug )
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60.606060)
|
||||
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
||||
MDRV_SCREEN_SIZE(36*8, 272) /* guess */
|
||||
MDRV_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
|
||||
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
|
||||
|
||||
MDRV_GFXDECODE(digdug)
|
||||
MDRV_PALETTE_LENGTH(16*2+64*4+64*4)
|
||||
|
||||
@ -917,12 +917,12 @@ static MACHINE_DRIVER_START( polepos )
|
||||
MDRV_CPU_PROGRAM_MAP(z8002_map)
|
||||
MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
|
||||
|
||||
MDRV_NAMCO_51XX_ADD("51xx", 18432000/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", 18432000/12, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_53XX_ADD("53xx", 18432000/12, namco_53xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", 18432000/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", 18432000/6/2, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", 18432000/6/2, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_53XX_ADD("53xx", 18432000/6/2, namco_53xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", 18432000/6/2, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", "53xx", "52xx", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx", 18432000/6/64, "maincpu", "51xx", "53xx", "52xx", "54xx")
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(16) // 128V clocks the same as VBLANK
|
||||
|
||||
|
||||
@ -1,68 +1,81 @@
|
||||
/***************************************************************************
|
||||
|
||||
The following Namco custom chips are all instances of the same 4-bit MCU,
|
||||
the Fujitsu MB8843 (42-pin DIP package) and MB8842/MB8844 (28-pin DIP),
|
||||
differently programmed.
|
||||
Namco 06XX
|
||||
|
||||
This chip is used as an interface to up to 4 other custom chips.
|
||||
It signals IRQs to the custom MCUs when writes happen, and generates
|
||||
NMIs to the controlling CPU to drive reads based on a clock.
|
||||
|
||||
chip MCU pins function
|
||||
---- ------ ---- --------
|
||||
50XX MB8842 28 player score handling (protection)
|
||||
51XX MB8843 42 I/O (coin management built-in)
|
||||
52XX MB8843 42 sample playback
|
||||
53XX MB8843 42 I/O (steering wheel support)
|
||||
54XX MB8844 28 explosion (noise) generator
|
||||
SD0-SD7 are data I/O lines connecting to the controlling CPU
|
||||
SEL selects either control (1) or data (0), usually connected to
|
||||
an address line of the controlling CPU
|
||||
/NMI is an NMI signal line for the controlling CPU
|
||||
|
||||
06XX interface:
|
||||
---------------
|
||||
Galaga 51XX ---- ---- 54XX
|
||||
Bosconian (CPU board) 51XX ---- 50XX 54XX
|
||||
Bosconian (Video board) 50XX 52XX ---- ----
|
||||
Xevious 51XX ---- 50XX 54XX
|
||||
Dig Dug 51XX 53XX ---- ----
|
||||
Pole Position / PP II 51XX 53XX 52XX 54XX
|
||||
ID0-ID7 are data I/O lines connecting to the other custom chips
|
||||
/IO1-/IO4 are IRQ signal lines for each custom chip
|
||||
|
||||
+------+
|
||||
[1]|1 28|Vcc
|
||||
ID7|2 27|SD7
|
||||
ID6|3 26|SD6
|
||||
ID5|4 25|SD5
|
||||
ID4|5 24|SD4
|
||||
ID3|6 23|SD3
|
||||
ID2|7 22|SD2
|
||||
ID1|8 21|SD1
|
||||
ID0|9 20|SD0
|
||||
/IO1|10 19|/NMI
|
||||
/IO2|11 18|/CS
|
||||
/IO3|12 17|CLOCK
|
||||
/IO4|13 16|R/W
|
||||
GND|14 15|SEL
|
||||
+------+
|
||||
|
||||
[1] on polepos, galaga, xevious, and bosco: connected to K3 of the 51xx
|
||||
on bosco and xevious, connected to R8 of the 50xx
|
||||
|
||||
|
||||
Pinouts:
|
||||
|
||||
MB8843 MB8842/MB8844
|
||||
+------+ +------+
|
||||
EXTAL|1 42|Vcc EXTAL|1 28|Vcc
|
||||
XTAL|2 41|K3 XTAL|2 27|K3
|
||||
/RESET|3 40|K2 /RESET|3 26|K2
|
||||
/IRQ|4 39|K1 O0|4 25|K1
|
||||
SO|5 38|K0 O1|5 24|K0
|
||||
SI|6 37|R15 O2|6 23|R10 /IRQ
|
||||
/SC /TO|7 36|R14 O3|7 22|R9 /TC
|
||||
/TC|8 35|R13 O4|8 21|R8
|
||||
P0|9 34|R12 O5|9 20|R7
|
||||
P1|10 33|R11 O6|10 19|R6
|
||||
P2|11 32|R10 O7|11 18|R5
|
||||
P3|12 31|R9 R0|12 17|R4
|
||||
O0|13 30|R8 R1|13 16|R3
|
||||
O1|14 29|R7 GND|14 15|R2
|
||||
O2|15 28|R6 +------+
|
||||
O3|16 27|R5
|
||||
O4|17 26|R4
|
||||
O5|18 25|R3
|
||||
O6|19 24|R2
|
||||
O7|20 23|R1
|
||||
GND|21 22|R0
|
||||
+------+
|
||||
06XX interface:
|
||||
---------------
|
||||
Galaga 51XX ---- ---- 54XX
|
||||
Bosconian (CPU board) 51XX ---- 50XX 54XX
|
||||
Bosconian (Video board) 50XX 52XX ---- ----
|
||||
Xevious 51XX ---- 50XX 54XX
|
||||
Dig Dug 51XX 53XX ---- ----
|
||||
Pole Position / PP II 51XX 53XX 52XX 54XX
|
||||
|
||||
|
||||
O O R R R K
|
||||
50XX O O I I I
|
||||
54XX O O I O I
|
||||
Galaga writes:
|
||||
control = 10(000), data = FF at startup
|
||||
control = 71(011), read 3, control = 10
|
||||
control = A1(101), write 4, control = 10
|
||||
control = A8(101), write 12, control = 10
|
||||
|
||||
P O O R R R R K
|
||||
51XX O O O I I I I I
|
||||
52XX O O O I I O O I
|
||||
53XX O? O O I I I I I
|
||||
Xevious writes:
|
||||
control = 10 at startup
|
||||
control = A1(101), write 6, control = 10
|
||||
control = 71(011), read 3, control = 10
|
||||
control = 64(011), write 1, control = 10
|
||||
control = 74(011), read 4, control = 10
|
||||
control = 68(011), write 7, control = 10
|
||||
|
||||
Dig Dug writes:
|
||||
control = 10(000), data = 10 at startup
|
||||
control = A1(101), write 3, control = 10
|
||||
control = 71(011), read 3, control = 10
|
||||
control = D2(110), read 2, control = 10
|
||||
|
||||
Bosco writes:
|
||||
control = 10(000), data = FF at startup
|
||||
control = C8(110), write 17, control = 10
|
||||
control = 61(011), write 1, control = 10
|
||||
control = 71(011), read 3, control = 10
|
||||
control = 94(100), read 4, control = 10
|
||||
control = 64(011), write 1, control = 10
|
||||
control = 84(100), write 5, control = 10
|
||||
|
||||
|
||||
For the 52XX, see sound/namco52.c
|
||||
|
||||
For the 54XX, see audio/namco54.c
|
||||
control = 34(001), write 1, control = 10
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -83,7 +96,7 @@ For the 54XX, see audio/namco54.c
|
||||
typedef struct _namco_06xx_state namco_06xx_state;
|
||||
struct _namco_06xx_state
|
||||
{
|
||||
UINT8 command;
|
||||
UINT8 control;
|
||||
emu_timer *nmi_timer;
|
||||
const device_config *nmicpu;
|
||||
const device_config *device[4];
|
||||
@ -121,50 +134,41 @@ static TIMER_CALLBACK( nmi_generate )
|
||||
READ8_DEVICE_HANDLER( namco_06xx_data_r )
|
||||
{
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
UINT8 result = 0xff;
|
||||
int devnum;
|
||||
|
||||
LOG(("%s: 06XX '%s' read offset %d\n",cpuexec_describe_context(device->machine),device->tag,offset));
|
||||
|
||||
if (!(state->command & 0x10))
|
||||
if (!(state->control & 0x10))
|
||||
{
|
||||
logerror("%s: 06XX '%s' read in write mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->command);
|
||||
logerror("%s: 06XX '%s' read in write mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->control);
|
||||
return 0;
|
||||
}
|
||||
|
||||
switch (state->command & 0xf)
|
||||
{
|
||||
case 0x1: return (state->read[0] != NULL) ? (*state->read[0])(state->device[0],0) : 0xff;
|
||||
case 0x2: return (state->read[1] != NULL) ? (*state->read[1])(state->device[1],0) : 0xff;
|
||||
case 0x4: return (state->read[2] != NULL) ? (*state->read[2])(state->device[2],0) : 0xff;
|
||||
case 0x8: return (state->read[3] != NULL) ? (*state->read[3])(state->device[3],0) : 0xff;
|
||||
default:
|
||||
logerror("%s: 06XX '%s' read in unsupported mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->command);
|
||||
return 0xff;
|
||||
}
|
||||
for (devnum = 0; devnum < 4; devnum++)
|
||||
if ((state->control & (1 << devnum)) && state->read[devnum] != NULL)
|
||||
result &= (*state->read[devnum])(state->device[devnum], 0);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_06xx_data_w )
|
||||
{
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
int devnum;
|
||||
|
||||
LOG(("%s: 06XX '%s' write offset %d = %02x\n",cpuexec_describe_context(device->machine),device->tag,offset,data));
|
||||
|
||||
if (state->command & 0x10)
|
||||
if (state->control & 0x10)
|
||||
{
|
||||
logerror("%s: 06XX '%s' write in read mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->command);
|
||||
logerror("%s: 06XX '%s' write in read mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->control);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (state->command & 0xf)
|
||||
{
|
||||
case 0x1: if (state->write[0] != NULL) (*state->write[0])(state->device[0],0,data); break;
|
||||
case 0x2: if (state->write[1] != NULL) (*state->write[1])(state->device[1],0,data); break;
|
||||
case 0x4: if (state->write[2] != NULL) (*state->write[2])(state->device[2],0,data); break;
|
||||
case 0x8: if (state->write[3] != NULL) (*state->write[3])(state->device[3],0,data); break;
|
||||
default:
|
||||
logerror("%s: 06XX '%s' write in unsupported mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->command);
|
||||
break;
|
||||
}
|
||||
for (devnum = 0; devnum < 4; devnum++)
|
||||
if ((state->control & (1 << devnum)) && state->write[devnum] != NULL)
|
||||
(*state->write[devnum])(state->device[devnum], 0, data);
|
||||
}
|
||||
|
||||
|
||||
@ -172,18 +176,19 @@ READ8_DEVICE_HANDLER( namco_06xx_ctrl_r )
|
||||
{
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
LOG(("%s: 06XX '%s' ctrl_r\n",cpuexec_describe_context(device->machine),device->tag));
|
||||
return state->command;
|
||||
return state->control;
|
||||
}
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w )
|
||||
{
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
int devnum;
|
||||
|
||||
LOG(("%s: 06XX '%s' command %02x\n",cpuexec_describe_context(device->machine),device->tag,data));
|
||||
LOG(("%s: 06XX '%s' control %02x\n",cpuexec_describe_context(device->machine),device->tag,data));
|
||||
|
||||
state->command = data;
|
||||
state->control = data;
|
||||
|
||||
if ((state->command & 0x0f) == 0)
|
||||
if ((state->control & 0x0f) == 0)
|
||||
{
|
||||
LOG(("disabling nmi generate timer\n"));
|
||||
timer_adjust_oneshot(state->nmi_timer, attotime_never, 0);
|
||||
@ -195,21 +200,13 @@ WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w )
|
||||
// this timing is critical. Due to a bug, Bosconian will stop responding to
|
||||
// inputs if a transfer terminates at the wrong time.
|
||||
// On the other hand, the time cannot be too short otherwise the 54XX will
|
||||
// not have enough time to process the incoming commands.
|
||||
// not have enough time to process the incoming controls.
|
||||
timer_adjust_periodic(state->nmi_timer, ATTOTIME_IN_USEC(200), 0, ATTOTIME_IN_USEC(200));
|
||||
|
||||
if (state->command & 0x10)
|
||||
{
|
||||
switch (state->command & 0xf)
|
||||
{
|
||||
case 0x1: if (state->readreq[0] != NULL) (*state->readreq[0])(state->device[0]); break;
|
||||
case 0x2: if (state->readreq[1] != NULL) (*state->readreq[1])(state->device[1]); break;
|
||||
case 0x4: if (state->readreq[2] != NULL) (*state->readreq[2])(state->device[2]); break;
|
||||
case 0x8: if (state->readreq[3] != NULL) (*state->readreq[3])(state->device[3]); break;
|
||||
default:
|
||||
logerror("%s: 06XX '%s' read in unsupported mode %02x\n",cpuexec_describe_context(device->machine),device->tag,state->command);
|
||||
}
|
||||
}
|
||||
if (state->control & 0x10)
|
||||
for (devnum = 0; devnum < 4; devnum++)
|
||||
if ((state->control & (1 << devnum)) && state->readreq[devnum] != NULL)
|
||||
(*state->readreq[devnum])(state->device[devnum]);
|
||||
}
|
||||
}
|
||||
|
||||
@ -224,7 +221,7 @@ WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w )
|
||||
|
||||
static DEVICE_START( namco_06xx )
|
||||
{
|
||||
const namco_06xx_interface *config = (const namco_06xx_interface *)device->inline_config;
|
||||
const namco_06xx_config *config = (const namco_06xx_config *)device->inline_config;
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
int devnum;
|
||||
|
||||
@ -277,7 +274,7 @@ static DEVICE_START( namco_06xx )
|
||||
/* allocate a timer */
|
||||
state->nmi_timer = timer_alloc(device->machine, nmi_generate, (void *)device);
|
||||
|
||||
state_save_register_device_item(device, 0, state->command);
|
||||
state_save_register_device_item(device, 0, state->control);
|
||||
}
|
||||
|
||||
|
||||
@ -288,32 +285,18 @@ static DEVICE_START( namco_06xx )
|
||||
static DEVICE_RESET( namco_06xx )
|
||||
{
|
||||
namco_06xx_state *state = get_safe_token(device);
|
||||
state->command = 0;
|
||||
state->control = 0;
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
device definition
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_06xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_06xx_state); break;
|
||||
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(namco_06xx_interface); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_06xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_06xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 06xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_06xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_RESET | DT_HAS_INLINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 06xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
@ -4,8 +4,8 @@
|
||||
#include "devintrf.h"
|
||||
|
||||
|
||||
typedef struct _namco_06xx_interface namco_06xx_interface;
|
||||
struct _namco_06xx_interface
|
||||
typedef struct _namco_06xx_config namco_06xx_config;
|
||||
struct _namco_06xx_config
|
||||
{
|
||||
const char *nmicpu;
|
||||
const char *chip0;
|
||||
@ -15,13 +15,13 @@ struct _namco_06xx_interface
|
||||
};
|
||||
|
||||
|
||||
#define MDRV_NAMCO_06XX_ADD(_tag, _nmicpu, _chip0, _chip1, _chip2, _chip3) \
|
||||
MDRV_DEVICE_ADD(_tag, NAMCO_06XX, 0) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_interface, nmicpu, _nmicpu) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_interface, chip0, _chip0) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_interface, chip1, _chip1) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_interface, chip2, _chip2) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_interface, chip3, _chip3)
|
||||
#define MDRV_NAMCO_06XX_ADD(_tag, _clock, _nmicpu, _chip0, _chip1, _chip2, _chip3) \
|
||||
MDRV_DEVICE_ADD(_tag, NAMCO_06XX, _clock) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_config, nmicpu, _nmicpu) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip0, _chip0) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip1, _chip1) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip2, _chip2) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip3, _chip3)
|
||||
|
||||
#define MDRV_NAMCO_06XX_REMOVE(_tag) \
|
||||
MDRV_DEVICE_REMOVE(_tag)
|
||||
|
||||
@ -1,37 +1,38 @@
|
||||
/***************************************************************************
|
||||
|
||||
Namco 50XX
|
||||
Namco 50XX
|
||||
|
||||
This custom chip is a Fujitsu MB8842 MCU programmed to act as a protection
|
||||
device. It keeps track of the players scores, and checks if a high score has
|
||||
been obtained or bonus lives should be awarded. The main CPU has a range of
|
||||
commands to increment/decrement the score by various fixed amounts.
|
||||
This custom chip is a Fujitsu MB8842 MCU programmed to act as a
|
||||
protection device. It keeps track of the players scores, and checks if
|
||||
a high score has been obtained or bonus lives should be awarded. The
|
||||
main CPU has a range of commands to increment/decrement the score by
|
||||
various fixed amounts.
|
||||
|
||||
The device is used to its full potential only by Bosconian; Xevious uses it
|
||||
too, but only to do a protection check on startup.
|
||||
The device is used to its full potential only by Bosconian; Xevious
|
||||
uses it too, but only to do a protection check on startup.
|
||||
|
||||
CMD = command from main CPU
|
||||
ANS = answer to main CPU
|
||||
CMD = command from main CPU
|
||||
ANS = answer to main CPU
|
||||
|
||||
The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21
|
||||
determines whether a read or write should happen (1=R, 0=W).
|
||||
The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21
|
||||
determines whether a read or write should happen (1=R, 0=W).
|
||||
|
||||
+------+
|
||||
EXTAL|1 28|Vcc
|
||||
XTAL|2 27|CMD7
|
||||
/RESET|3 26|CMD6
|
||||
ANS0|4 25|CMD5
|
||||
ANS1|5 24|CMD4
|
||||
ANS2|6 23|/IRQ
|
||||
ANS3|7 22|n.c.
|
||||
ANS4|8 21|R/W
|
||||
ANS5|9 20|n.c.
|
||||
ANS6|10 19|n.c.
|
||||
ANS7|11 18|n.c.
|
||||
CMD0|12 17|n.c.
|
||||
CMD1|13 16|CMD3
|
||||
GND|14 15|CMD2
|
||||
+------+
|
||||
+------+
|
||||
EX|1 28|Vcc
|
||||
X|2 27|K3 (CMD7)
|
||||
/RESET|3 26|K2 (CMD6)
|
||||
(ANS0) O0|4 25|K1 (CMD5)
|
||||
(ANS1) O1|5 24|K0 (CMD4)
|
||||
(ANS2) O2|6 23|R10/IRQ
|
||||
(ANS3) O3|7 22|R9/TC (n.c.)
|
||||
(ANS4) O4|8 21|R8 (R/W)
|
||||
(ANS5) O5|9 20|R7 (n.c.)
|
||||
(ANS6) O6|10 19|R6 (n.c.)
|
||||
(ANS7) O7|11 18|R5 (n.c.)
|
||||
(CMD0) R7|12 17|R4 (n.c.)
|
||||
(CMD1) R0|13 16|R3 (CMD3)
|
||||
GND|14 15|R2 (CMD2)
|
||||
+------+
|
||||
|
||||
|
||||
|
||||
@ -290,40 +291,13 @@ static DEVICE_START( namco_50xx )
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device reset callback
|
||||
device definition
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_RESET( namco_50xx )
|
||||
{
|
||||
// namco_50xx_state *state = get_safe_token(device);
|
||||
}
|
||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_50xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_50xx_state); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_50xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_50xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_50xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_50xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 50xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_50xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_ROM_REGION | DT_HAS_MACHINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 50xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
@ -1,58 +1,56 @@
|
||||
/***************************************************************************
|
||||
|
||||
Namco 51XX
|
||||
Namco 51XX
|
||||
|
||||
This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O device
|
||||
with built-in coin management.
|
||||
protection
|
||||
device. It keeps track of the players scores, and checks if a high score has
|
||||
been obtained or bonus lives should be awarded. The main CPU has a range of
|
||||
commands to increment/decrement the score by various fixed amounts.
|
||||
This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O
|
||||
device with built-in coin management. It is also apparently used as a
|
||||
protection device. It keeps track of the players scores, and checks
|
||||
if a high score has been obtained or bonus lives should be awarded.
|
||||
The main CPU has a range of commands to increment/decrement the score
|
||||
by various fixed amounts.
|
||||
|
||||
The device is used to its full potential only by Bosconian; Xevious uses it
|
||||
too, but only to do a protection check on startup.
|
||||
The device is used to its full potential only by Bosconian; Xevious
|
||||
uses it too, but only to do a protection check on startup.
|
||||
|
||||
CMD = command from main CPU
|
||||
ANS = answer to main CPU
|
||||
CMD = command from main CPU
|
||||
ANS = answer to main CPU
|
||||
|
||||
The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21
|
||||
determines whether a read or write should happen (1=R, 0=W).
|
||||
The chip reads/writes the I/O ports when the /IRQ is pulled down.
|
||||
Pin 21 determines whether a read or write should happen (1=R, 0=W).
|
||||
|
||||
MB8843
|
||||
+------+
|
||||
EXTAL|1 42|Vcc
|
||||
XTAL|2 41|K3
|
||||
/RESET|3 40|K2
|
||||
/IRQ|4 39|K1
|
||||
SO|5 38|K0
|
||||
SI|6 37|R15
|
||||
/SC /TO|7 36|R14
|
||||
/TC|8 35|R13
|
||||
P0|9 34|R12
|
||||
P1|10 33|R11
|
||||
P2|11 32|R10
|
||||
P3|12 31|R9
|
||||
O0|13 30|R8
|
||||
O1|14 29|R7
|
||||
O2|15 28|R6
|
||||
O3|16 27|R5
|
||||
O4|17 26|R4
|
||||
O5|18 25|R3
|
||||
O6|19 24|R2
|
||||
O7|20 23|R1
|
||||
GND|21 22|R0
|
||||
+------+
|
||||
+------+
|
||||
EX|1 42|Vcc
|
||||
X|2 41|K3
|
||||
/RESET|3 40|K2
|
||||
/IRQ|4 39|K1
|
||||
SO|5 38|K0
|
||||
SI|6 37|R15
|
||||
/SC /TO|7 36|R14
|
||||
/TC|8 35|R13
|
||||
P0|9 34|R12
|
||||
P1|10 33|R11
|
||||
P2|11 32|R10
|
||||
P3|12 31|R9
|
||||
O0|13 30|R8
|
||||
O1|14 29|R7
|
||||
O2|15 28|R6
|
||||
O3|16 27|R5
|
||||
O4|17 26|R4
|
||||
O5|18 25|R3
|
||||
O6|19 24|R2
|
||||
O7|20 23|R1
|
||||
GND|21 22|R0
|
||||
+------+
|
||||
|
||||
|
||||
commands:
|
||||
00: nop
|
||||
01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different)
|
||||
02: go in "credit" mode and enable start buttons
|
||||
03: disable joystick remapping
|
||||
04: enable joystick remapping
|
||||
05: go in "switch" mode
|
||||
06: nop
|
||||
07: nop
|
||||
commands:
|
||||
00: nop
|
||||
01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different)
|
||||
02: go in "credit" mode and enable start buttons
|
||||
03: disable joystick remapping
|
||||
04: enable joystick remapping
|
||||
05: go in "switch" mode
|
||||
06: nop
|
||||
07: nop
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -431,30 +429,13 @@ static DEVICE_RESET( namco_51xx )
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
device definition
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_51xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_51xx_state); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_51xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_51xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_51xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_51xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 51xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_51xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_RESET | DT_HAS_ROM_REGION | DT_HAS_MACHINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 51xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
@ -1,41 +1,54 @@
|
||||
/***************************************************************************
|
||||
|
||||
Namco 53XX
|
||||
Namco 53XX
|
||||
|
||||
This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O device.
|
||||
This instance of the Fujitsu MB8843 MCU is programmed to act as an I/O
|
||||
device. It is used by just two games: Dig Dug and Pole Position.
|
||||
|
||||
MOD0-MOD2 = input mode
|
||||
CS0-CS3 = chip select lines used to select 1 of 4 input sources
|
||||
OUT0-OUT7 = 8-bit final output data
|
||||
P0.0-P0.3 = input port 0 data
|
||||
P1.0-P1.3 = input port 1 data
|
||||
P2.0-P2.3 = input port 2 data
|
||||
P3.0-P3.3 = input port 3 data
|
||||
|
||||
MB8843
|
||||
+------+
|
||||
EXTAL|1 42|Vcc
|
||||
XTAL|2 41|K3
|
||||
/RESET|3 40|K2
|
||||
/IRQ|4 39|K1
|
||||
SO|5 38|K0
|
||||
SI|6 37|R15
|
||||
/SC /TO|7 36|R14
|
||||
/TC|8 35|R13
|
||||
P0|9 34|R12
|
||||
P1|10 33|R11
|
||||
P2|11 32|R10
|
||||
P3|12 31|R9
|
||||
O0|13 30|R8
|
||||
O1|14 29|R7
|
||||
O2|15 28|R6
|
||||
O3|16 27|R5
|
||||
O4|17 26|R4
|
||||
O5|18 25|R3
|
||||
O6|19 24|R2
|
||||
O7|20 23|R1
|
||||
GND|21 22|R0
|
||||
+------+
|
||||
+------+
|
||||
EX|1 42|Vcc
|
||||
X|2 41|K3 (MOD2)
|
||||
/RESET|3 40|K2 (MOD1)
|
||||
/IRQ|4 39|K1 (MOD0)
|
||||
SO|5 38|K0
|
||||
SI|6 37|R15 (P3.3)
|
||||
/SC /TO|7 36|R14 (P3.2)
|
||||
/TC|8 35|R13 (P3.1)
|
||||
(CS0) P0|9 34|R12 (P3.0)
|
||||
(CS1) P1|10 33|R11 (P2.3)
|
||||
(CS2) P2|11 32|R10 (P2.2)
|
||||
(CS3) P3|12 31|R9 (P2.1)
|
||||
(OUT0) O0|13 30|R8 (P2.0)
|
||||
(OUT1) O1|14 29|R7 (P1.3)
|
||||
(OUT2) O2|15 28|R6 (P1.2)
|
||||
(OUT3) O3|16 27|R5 (P1.1)
|
||||
(OUT4) O4|17 26|R4 (P1.0)
|
||||
(OUT5) O5|18 25|R3 (P0.3)
|
||||
(OUT6) O6|19 24|R2 (P0.2)
|
||||
(OUT7) O7|20 23|R1 (P0.1)
|
||||
GND|21 22|R0 (P0.0)
|
||||
+------+
|
||||
|
||||
Bits K1-K3 select one of 8 modes in which the input data is interpreted.
|
||||
MOD selects one of 8 modes in which the input data is interpreted.
|
||||
|
||||
Pole Position is hard-wired to use mode 0, which reads 4 steering inputs
|
||||
and 4 DIP switches (only 1 of each is used).
|
||||
Pole Position is hard-wired to use mode 0, which reads 4 steering
|
||||
inputs and 4 DIP switches (only 1 of each is used). The steering
|
||||
inputs are clocked on P0 and direction on P1, 1 bit per analog input.
|
||||
The DIP switches are connected to P2 and P3.
|
||||
|
||||
Dig Dug can control which mode to use via the MOD bit latches. It sets
|
||||
these values to mode 7 when running.
|
||||
Dig Dug can control which mode to use via the MOD bit latches. It sets
|
||||
these values to mode 7 when running.
|
||||
|
||||
Unknowns:
|
||||
SO is connected to IOSEL on Pole Position
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -180,40 +193,13 @@ static DEVICE_START( namco_53xx )
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device reset callback
|
||||
device definition
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_RESET( namco_53xx )
|
||||
{
|
||||
// namco_53xx_state *state = get_safe_token(device);
|
||||
}
|
||||
static const char *DEVTEMPLATE_SOURCE = __FILE__;
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_53xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_53xx_state); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_53xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_53xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_53xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_53xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 53xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
#define DEVTEMPLATE_ID(p,s) p##namco_53xx##s
|
||||
#define DEVTEMPLATE_FEATURES DT_HAS_ROM_REGION | DT_HAS_MACHINE_CONFIG
|
||||
#define DEVTEMPLATE_NAME "Namco 53xx"
|
||||
#define DEVTEMPLATE_FAMILY "Namco I/O"
|
||||
#include "devtempl.h"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user