diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index f28dcf53253..88c12563126 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -368,6 +368,8 @@ if (CPUS["E0C6200"]~=null) then files { MAME_DIR .. "src/emu/cpu/e0c6200/e0c6200.c", MAME_DIR .. "src/emu/cpu/e0c6200/e0c6200.h", + MAME_DIR .. "src/emu/cpu/e0c6200/e0c6s46.c", + MAME_DIR .. "src/emu/cpu/e0c6200/e0c6s46.h", } end diff --git a/src/emu/cpu/e0c6200/e0c6200.c b/src/emu/cpu/e0c6200/e0c6200.c index 589a66e2b4c..8969dd19cd6 100644 --- a/src/emu/cpu/e0c6200/e0c6200.c +++ b/src/emu/cpu/e0c6200/e0c6200.c @@ -8,6 +8,10 @@ - 1998 MF297-06a E0C6200/E0C6200A Core CPU Manual - 1998 MF1049-01a E0C6S46 Technical Manual + E0C6200 is a CPU core used as the basis of many chips, it is not standalone. + Seiko Epson often changed prefixes of their device names. Depending on when, + the E0C6200 is known as SMC6200, E0C6200, S1C6200. + TODO: - RLC is part of the r,q opcodes and requires that r == q, what happens otherwise? - documentation is conflicting on whether or not the zero flag is set on RLC/RRC @@ -20,26 +24,6 @@ #include "e0c6200op.inc" -const device_type EPSON_E0C6S46 = &device_creator; - - -// internal memory maps -static ADDRESS_MAP_START(program_1k, AS_PROGRAM, 16, e0c6200_cpu_device) - AM_RANGE(0x0000, 0x03ff) AM_ROM -ADDRESS_MAP_END - - -static ADDRESS_MAP_START(data_64x4, AS_DATA, 8, e0c6200_cpu_device) - AM_RANGE(0x00, 0x3f) AM_RAM -ADDRESS_MAP_END - - -// device definitions -e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : e0c6200_cpu_device(mconfig, EPSON_E0C6S46, "E0C6S46", tag, owner, clock, 10, ADDRESS_MAP_NAME(program_1k), 6, ADDRESS_MAP_NAME(data_64x4), "e0c6s46", __FILE__) -{ } - - // disasm void e0c6200_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) { @@ -117,7 +101,7 @@ void e0c6200_cpu_device::device_start() void e0c6200_cpu_device::device_reset() { - m_op = 0xff; // nop + m_op = 0xfff; // nop m_pc = 0x100; m_f &= 3; // decimal flag is 0 on 6200A, undefined on 6200 } diff --git a/src/emu/cpu/e0c6200/e0c6200.h b/src/emu/cpu/e0c6200/e0c6200.h index 3e0ae72f32f..3f11bcfe7a7 100644 --- a/src/emu/cpu/e0c6200/e0c6200.h +++ b/src/emu/cpu/e0c6200/e0c6200.h @@ -6,8 +6,8 @@ */ -#ifndef _E06200_H_ -#define _E06200_H_ +#ifndef _E0C6200_H_ +#define _E0C6200_H_ #include "emu.h" @@ -110,15 +110,5 @@ protected: }; -class e0c6s46_device : public e0c6200_cpu_device -{ -public: - e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); -}; - - -extern const device_type EPSON_E0C6S46; - - -#endif /* _E06200_H_ */ +#endif /* _E0C6200_H_ */ diff --git a/src/emu/cpu/e0c6200/e0c6s46.c b/src/emu/cpu/e0c6200/e0c6s46.c new file mode 100644 index 00000000000..46da882a471 --- /dev/null +++ b/src/emu/cpu/e0c6200/e0c6s46.c @@ -0,0 +1,45 @@ +// license:BSD-3-Clause +// copyright-holders:hap +/* + + Seiko Epson E0C6S46 MCU + +*/ + +#include "e0c6s46.h" + + +const device_type EPSON_E0C6S46 = &device_creator; + + +// internal memory maps +static ADDRESS_MAP_START(program_1k, AS_PROGRAM, 16, e0c6s46_device) + AM_RANGE(0x0000, 0x03ff) AM_ROM +ADDRESS_MAP_END + + +static ADDRESS_MAP_START(data_64x4, AS_DATA, 8, e0c6s46_device) + AM_RANGE(0x00, 0x3f) AM_RAM +ADDRESS_MAP_END + + +// device definitions +e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : e0c6200_cpu_device(mconfig, EPSON_E0C6S46, "E0C6S46", tag, owner, clock, 10, ADDRESS_MAP_NAME(program_1k), 6, ADDRESS_MAP_NAME(data_64x4), "e0c6s46", __FILE__) +{ } + + + + +//------------------------------------------------- +// execute +//------------------------------------------------- + +void e0c6s46_device::execute_one() +{ + // E0C6S46 has no support for SLP opcode + if (m_op == 0xff9) + return; + + e0c6200_cpu_device::execute_one(); +} diff --git a/src/emu/cpu/e0c6200/e0c6s46.h b/src/emu/cpu/e0c6200/e0c6s46.h new file mode 100644 index 00000000000..dec7a07ba12 --- /dev/null +++ b/src/emu/cpu/e0c6200/e0c6s46.h @@ -0,0 +1,29 @@ +// license:BSD-3-Clause +// copyright-holders:hap +/* + + Seiko Epson E0C6S46 MCU + +*/ + +#ifndef _E0C6S46_H_ +#define _E0C6S46_H_ + +#include "e0c6200.h" + + +class e0c6s46_device : public e0c6200_cpu_device +{ +public: + e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + +protected: + // device_execute_interface overrides + virtual void execute_one(); +}; + + + +extern const device_type EPSON_E0C6S46; + +#endif /* _E0C6S46_H_ */