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mips1: handle no cache (nw)

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This commit is contained in:
Patrick Mackinlay 2018-11-19 21:02:48 +07:00
parent 18d0fee8ba
commit aa186556c4
1 changed files with 4 additions and 2 deletions
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6
src/devices/cpu/mips/mips1.cpp
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@ -156,12 +156,14 @@ void mips1core_device_base::device_add_mconfig(machine_config &config)
void mips1core_device_base::icache_map(address_map &map)
{
map(0, m_icache_size - 1).ram().mirror(~(m_icache_size - 1));
if (m_icache_size)
map(0, m_icache_size - 1).ram().mirror(~(m_icache_size - 1));
}
void mips1core_device_base::dcache_map(address_map &map)
{
map(0, m_dcache_size - 1).ram().mirror(~(m_dcache_size - 1));
if (m_dcache_size)
map(0, m_dcache_size - 1).ram().mirror(~(m_dcache_size - 1));
}
void mips1core_device_base::device_start()